ARM: tegra11: HDMI TMDS and PLL setup

Use new TMDS and PLL_D2 settings for proper 1080p HDMI operation.

Reviewed-on: http://git-master/r/133418
(cherry picked from commit 80a1b76d4fff5b6a56234edf505c98fd48c7f991)

Change-Id: I912ae6463582374add95fb809fb122c675c37ed6
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Rebase-Id: R81cae5c12f08e6414f99c6388f4c67c635369466

diff --git a/arch/arm/mach-tegra/tegra11_clocks.c b/arch/arm/mach-tegra/tegra11_clocks.c
index 9b620d9d99d961c9b0e0be85acc8c747266c75a3..f6c9dc0df8d1585900f4702d5da0667015a0fcee 100644 (file)
--- a/arch/arm/mach-tegra/tegra11_clocks.c
+++ b/arch/arm/mach-tegra/tegra11_clocks.c
@@ -5156,7 +5156,7 @@ static struct clk tegra_pll_d = {
                .vco_max   = 1000000000,
                .freq_table = tegra_pll_d_freq_table,
                .lock_delay = 1000,
-               .cpcon_default = 12,
+               .cpcon_default = 8,
        },
 };