/*
* arch/arm/mach-tegra/tegra21_clocks.c
*
- * Copyright (C) 2013-2015 NVIDIA Corporation. All rights reserved.
+ * Copyright (C) 2013-2016 NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
SHARED_CLK("ispa.isp.cbus", "ispa.isp", NULL, &tegra_visp_clks[1], "ispa", 0, 0, TEGRA210_CLK_ID_CXBUS_ISP_ISPA_USER),
SHARED_CLK("ispb.isp.cbus", "ispb.isp", NULL, &tegra_visp_clks[1], "ispb", 0, 0, TEGRA210_CLK_ID_CXBUS_ISP_ISPB_USER),
+ SHARED_CLK("vi_v4l2.cbus", "vi", "vi_v4l2", &tegra_visp_clks[0], "vi", 0, 0, TEGRA210_CLK_ID_CXBUS_VI_V4L2_USER),
};
/* XUSB clocks */
/*
- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
#define TEGRA210_CLK_ID_CXBUS_VI_VIB_USER 373
#define TEGRA210_CLK_ID_CXBUS_ISP_ISPA_USER 374
#define TEGRA210_CLK_ID_CXBUS_ISP_ISPB_USER 375
+#define TEGRA210_CLK_ID_CXBUS_VI_V4L2_USER 376
/* IDs 376 ... 389 are reserved */
#define TEGRA210_CLK_ID_GBUS 390
#define TEGRA210_CLK_ID_GBUS_GM20B_USER 391