arm: tegra: fix strapping register offset

Fix strapping register offset and length for
T124/T132.

Bug 1515120

Change-Id: I2ac07667f58b4d99001e4d168adaec0cda9da62a
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/424631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 9d9837522167fb8c8cb8212f63f7097c3ef27ef5..79f222b47a5155a4a757de5a00330f3bae6518be 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -2419,10 +2419,13 @@ static int __init set_tegra_split_mem(char *options)
 early_param("tegra_split_mem", set_tegra_split_mem);
 
 #define FUSE_SKU_INFO       0x110
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC)
+#define STRAP_OPT 0x464
+#define RAM_ID_MASK (0xF << 4)
+#else
 #define STRAP_OPT 0x008
-#define GMI_AD0 BIT(4)
-#define GMI_AD1 BIT(5)
-#define RAM_ID_MASK (GMI_AD0 | GMI_AD1)
+#define RAM_ID_MASK (3 << 4)
+#endif
 #define RAM_CODE_SHIFT 4
 
 #ifdef CONFIG_TEGRA_PRE_SILICON_SUPPORT
@@ -2492,8 +2495,11 @@ static void tegra_set_chip_id(void)
 static void tegra_set_bct_strapping(void)
 {
        u32 reg;
-
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC)
+       reg = readl(IO_ADDRESS(TEGRA_PMC_BASE + STRAP_OPT));
+#else
        reg = readl(IO_ADDRESS(TEGRA_APB_MISC_BASE + STRAP_OPT));
+#endif
        tegra_chip_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
 }