arm64: p2595: add HDMI power tree for Jetson-e

Bug 200044360

Change-Id: I1624931d75d62bcd94828a1b6aad4d52e086086e
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/606626
(cherry picked from commit ae6c0b6eb470f7e6121f04402448f58c3cc1661a)
Reviewed-on: http://git-master/r/656654
Tested-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

diff --git a/arch/arm64/boot/dts/tegra210-jetson-e-p2595-0000-a00-00.dts b/arch/arm64/boot/dts/tegra210-jetson-e-p2595-0000-a00-00.dts
index d6a009f9d5ec97dd06acbfd844456e700ce9349a..7fa24371f5330054c51b5dd49eb974c590945646 100644 (file)
--- a/arch/arm64/boot/dts/tegra210-jetson-e-p2595-0000-a00-00.dts
+++ b/arch/arm64/boot/dts/tegra210-jetson-e-p2595-0000-a00-00.dts
@@ -147,6 +147,16 @@
                        nvidia,fb-bpp = <32>; /* bits per pixel */
                        nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
                };
+
+               /* tegradc.1 */
+               dc@54240000 {
+                       status = "okay";
+                       nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
+                       nvidia,emc-clk-rate = <300000000>;
+                       nvidia,fb-bpp = <32>; /* bits per pixel */
+                       nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
+               };
+
                dsi {
                        nvidia,dsi-controller-vs = <DSI_VS_1>;
                        status = "okay";

diff --git a/arch/arm64/boot/dts/tegra210-platforms/tegra210-power-tree-p2595-0000-a00.dtsi b/arch/arm64/boot/dts/tegra210-platforms/tegra210-power-tree-p2595-0000-a00.dtsi
index 782c245e49ce2cd66613322bba41c3266f7dcae1..381c56e4735c532f3a3ec094646f562ece9e9a10 100644 (file)
--- a/arch/arm64/boot/dts/tegra210-platforms/tegra210-power-tree-p2595-0000-a00.dtsi
+++ b/arch/arm64/boot/dts/tegra210-platforms/tegra210-power-tree-p2595-0000-a00.dtsi
@@ -130,6 +130,13 @@
                        vdd_lcd_bl-supply = <&vdd_3v3>;
                };
 
+               /* tegradc.1 */
+               dc@54240000 {
+                       avdd_hdmi-supply = <&max77620_ldo8>;    /* 1V05 */
+                       avdd_hdmi_pll-supply = <&max77620_sd3>; /* 1V8 */
+                       vdd_hdmi_5v0-supply = <&vdd_hdmi>;      /* 5V0 GPIO_PCC7 fixed reg */
+               };
+
                vi {
                        avdd_dsi_csi-supply = <&max77620_gpio7>;
                };