ARM: tegra: tn8 : Enable vdd_gpu rail through gpio

bug 1325148

Change-Id: If0e69954de531692e3b714848868968ac76aa18f
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/252838
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

diff --git a/arch/arm/mach-tegra/board-tn8-power.c b/arch/arm/mach-tegra/board-tn8-power.c
index f51a46e0764eca1e7c3502a09734a3af6fd49c0e..6f5925524651ffd545d5feea6c0b6726c2b42365 100644 (file)
--- a/arch/arm/mach-tegra/board-tn8-power.c
+++ b/arch/arm/mach-tegra/board-tn8-power.c
@@ -281,12 +281,13 @@ static struct regulator_init_data *tn8_reg_data[PALMAS_NUM_REGS] = {
        static struct palmas_reg_init reg_init_data_##_name = {         \
                .warm_reset = _warm_reset,                              \
                .roof_floor =   _roof_floor,                            \
+               .enable_gpio = -EINVAL,                                 \
                .mode_sleep = _mode_sleep,              \
                .vsel = _vsel,          \
        }
 
 PALMAS_REG_INIT(smps123, 0, PALMAS_EXT_CONTROL_ENABLE1, 0, 0);
-PALMAS_REG_INIT(smps45, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_ENABLE2, 0, 0);
 PALMAS_REG_INIT(smps6, 0, 0, 0, 0);
 PALMAS_REG_INIT(smps7, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0);
 PALMAS_REG_INIT(smps8, 0, 0, 0, 0);
@@ -415,6 +416,8 @@ int __init tn8_regulator_init(void)
        */
        reg_idata_smps45.constraints.init_uV = 1000000;
 
+       reg_init_data_smps45.enable_gpio = TEGRA_GPIO_PR5;
+
        i2c_register_board_info(4, palma_device,
                        ARRAY_SIZE(palma_device));
        return 0;