tegra: ictlr: correct the base address of init

 - The initilization of the mselect register was being done
   against the hier_ictlr register base address, instead of
   the mselect register base address. Correct the address
   to the mselect register base

Bug 1519537

Change-Id: I2de684e26ff21b4034ed5493a5991e31d01b75c1
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/426071
Reviewed-by: Todd Poynter <tpoynter@nvidia.com>
Tested-by: Todd Poynter <tpoynter@nvidia.com>

diff --git a/drivers/platform/tegra/hier_ictlr/hier_ictlr.c b/drivers/platform/tegra/hier_ictlr/hier_ictlr.c
index 077258071a10cb00951f64009907b4cff4a92f22..1859d9795886bf49549b33a0dcc0273bb68beb3d 100644 (file)
--- a/drivers/platform/tegra/hier_ictlr/hier_ictlr.c
+++ b/drivers/platform/tegra/hier_ictlr/hier_ictlr.c
@@ -136,7 +136,7 @@ static int tegra_hier_ictlr_mselect_init(struct platform_device *pdev,
                 (1 << MSELECT_CONFIG_0_WRITE_TIMEOUT_EN_SLAVE2_SHIFT) |
                 (1 << MSELECT_CONFIG_0_ERR_RESP_EN_SLAVE1_SHIFT)      |
                 (1 << MSELECT_CONFIG_0_ERR_RESP_EN_SLAVE2_SHIFT)),
-               ictlr->hier_ictlr_base + MSELECT_CONFIG_0);
+               ictlr->mselect_base + MSELECT_CONFIG_0);
 
        return 0;
 }