]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: dc: expose _tegra_dc_set_mode
authorDaniel Solomon <daniels@nvidia.com>
Mon, 20 Jan 2014 22:58:01 +0000 (14:58 -0800)
committerMitch Luban <mluban@nvidia.com>
Mon, 23 Mar 2015 18:22:52 +0000 (11:22 -0700)
The NVSR driver needs to be able to change
pixel clock as part of toggling burst mode.
The NVSR driver takes care of DC mutex
locking when calling this function.

Bug 1315461

Change-Id: Ia7edabc21f17e85a325aaae621cbf94e2b243d8d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/363524
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
drivers/video/tegra/dc/dc_priv.h
drivers/video/tegra/dc/mode.c

index 44984a84208eb415119b9a68604e1675d01007c0..9a27c589a1fd89e11ba9ff5e0e0475f3c21a9361 100644 (file)
@@ -516,6 +516,9 @@ int tegra_dc_calc_refresh(const struct tegra_dc_mode *m);
 int tegra_dc_calc_fb_refresh(const struct fb_videomode *fbmode);
 int tegra_dc_update_mode(struct tegra_dc *dc);
 
+/* defined in mode.c, used in nvsr.c */
+int _tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode);
+
 /* defined in clock.c, used in dc.c, rgb.c, dsi.c and hdmi.c */
 void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk);
 unsigned long tegra_dc_pclk_round_rate(struct tegra_dc *dc, int pclk);
index 106078c3844e5667dbd6765d6de4b2f4afe4d081..7921e97faf2188f9b74515768445e50e03c1371c 100644 (file)
@@ -506,7 +506,7 @@ int tegra_dc_get_panel_sync_rate(void)
 }
 EXPORT_SYMBOL(tegra_dc_get_panel_sync_rate);
 
-static int _tegra_dc_set_mode(struct tegra_dc *dc,
+int _tegra_dc_set_mode(struct tegra_dc *dc,
                                const struct tegra_dc_mode *mode)
 {
        struct tegra_dc_mode new_mode = *mode;