]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: host: remove unused function
authorDeepak Nibade <dnibade@nvidia.com>
Fri, 8 Nov 2013 15:27:11 +0000 (20:57 +0530)
committerTerje Bergstrom <tbergstrom@nvidia.com>
Tue, 12 Nov 2013 07:37:21 +0000 (23:37 -0800)
remove unused function nvhost_gr3d_read_reg() from gr3d.c

Bug 1380147

Change-Id: I9e43c813634355b4d5a402b42f53987d0cede1f6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/328349
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
drivers/video/tegra/host/gr3d/gr3d.c
drivers/video/tegra/host/gr3d/gr3d.h
drivers/video/tegra/host/t114/t114.c
drivers/video/tegra/host/t148/t148.c

index eda26d9e8c8845c86f7321f393a3338f2d249512..2a24962cb0859c947266f4e8530eb2ae0512db0f 100644 (file)
 #include "scale3d.h"
 #include "bus_client.h"
 #include "nvhost_channel.h"
-#include "nvhost_memmgr.h"
 #include "chip_support.h"
 #include "pod_scaling.h"
 #include "class_ids.h"
 #include "nvhost_job.h"
 
-int nvhost_gr3d_read_reg(
-       struct platform_device *dev,
-       struct nvhost_channel *channel,
-       struct nvhost_hwctx *hwctx,
-       u32 offset,
-       u32 *value)
-{
-       struct host1x_hwctx_handler *h = to_host1x_hwctx_handler(hwctx->h);
-       u32 syncpt_incrs = 1;
-       DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq);
-       void *ref;
-       void *read_waiter = NULL;
-       struct nvhost_job *job;
-       int err;
-       struct mem_handle *mem = NULL;
-       u32 *mem_ptr = NULL;
-       u32 *cmdbuf_ptr = NULL;
-       struct sg_table *mem_sgt = NULL;
-       struct mem_mgr *memmgr = hwctx->memmgr;
-       ulong user_id;
-       u32 opcodes[] = {
-               /* Switch to 3D - set up output to memory */
-               nvhost_opcode_setclass(NV_GRAPHICS_3D_CLASS_ID, 0, 0),
-               nvhost_opcode_imm(AR3D_GLOBAL_MEMORY_OUTPUT_READS, 1),
-               nvhost_opcode_nonincr(AR3D_DW_MEMORY_OUTPUT_ADDRESS, 1),
-               0xdeadbeef,
-               /* Get host1x to request a register read */
-               nvhost_opcode_setclass(NV_HOST1X_CLASS_ID,
-                               host1x_uclass_indoff_r(), 1),
-               nvhost_class_host_indoff_reg_read(
-                               host1x_uclass_indoff_indmodid_gr3d_v(),
-                               offset, false),
-               nvhost_opcode_imm(host1x_uclass_inddata_r(), 0),
-               /* send reg reads back to host */
-               nvhost_opcode_setclass(NV_GRAPHICS_3D_CLASS_ID, 0, 0),
-               nvhost_opcode_imm(AR3D_GLOBAL_MEMORY_OUTPUT_READS, 0),
-               /* Finalize with syncpt increment */
-               nvhost_opcode_setclass(NV_HOST1X_CLASS_ID,
-                               host1x_uclass_incr_syncpt_base_r(), 1),
-               nvhost_class_host_incr_syncpt_base(h->h.waitbase,
-                               1),
-               nvhost_opcode_imm_incr_syncpt(
-                               host1x_uclass_incr_syncpt_cond_immediate_v(),
-                               h->h.syncpt),
-       };
-
-       /* 12 slots for gather, and one slot for storing the result value */
-       mem = nvhost_memmgr_alloc(memmgr, sizeof(opcodes)+4,
-                       32, mem_mgr_flag_uncacheable, 0);
-       if (IS_ERR(mem))
-               return PTR_ERR(mem);
-
-       mem_ptr = nvhost_memmgr_mmap(mem);
-       if (!mem_ptr) {
-               err = -ENOMEM;
-               goto done;
-       }
-       cmdbuf_ptr = mem_ptr + 1;
-
-       mem_sgt = nvhost_memmgr_pin(memmgr, mem, &channel->dev->dev,
-                                                       mem_flag_none);
-       if (IS_ERR(mem_sgt)) {
-               err = -ENOMEM;
-               mem_sgt = NULL;
-               goto done;
-       }
-       /* Set address of target memory slot to the stream */
-       opcodes[3] = nvhost_memmgr_dma_addr(mem_sgt);
-
-       read_waiter = nvhost_intr_alloc_waiter();
-       if (!read_waiter) {
-               err = -ENOMEM;
-               goto done;
-       }
-
-       job = nvhost_job_alloc(channel, hwctx, 1, 0, 0, 1, memmgr);
-       if (!job) {
-               err = -ENOMEM;
-               goto done;
-       }
-
-       job->hwctx_syncpt_idx = 0;
-       job->sp->id = h->h.syncpt;
-       job->sp->waitbase = h->h.waitbase;
-       job->sp->incrs = syncpt_incrs;
-       job->num_syncpts = 1;
-       job->serialize = 1;
-       memcpy(cmdbuf_ptr, opcodes, sizeof(opcodes));
-
-#ifdef CONFIG_NVMAP_USE_FD_FOR_HANDLE
-       get_dma_buf((struct dma_buf *)mem);
-       user_id = dma_buf_fd((struct dma_buf *)mem, O_CLOEXEC);
-#else
-       user_id = nvhost_memmgr_handle_to_id(mem);
-#endif
-
-       /* Submit job */
-       nvhost_job_add_gather(job, user_id,
-                       ARRAY_SIZE(opcodes), 4, 0);
-
-       err = nvhost_job_pin(job, &nvhost_get_host(dev)->syncpt);
-       if (err)
-               goto done;
-
-#ifdef CONFIG_NVMAP_USE_FD_FOR_HANDLE
-       sys_close(user_id);
-#endif
-       err = nvhost_channel_submit(job);
-       if (err)
-               goto done;
-
-       /* Wait for read to be ready */
-       err = nvhost_intr_add_action(&nvhost_get_host(dev)->intr,
-                       h->h.syncpt, job->sp->fence,
-                       NVHOST_INTR_ACTION_WAKEUP, &wq,
-                       read_waiter,
-                       &ref);
-       read_waiter = NULL;
-       WARN(err, "Failed to set wakeup interrupt");
-       wait_event(wq,
-               nvhost_syncpt_is_expired(&nvhost_get_host(dev)->syncpt,
-                               h->h.syncpt, job->sp->fence));
-       nvhost_job_put(job);
-       job = NULL;
-       nvhost_intr_put_ref(&nvhost_get_host(dev)->intr, h->h.syncpt,
-                       ref);
-
-       *value = *mem_ptr;
-
-done:
-       kfree(read_waiter);
-       if (mem_ptr)
-               nvhost_memmgr_munmap(mem, mem_ptr);
-       if (mem_sgt)
-               nvhost_memmgr_unpin(memmgr, mem, &channel->dev->dev, mem_sgt);
-       if (mem)
-               nvhost_memmgr_put(memmgr, mem);
-       return err;
-}
 void nvhost_3dctx_restore_begin(struct host1x_hwctx_handler *p, u32 *ptr)
 {
        /* set class to host */
index 3650e03fdf3aa6c1ec07bdaf1b834d6ddc8fb90f..797b368d44f2f8dfe0f05af8b9217b84afb38d35 100644 (file)
@@ -3,7 +3,7 @@
  *
  * Tegra Graphics Host 3D
  *
- * Copyright (c) 2011-2013, NVIDIA Corporation.
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -58,11 +58,5 @@ void nvhost_3dctx_get(struct nvhost_hwctx *ctx);
 void nvhost_3dctx_free(struct kref *ref);
 void nvhost_3dctx_put(struct nvhost_hwctx *ctx);
 int nvhost_gr3d_prepare_power_off(struct platform_device *dev);
-int nvhost_gr3d_read_reg(
-       struct platform_device *dev,
-       struct nvhost_channel *channel,
-       struct nvhost_hwctx *hwctx,
-       u32 offset,
-       u32 *value);
 
 #endif
index 2e33d15448c4f517a38055c875045dd688c28fc4..6739e1d516665dfe8dabc76430b20ceabcd1ba8b 100644 (file)
@@ -141,7 +141,6 @@ struct nvhost_device_data t11_gr3d_info = {
        .prepare_poweroff = nvhost_gr3d_t114_prepare_power_off,
        .finalize_poweron = nvhost_gr3d_t114_finalize_power_on,
        .alloc_hwctx_handler = nvhost_gr3d_t114_ctxhandler_init,
-       .read_reg       = nvhost_gr3d_read_reg,
 };
 
 static struct platform_device tegra_gr3d03_device = {
index 8dbd61ed6fd81ac3f775af755096664c52e6d719..0fc5e39ef542d40c2479a50a9f29e2aa6f7518a2 100644 (file)
@@ -141,7 +141,6 @@ struct nvhost_device_data t14_gr3d_info = {
        .prepare_poweroff = nvhost_gr3d_t114_prepare_power_off,
        .finalize_poweron = nvhost_gr3d_t114_finalize_power_on,
        .alloc_hwctx_handler = nvhost_gr3d_t114_ctxhandler_init,
-       .read_reg       = nvhost_gr3d_read_reg,
 };
 
 static struct platform_device tegra_gr3d03_device = {