arm: tegra: tn8: 19X12 AUO backlight calibration

Change-Id: I9af971e286f1c8b58fa6e4c5db1513d3d0e480ec
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
Reviewed-on: http://git-master/r/383418
Reviewed-on: http://git-master/r/384685
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

diff --git a/arch/arm/mach-tegra/panel-a-1200-1920-8-0.c b/arch/arm/mach-tegra/panel-a-1200-1920-8-0.c
index 4dafc0f438e15298d4997f0c8606d9eaae2cafd7..281a349b03c489aa07ee3905c418b0db379ef7c7 100644 (file)
--- a/arch/arm/mach-tegra/panel-a-1200-1920-8-0.c
+++ b/arch/arm/mach-tegra/panel-a-1200-1920-8-0.c
@@ -97,38 +97,38 @@ static struct tegra_dc_sd_settings dsi_a_1200_1920_8_0_sd_settings = {
 };
 
 static tegra_dc_bl_output dsi_a_1200_1920_8_0_bl_output_measured = {
-       0, 0, 1, 2, 3, 4, 5, 6,
-       7, 8, 9, 9, 10, 11, 12, 13,
-       13, 14, 15, 16, 17, 17, 18, 19,
-       20, 21, 22, 22, 23, 24, 25, 26,
-       27, 27, 28, 29, 30, 31, 32, 32,
-       33, 34, 35, 36, 37, 37, 38, 39,
-       40, 41, 42, 42, 43, 44, 45, 46,
-       47, 48, 48, 49, 50, 51, 52, 53,
-       54, 55, 56, 57, 57, 58, 59, 60,
-       61, 62, 63, 64, 65, 66, 67, 68,
-       69, 70, 71, 71, 72, 73, 74, 75,
-       76, 77, 77, 78, 79, 80, 81, 82,
-       83, 84, 85, 87, 88, 89, 90, 91,
-       92, 93, 94, 95, 96, 97, 98, 99,
-       100, 101, 102, 103, 104, 105, 106, 107,
-       108, 109, 110, 111, 112, 113, 115, 116,
-       117, 118, 119, 120, 121, 122, 123, 124,
-       125, 126, 127, 128, 129, 130, 131, 132,
-       133, 134, 135, 136, 137, 138, 139, 141,
-       142, 143, 144, 146, 147, 148, 149, 151,
-       152, 153, 154, 155, 156, 157, 158, 158,
-       159, 160, 161, 162, 163, 165, 166, 167,
-       168, 169, 170, 171, 172, 173, 174, 176,
-       177, 178, 179, 180, 182, 183, 184, 185,
-       186, 187, 188, 189, 190, 191, 192, 194,
-       195, 196, 197, 198, 199, 200, 201, 202,
-       203, 204, 205, 206, 207, 208, 209, 210,
-       211, 212, 213, 214, 215, 216, 217, 219,
-       220, 221, 222, 224, 225, 226, 227, 229,
-       230, 231, 232, 233, 234, 235, 236, 238,
-       239, 240, 241, 242, 243, 244, 245, 246,
-       247, 248, 249, 250, 251, 252, 253, 255
+       0, 1, 2, 4, 5, 6, 7, 8,
+       10, 11, 12, 13, 14, 15, 16, 18,
+       19, 20, 21, 22, 23, 24, 25, 26,
+       27, 29, 30, 31, 32, 33, 34, 35,
+       36, 38, 39, 40, 41, 42, 44, 45,
+       46, 47, 48, 49, 50, 52, 53, 54,
+       55, 56, 57, 58, 59, 61, 62, 63,
+       64, 65, 67, 68, 69, 70, 71, 72,
+       73, 75, 76, 77, 78, 79, 80, 81,
+       82, 83, 84, 85, 86, 87, 88, 89,
+       90, 91, 92, 93, 94, 96, 97, 98,
+       99, 100, 101, 102, 103, 104, 105, 106,
+       107, 108, 109, 110, 111, 112, 112, 113,
+       114, 115, 115, 116, 117, 117, 118, 119,
+       120, 122, 123, 124, 125, 126, 128, 129,
+       130, 131, 132, 133, 134, 135, 135, 136,
+       137, 138, 139, 140, 141, 142, 143, 145,
+       146, 147, 148, 149, 150, 151, 152, 153,
+       154, 155, 156, 157, 158, 159, 160, 161,
+       161, 162, 163, 164, 164, 165, 166, 166,
+       167, 168, 169, 170, 171, 173, 174, 175,
+       176, 177, 178, 179, 180, 181, 182, 183,
+       183, 184, 185, 186, 187, 188, 189, 189,
+       190, 191, 192, 193, 193, 194, 195, 196,
+       197, 198, 199, 200, 200, 201, 202, 203,
+       204, 205, 206, 207, 208, 209, 210, 211,
+       212, 213, 214, 216, 217, 218, 219, 220,
+       221, 222, 223, 224, 225, 226, 227, 228,
+       229, 230, 231, 232, 233, 234, 235, 235,
+       236, 237, 238, 239, 240, 241, 242, 243,
+       244, 245, 247, 248, 249, 250, 251, 251,
+       252, 252, 253, 253, 254, 254, 255, 255,
 };
 
 static struct tegra_dsi_cmd dsi_a_1200_1920_8_0_init_cmd[] = {