]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
arm: tegra14x: bb: override DSR when EMC floor is set
authorVinayak Pane <vpane@nvidia.com>
Mon, 29 Apr 2013 23:07:59 +0000 (16:07 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:11:49 +0000 (13:11 -0700)
Dynamic Self Refresh (DSR) feature in EMC affects BBC's latency.
Override DSR when min EMC frequency is set and enable it
when BBC becomes idle.

Change-Id: I8554910c62bc35a2887e6ed2e49b3240944028dc
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/224045
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
arch/arm/mach-tegra/tegra_bb.c

index e27d2ffb8cc2a015ecd9b968827f772b24747eeb..5e4c1750fc33b09e8532d57875476362bdd35889 100644 (file)
@@ -37,6 +37,7 @@
 #include "clock.h"
 #include "iomap.h"
 #include "sleep.h"
+#include "tegra_emc.h"
 
 /* BB mailbox offset */
 #define TEGRA_BB_REG_MAILBOX (0x0)
@@ -889,6 +890,7 @@ static void tegra_bb_emc_dvfs(struct work_struct *work)
 
                /* going from 0 to high */
                clk_prepare_enable(bb->emc_clk);
+               tegra_emc_dsr_override(TEGRA_EMC_DSR_OVERRIDE);
                clk_set_rate(bb->emc_clk, BBC_MC_MIN_FREQ);
                pr_debug("bbc setting floor to %d\n", BBC_MC_MIN_FREQ/1000000);
 
@@ -903,6 +905,7 @@ static void tegra_bb_emc_dvfs(struct work_struct *work)
                spin_unlock_irqrestore(&bb->lock, flags);
 
                /* going from high to 0 */
+               tegra_emc_dsr_override(TEGRA_EMC_DSR_NORMAL);
                clk_set_rate(bb->emc_clk, 0);
                clk_disable_unprepare(bb->emc_clk);
                pr_debug("bbc removing emc floor\n");