]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: dc: check power-gate status
authorBharat Nihalani <bnihalani@nvidia.com>
Mon, 2 Dec 2013 05:17:10 +0000 (10:47 +0530)
committerBharat Nihalani <bnihalani@nvidia.com>
Sat, 7 Dec 2013 04:18:26 +0000 (20:18 -0800)
Add a WARN if DC is power-gated in read or write operation.

Bug 1407372

Change-Id: Ie640adb79a96d3bea087838b1bdc0fd3e1b7c314
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/335637
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
drivers/video/tegra/dc/dc_priv.h

index 7ec7807aba354767fb492c88ba87f226194041d3..eb512e6db04d1a925d265227437afbb96cf6596b 100644 (file)
@@ -58,8 +58,11 @@ static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
        unsigned long ret;
 
        BUG_ON(!nvhost_module_powered_ext(dc->ndev));
-       if (!tegra_is_clk_enabled(dc->clk))
-               WARN(1, "DC is clock-gated.\n");
+
+       if (WARN(!tegra_is_clk_enabled(dc->clk), "DC is clock-gated.\n") ||
+               WARN(!tegra_powergate_is_powered(dc->powergate_id),
+                       "DC is power-gated.\n"))
+               return 0;
 
        ret = readl(dc->base + reg * 4);
        trace_display_readl(dc, ret, dc->base + reg * 4);
@@ -70,8 +73,11 @@ static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long val,
                                   unsigned long reg)
 {
        BUG_ON(!nvhost_module_powered_ext(dc->ndev));
-       if (!tegra_is_clk_enabled(dc->clk))
-               WARN(1, "DC is clock-gated.\n");
+
+       if (WARN(!tegra_is_clk_enabled(dc->clk), "DC is clock-gated.\n") ||
+               WARN(!tegra_powergate_is_powered(dc->powergate_id),
+                       "DC is power-gated.\n"))
+               return;
 
        trace_display_writel(dc, val, dc->base + reg * 4);
        writel(val, dc->base + reg * 4);