]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
dvfs: tegra: Avoid CL-DVFS driver read command line
authorAlex Frid <afrid@nvidia.com>
Tue, 21 Apr 2015 03:18:30 +0000 (20:18 -0700)
committerAleksandr Frid <afrid@nvidia.com>
Fri, 24 Apr 2015 17:43:25 +0000 (10:43 -0700)
Removed from CL-DVFS driver direct read of CPU DFLL boot rate parameter
in kernel command line. Instead passed boot rate via DFLL data in safe
DVFS structure.

Bug 200085579

Change-Id: I2025b7245ae2773720b21a1cf1e8b75d9c992636
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/733949
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
drivers/platform/tegra/tegra12_dvfs.c
drivers/platform/tegra/tegra_cl_dvfs.c
include/linux/platform/tegra/dvfs.h

index bd8b1ab51863ac9089e9ab62e2e7a14190d9669f..16c3cc589482ecf60186fa59f96279a1f0e7d331 100644 (file)
@@ -1230,8 +1230,10 @@ static int __init set_cpu_dvfs_data(unsigned long max_freq,
         * If boot loader has set dfll clock, then dfll freq is
         * passed in kernel command line from bootloader
         */
-       if (tegra_dfll_boot_req_khz())
+       if (tegra_dfll_boot_req_khz()) {
+               cpu_dvfs->dfll_data.dfll_boot_khz = tegra_dfll_boot_req_khz();
                rail->dfll_mode = true;
+       }
 
        return 0;
 }
index 609559c1b28dd5e7f14c51ee8d5a0b83c82f048f..d00f9f31376eefcd060ca6d395f04a1a0bdb952a 100644 (file)
@@ -1818,7 +1818,13 @@ static int cl_dvfs_sync(struct tegra_cl_dvfs *cld)
        u32 val;
        int status;
        unsigned long int rate;
-       unsigned long int dfll_boot_req_khz = tegra_dfll_boot_req_khz();
+       unsigned long int dfll_boot_req_khz =
+               cld->safe_dvfs->dfll_data.dfll_boot_khz;
+
+       if (!dfll_boot_req_khz) {
+               pr_err("%s: Failed to sync DFLL boot rate\n", __func__);
+               return -EINVAL;
+       }
 
        output_enable(cld);
 
index c4a665fd68e096f28716979808ce7711d0ededb6..bc009d0c30399c9e7f875fb692b96fc273ea693a 100644 (file)
@@ -162,10 +162,14 @@ struct dvfs_dfll_data {
        u32             tune0_simon_mask;
        u32             tune1;
        bool            tune0_low_at_cold;
+
        unsigned long   droop_rate_min;
        unsigned long   use_dfll_rate_min;
        unsigned long   out_rate_min;
        unsigned long   max_rate_boost;
+       /* Boot frequency if DFLL is enabled by boot-loader; zero otherwise */
+       unsigned long   dfll_boot_khz;
+
        int tune_high_min_millivolts;
        int tune_high_margin_mv;
        int min_millivolts;