]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
mmc: host: add transfer mode register fields.
authorShridhar Rasal <srasal@nvidia.com>
Tue, 7 May 2013 05:32:06 +0000 (11:02 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:25:58 +0000 (13:25 -0700)
With SD4.0 controller supports response check error.
Which helps for debugging and to avoid overhead of
response error check from driver side.
Adding respective bits for transfer mode register.

bug 1276024

Change-Id: I147dbab05cfc831cd1096712896563ced5e328c4
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/226015
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
drivers/mmc/host/sdhci.h

index f7f8682abe69625eb47cf9c471ce86d7ad185851..086047cade36c3d30c918e2889a809b3b3cded40 100644 (file)
@@ -42,6 +42,9 @@
 #define  SDHCI_TRNS_AUTO_CMD23 0x08
 #define  SDHCI_TRNS_READ       0x10
 #define  SDHCI_TRNS_MULTI      0x20
+#define  SDHCI_TRNS_RESP_TYPE  0x40
+#define  SDHCI_TRNS_ERR_CHECK  0x80
+#define  SDHCI_TRNS_RES_INT_DIS        0x100
 
 #define SDHCI_COMMAND          0x0E
 #define  SDHCI_CMD_RESP_MASK   0x03