This patch permits changing of the current CSC coefficients. It cannot be used
with interlaced mode.
Adds fields to skip window CSC programming if nothing has changed.
Bug
1522546
Change-Id: If8fc6a5d634e4b300ef0de6a5913188fe1f1efb0
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/422885
(cherry picked from commit
4aa22cd32362f0d91ef030bc0942c303714141cf)
Reviewed-on: http://git-master/r/425986
GVS: Gerrit_Virtual_Submit
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Tested-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
unsigned z;
struct tegra_dc_csc csc;
+ bool csc_dirty;
int dirty;
int underflows;
}
}
+ if (data->win[i].attr.flags
+ & TEGRA_DC_EXT_FLIP_FLAG_UPDATE_CSC) {
+ win->csc.yof = data->win[i].attr.csc.yof;
+ win->csc.kyrgb = data->win[i].attr.csc.kyrgb;
+ win->csc.kur = data->win[i].attr.csc.kur;
+ win->csc.kug = data->win[i].attr.csc.kug;
+ win->csc.kub = data->win[i].attr.csc.kub;
+ win->csc.kvr = data->win[i].attr.csc.kvr;
+ win->csc.kvg = data->win[i].attr.csc.kvg;
+ win->csc.kvb = data->win[i].attr.csc.kvb;
+ win->csc_dirty = true;
+ }
+
if (!skip_flip)
tegra_dc_ext_set_windowattr(ext, win, &data->win[i]);
win_options |= INTERLACE_ENABLE;
}
#endif
+ if (dc_win->csc_dirty) {
+ tegra_dc_set_csc(dc, &dc_win->csc);
+ dc_win->csc_dirty = false;
+ }
+
tegra_dc_writel(dc, win_options, DC_WIN_WIN_OPTIONS);
dc_win->dirty = no_vsync ? 0 : 1;
#define TEGRA_DC_EXT_FLIP_FLAG_BLOCKLINEAR (1 << 5)
#define TEGRA_DC_EXT_FLIP_FLAG_SCAN_COLUMN (1 << 6)
#define TEGRA_DC_EXT_FLIP_FLAG_INTERLACE (1 << 7)
+#define TEGRA_DC_EXT_FLIP_FLAG_UPDATE_CSC (1 << 9)
struct tegra_timespec {
__s32 tv_sec; /* seconds */
/* log2(blockheight) for blocklinear format */
__u8 block_height_log2;
__u8 pad1[2];
- __u32 offset2;
- __u32 offset_u2;
- __u32 offset_v2;
- /* Leave some wiggle room for future expansion */
- __u32 pad2[1];
+ union { /* fields for mutually exclusive options */
+ struct { /* TEGRA_DC_EXT_FLIP_FLAG_INTERLACE */
+ __u32 offset2;
+ __u32 offset_u2;
+ __u32 offset_v2;
+ __u32 pad2[1];
+ };
+ struct { /* TEGRA_DC_EXT_FLIP_FLAG_UPDATE_CSC */
+ __u16 yof; /* s.7.0 */
+ __u16 kyrgb; /* 2.8 */
+ __u16 kur; /* s.2.8 */
+ __u16 kvr; /* s.2.8 */
+ __u16 kug; /* s.1.8 */
+ __u16 kvg; /* s.1.8 */
+ __u16 kub; /* s.2.8 */
+ __u16 kvb; /* s.2.8 */
+ } csc;
+ };
};
#define TEGRA_DC_EXT_FLIP_N_WINDOWS 3