]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
Revert "gpu: nvgpu: Disable channel when updating SMPC WAR"
authorTerje Bergstrom <tbergstrom@nvidia.com>
Mon, 18 May 2015 15:36:05 +0000 (08:36 -0700)
committerTerje Bergstrom <tbergstrom@nvidia.com>
Mon, 18 May 2015 15:36:25 +0000 (08:36 -0700)
This reverts commit 6cabe69b7b9e5767ae0305961cfba4f72f029807.

Change-Id: I00bfb83038e659a3caaf8a5549039d025417cd1c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/743858

drivers/gpu/nvgpu/gk20a/gr_gk20a.c

index 836760a5611bc1739752ee562c521bfeb217c6f0..36444b484a66baa56b274bdfbc575a1ab18d9a86 100644 (file)
@@ -1566,15 +1566,6 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
        struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx;
        void *ctx_ptr = NULL;
        u32 data;
-       int ret;
-
-       c->g->ops.fifo.disable_channel(c);
-       ret = c->g->ops.fifo.preempt_channel(c->g, c->hw_chid);
-       if (ret) {
-               gk20a_err(dev_from_gk20a(g),
-                       "failed to preempt channel\n");
-               return ret;
-       }
 
        /* Channel gr_ctx buffer is gpu cacheable.
           Flush and invalidate before cpu update. */
@@ -1596,11 +1587,6 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
 
        vunmap(ctx_ptr);
 
-       /* enable channel */
-       gk20a_writel(c->g, ccsr_channel_r(c->hw_chid),
-               gk20a_readl(c->g, ccsr_channel_r(c->hw_chid)) |
-               ccsr_channel_enable_set_true_f());
-
        return 0;
 }