mfd: palmas: Add SIM support

Add support for SIM1 and SIM2 IRQs which are part of the INT6 group.
Also add the SIM platform data definition.

Bug 1262965

Change-Id: Ia95837fae78c5fe0ea34087fd765a9ed8602e724
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/217400
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index 38e48c871968f1f5ff3ac0e651257a11174db38a..9285613a9beb980189b321112f099a37ba001120 100644 (file)
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -46,7 +46,8 @@ enum palmas_ids {
        PALMAS_USB_ID,
        PALMAS_EXTCON_ID,
        PALMAS_BATTERY_GAUGE_ID,
-       PALMAS_CHARGER_ID
+       PALMAS_CHARGER_ID,
+       PALMAS_SIM_ID,
 };
 
 static struct resource palmas_rtc_resources[] = {
@@ -120,6 +121,10 @@ static const struct mfd_cell palmas_children[] = {
                .name = "palmas-charger",
                .id = PALMAS_CHARGER_ID,
        },
+       {
+               .name = "palmas-sim",
+               .id = PALMAS_SIM_ID,
+       },
 };
 
 static bool is_volatile_palma_func_reg(struct device *dev, unsigned int reg)
@@ -185,6 +190,7 @@ static struct palmas_irq_regs palmas_irq_regs = {
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT3_MASK),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_MASK),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_MASK),
+               PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT6_MASK),
        },
        .status_reg = {
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT1_STATUS),
@@ -192,6 +198,7 @@ static struct palmas_irq_regs palmas_irq_regs = {
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT3_STATUS),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_STATUS),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_STATUS),
+               PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT6_STATUS),
        },
        .edge_reg = {
                PALMAS_REGS(PALMAS_INTERRUPT_BASE,
@@ -210,6 +217,10 @@ static struct palmas_irq_regs palmas_irq_regs = {
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_EDGE_DETECT2),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_EDGE_DETECT1),
                PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_EDGE_DETECT2),
+               PALMAS_REGS(PALMAS_INTERRUPT_BASE,
+                                       PALMAS_INT6_EDGE_DETECT1_RESERVED),
+               PALMAS_REGS(PALMAS_INTERRUPT_BASE,
+                                       PALMAS_INT6_EDGE_DETECT2_RESERVED),
        },
 };
 
@@ -311,6 +322,9 @@ static struct palmas_irq palmas_irqs[] = {
        PALMAS_IRQ(GPIO_15_IRQ, INT5_STATUS_GPIO_15, 4,
                        PALMAS_INT5_EDGE_DETECT2_GPIO_15_RISING,
                        PALMAS_INT5_EDGE_DETECT2_GPIO_15_FALLING, 9),
+       /* INT6 IRQs */
+       PALMAS_IRQ(SIM1_IRQ, INT6_STATUS_SIM1, 5, 0, 0, 0),
+       PALMAS_IRQ(SIM2_IRQ, INT6_STATUS_SIM2, 5, 0, 0, 0),
 };
 
 struct palmas_irq_chip_data {

diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index a504c6691bed6498750575ffc5537de9a4aa8f4f..207e879c559f3e261d59e687de7fed5ff57d8741 100644 (file)
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -507,6 +507,18 @@ struct palmas_battery_platform_data {
        int is_battery_present;
 };
 
+struct palmas_sim_platform_data {
+       unsigned dbcnt:5;
+       unsigned pwrdncnt:5;
+       unsigned pwrdnen1:1;
+       unsigned pwrdnen2:1;
+       unsigned det_polarity:1;
+       unsigned det1_pu:1;
+       unsigned det1_pd:1;
+       unsigned det2_pu:1;
+       unsigned det2_pd:1;
+};
+
 struct palmas_platform_data {
        int irq_flags;
        int gpio_base;
@@ -522,6 +534,7 @@ struct palmas_platform_data {
        struct palmas_clk_platform_data *clk_pdata;
        struct palmas_rtc_platform_data *rtc_pdata;
        struct palmas_battery_platform_data *battery_pdata;
+       struct palmas_sim_platform_data *sim_pdata;
 
        struct palmas_clk32k_init_data  *clk32k_init_data;
        int clk32k_init_data_size;
@@ -625,6 +638,8 @@ enum palmas_irqs {
        PALMAS_GPIO_15_IRQ,
        /* INT6 interrupts */
        PALMAS_CHARGER_IRQ,
+       PALMAS_SIM1_IRQ,
+       PALMAS_SIM2_IRQ,
        /* INT7 interrupts */
        PALMAS_BAT_TEMP_FAULT_IRQ,
        /* Total Number IRQs */
@@ -747,6 +762,7 @@ enum usb_irq_events {
 #define PALMAS_SMPS_BASE                                       0x120
 #define PALMAS_LDO_BASE                                                0x150
 #define PALMAS_DVFS_BASE                                       0x180
+#define PALMAS_SIMCARD_BASE                                    0X19E
 #define PALMAS_PMU_CONTROL_BASE                                        0x1A0
 #define PALMAS_RESOURCE_BASE                                   0x1D4
 #define PALMAS_PU_PD_OD_BASE                                   0x1F0
@@ -1679,6 +1695,30 @@ enum usb_irq_events {
 #define DVFS_MAX_VOLTAGE_UV                                    1650000
 #define DVFS_VOLTAGE_STEP_UV                                   10000
 
+/* Registers for function SIMCARD Func */
+#define PALMAS_SIM_DEBOUNCE                                    0x0
+#define PALMAS_SIM_PWR_DOWN                                    0x1
+
+/* Bit definitions for SIM_DEBOUNCE */
+#define PALMAS_SIM_DEBOUNCE_SIM2_IR                            0x80
+#define PALMAS_SIM_DEBOUNCE_SIM2_IR_SHIFT                      7
+#define PALMAS_SIM_DEBOUNCE_SIM1_IR                            0x40
+#define PALMAS_SIM_DEBOUNCE_SIM1_IR_SHIFT                      6
+#define PALMAS_SIM_DEBOUNCE_SIM_DET1_PIN_STATE                 0x20
+#define PALMAS_SIM_DEBOUNCE_SIM_DET1_PIN_STATE_SHIFT           5
+#define PALMAS_SIM_DEBOUNCE_DBCNT_MASK                         0x1F
+#define PALMAS_SIM_DEBOUNCE_DBCNT_SHIFT                                0
+
+/* Bit definitions for SIM_PWR_DOWN */
+#define PALMAS_SIM_PWR_DOWN_PWRDNEN2                           0x80
+#define PALMAS_SIM_PWR_DOWN_PWRDNEN2_SHIFT                     7
+#define PALMAS_SIM_PWR_DOWN_PWRDNEN1                           0x40
+#define PALMAS_SIM_PWR_DOWN_PWRDNEN1_SHIFT                     6
+#define PALMAS_SIM_PWR_DOWN_SIM_DET2_PIN_STATE                 0x20
+#define PALMAS_SIM_PWR_DOWN_SIM_DET2_PIN_STATE_SHIFT           5
+#define PALMAS_SIM_PWR_DOWN_PWRDNCNT_MASK                      0x1F
+#define PALMAS_SIM_PWR_DOWN_PWRDNCNT_SHIFT                     0
+
 /* Registers for function PMU_CONTROL */
 #define PALMAS_DEV_CTRL                                                0x0
 #define PALMAS_POWER_CTRL                                      0x1
@@ -2286,6 +2326,7 @@ enum usb_irq_events {
 #define PALMAS_PU_PD_INPUT_CTRL1                               0x4
 #define PALMAS_PU_PD_INPUT_CTRL2                               0x5
 #define PALMAS_PU_PD_INPUT_CTRL3                               0x6
+#define PALMAS_PU_PD_INPUT_CTRL5                               0x7
 #define PALMAS_OD_OUTPUT_CTRL                                  0x8
 #define PALMAS_POLARITY_CTRL                                   0x9
 #define PALMAS_PRIMARY_SECONDARY_PAD1                          0xA
@@ -2307,6 +2348,10 @@ enum usb_irq_events {
 #define PALMAS_OD_OUTPUT_CTRL2_OD_REGEN1                       0x01
 #define PALMAS_OD_OUTPUT_CTRL2_OD_REGEN1_SHIFT                 0
 
+/* Bit definitions for POLARITY_CTRL2 */
+#define PALMAS_POLARITY_CTRL2_DET_POLARITY                     0x01
+#define PALMAS_POLARITY_CTRL2_DET_POLARITY_SHIFT               0
+
 /* Bit definitions for PU_PD_INPUT_CTRL1 */
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD                   0x40
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT             6
@@ -2343,6 +2388,16 @@ enum usb_irq_events {
 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD                    0x01
 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT              0
 
+/* Bit definitions for PU_PD_INPUT_CTRL5 */
+#define PALMAS_PU_PD_INPUT_CTRL5_DET2_PU                       0x80
+#define PALMAS_PU_PD_INPUT_CTRL5_DET2_PU_SHIFT                 7
+#define PALMAS_PU_PD_INPUT_CTRL5_DET2_PD                       0x40
+#define PALMAS_PU_PD_INPUT_CTRL5_DET2_PD_SHIFT                 6
+#define PALMAS_PU_PD_INPUT_CTRL5_DET1_PU                       0x20
+#define PALMAS_PU_PD_INPUT_CTRL5_DET1_PU_SHIFT                 5
+#define PALMAS_PU_PD_INPUT_CTRL5_DET1_PD                       0x10
+#define PALMAS_PU_PD_INPUT_CTRL5_DET1_PD_SHIFT                 4
+
 /* Bit definitions for OD_OUTPUT_CTRL */
 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD                         0x80
 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT                   7
@@ -2476,8 +2531,8 @@ enum usb_irq_events {
 #define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT                    0
 
 /* Maximum INT mask/edge regsiter */
-#define PALMAS_MAX_INTERRUPT_MASK_REG                          5
-#define PALMAS_MAX_INTERRUPT_EDGE_REG                          10
+#define PALMAS_MAX_INTERRUPT_MASK_REG                          6
+#define PALMAS_MAX_INTERRUPT_EDGE_REG                          12
 
 /* Registers for function INTERRUPT */
 #define PALMAS_INT1_STATUS                                     0x0