- make use of read only flag from smmu while loading firmwares
- to enable this first add extra parameter 'rw_flag' to function
nvhost_memmgr_pin() and nvhost_nvmap_pin() to pass read-write flag
- nvhost_nvmap_pin() will then set appropriate attributes based on
the flag passed
- below are the available flags which can be passed
mem_flag_none : do not mark anything
mem_flag_read_only : mark read only
mem_flag_write_only : mark write only
- make use of 'mem_flag_read_only' for MSENC, TSEC and VIC firmwares
by passing this parameter from below :
msenc_read_ucode()
vic03_read_ucode()
tsec_read_ucode()
- add 'mem_flag_none' in all other calls to nvhost_memmgr_pin()
Bug
1309863
Change-Id: I7c3d3525e403fd46921a30502f70e79ecf74fca8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/274282
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
gr->compbit_store.mem.sgt =
nvhost_memmgr_pin(memmgr, gr->compbit_store.mem.ref,
- dev_from_gk20a(g));
+ dev_from_gk20a(g), mem_flag_none);
if (IS_ERR(gr->compbit_store.mem.sgt)) {
ret = PTR_ERR(gr->compbit_store.mem.sgt);
goto clean_up;
memset(va, 0, len);
nvhost_memmgr_munmap(r, va);
- *sgt = nvhost_memmgr_pin(client, r, dev_from_vm(vm));
+ *sgt = nvhost_memmgr_pin(client, r, dev_from_vm(vm), mem_flag_none);
if (IS_ERR(*sgt)) {
*sgt = NULL;
goto err_alloced;
}
/* pin buffer to get phys/iovmm addr */
- bfr.sgt = nvhost_memmgr_pin(memmgr, r, d);
+ bfr.sgt = nvhost_memmgr_pin(memmgr, r, d, mem_flag_none);
if (IS_ERR(bfr.sgt)) {
/* Falling back to physical is actually possible
* here in many cases if we use 4K phys pages in the
ctx->restore_virt = NULL;
ctx->restore_sgt = nvhost_memmgr_pin(memmgr, ctx->restore,
- &ch->dev->dev);
+ &ch->dev->dev, mem_flag_none);
if (IS_ERR(ctx->restore_sgt))
goto fail_pin;
ctx->restore_phys = nvhost_memmgr_dma_addr(ctx->restore_sgt);
*
* Tegra Graphics Host 3d hardware context
*
- * Copyright (c) 2011-2013 NVIDIA Corporation.
+ * Copyright (c) 2011-2013 NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
if (!save_ptr)
goto fail_mmap;
- p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev);
+ p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev,
+ mem_flag_none);
if (IS_ERR(p->save_sgt))
goto fail_pin;
p->save_phys = nvhost_memmgr_dma_addr(p->save_sgt);
*
* Tegra Graphics Host 3D for Tegra2
*
- * Copyright (c) 2010-2013, NVIDIA Corporation.
+ * Copyright (c) 2010-2013, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
if (!save_ptr)
goto fail_mmap;
- p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev);
+ p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev,
+ mem_flag_none);
if (IS_ERR(p->save_sgt))
goto fail_pin;
p->save_phys = nvhost_memmgr_dma_addr(p->save_sgt);
*
* Tegra Graphics Host 3D for Tegra3
*
- * Copyright (c) 2011-2013 NVIDIA Corporation.
+ * Copyright (c) 2011-2013 NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
if (!save_ptr)
goto fail_mmap;
- p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev);
+ p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev,
+ mem_flag_none);
if (IS_ERR(p->save_sgt))
goto fail_pin;
p->save_phys = nvhost_memmgr_dma_addr(p->save_sgt);
}
cmdbuf_ptr = mem_ptr + 1;
- mem_sgt = nvhost_memmgr_pin(memmgr, mem, &channel->dev->dev);
+ mem_sgt = nvhost_memmgr_pin(memmgr, mem, &channel->dev->dev,
+ mem_flag_none);
if (IS_ERR(mem_sgt)) {
err = -ENOMEM;
mem_sgt = NULL;
*
* Tegra Graphics Host Command DMA
*
- * Copyright (c) 2010-2013, NVIDIA Corporation.
+ * Copyright (c) 2010-2013, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
/* pin pushbuffer and get physical address */
pb->sgt = nvhost_memmgr_pin(mgr, pb->mem,
- &cdma_to_dev(cdma)->dev->dev);
+ &cdma_to_dev(cdma)->dev->dev, mem_flag_none);
if (IS_ERR(pb->sgt)) {
err = PTR_ERR(pb->sgt);
pb->sgt = 0;
goto fail_mmap;
ctx->restore_sgt = nvhost_memmgr_pin(memmgr, ctx->restore,
- &ch->dev->dev);
+ &ch->dev->dev, mem_flag_none);
if (IS_ERR(ctx->restore_sgt))
goto fail_pin;
ctx->restore_phys = sg_dma_address(ctx->restore_sgt->sgl);
if (!save_ptr)
goto fail_mmap;
- p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev);
+ p->save_sgt = nvhost_memmgr_pin(memmgr, p->save_buf, &ch->dev->dev,
+ mem_flag_none);
if (IS_ERR(p->save_sgt))
goto fail_pin;
p->save_phys = sg_dma_address(p->save_sgt->sgl);
}
m->pa = nvhost_memmgr_pin(nvhost_get_host(dev)->memmgr, m->mem_r,
- &dev->dev);
+ &dev->dev, mem_flag_read_only);
if (IS_ERR(m->pa)) {
dev_err(&dev->dev, "nvmap pin failed for ucode");
err = PTR_ERR(m->pa);
}
struct sg_table *nvhost_memmgr_pin(struct mem_mgr *mgr,
- struct mem_handle *handle, struct device *dev)
+ struct mem_handle *handle, struct device *dev, int rw_flag)
{
switch (nvhost_memmgr_type((u32)((uintptr_t)handle))) {
#ifdef CONFIG_TEGRA_GRHOST_USE_NVMAP
case mem_mgr_type_nvmap:
- return nvhost_nvmap_pin(mgr, handle, dev);
+ return nvhost_nvmap_pin(mgr, handle, dev, rw_flag);
break;
#endif
#ifdef CONFIG_TEGRA_GRHOST_USE_DMABUF
if (IS_ERR(h))
return -EINVAL;
- sgt = nvhost_memmgr_pin(mgr, h, &dev->dev);
+ sgt = nvhost_memmgr_pin(mgr, h, &dev->dev, mem_flag_none);
if (IS_ERR(sgt))
return PTR_ERR(sgt);
mem_mgr_flag_write_combine = 1,
};
+enum mem_rw_flag {
+ mem_flag_none = 0,
+ mem_flag_read_only = 1,
+ mem_flag_write_only = 2,
+};
+
enum mem_mgr_type {
mem_mgr_type_nvmap = 0,
mem_mgr_type_dmabuf = 1,
void nvhost_memmgr_put(struct mem_mgr *mgr, struct mem_handle *handle);
struct sg_table *nvhost_memmgr_pin(struct mem_mgr *,
struct mem_handle *handle,
- struct device *dev);
+ struct device *dev,
+ int rw_flag);
void nvhost_memmgr_unpin(struct mem_mgr *mgr,
struct mem_handle *handle, struct device *dev,
struct sg_table *sgt);
struct sg_table *nvhost_nvmap_pin(struct mem_mgr *mgr,
struct mem_handle *handle,
- struct device *dev)
+ struct device *dev,
+ int rw_flag)
{
struct nvmap_handle_ref *ref = (struct nvmap_handle_ref *)handle;
struct nvmap_client *nvmap = (struct nvmap_client *)mgr;
DEFINE_DMA_ATTRS(attrs);
dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs);
+ if (rw_flag == mem_flag_read_only)
+ dma_set_attr(DMA_ATTR_READ_ONLY, &attrs);
+ else if (rw_flag == mem_flag_write_only)
+ dma_set_attr(DMA_ATTR_WRITE_ONLY, &attrs);
+
ents = dma_map_sg_attrs(dev, sgt->sgl, sgt->nents, 0, &attrs);
if (!ents) {
mutex_unlock(&priv->lock);
size_t size, size_t align, int flags, unsigned int heap_flags);
void nvhost_nvmap_put(struct mem_mgr *mgr, struct mem_handle *handle);
struct sg_table *nvhost_nvmap_pin(struct mem_mgr *mgr,
- struct mem_handle *handle, struct device *dev);
+ struct mem_handle *handle, struct device *dev, int rw_flag);
void nvhost_nvmap_unpin(struct mem_mgr *mgr, struct mem_handle *handle,
struct device *dev, struct sg_table *sgt);
void *nvhost_nvmap_mmap(struct mem_handle *handle);
}
m->pa = nvhost_memmgr_pin(nvhost_get_host(dev)->memmgr, m->mem_r,
- &dev->dev);
+ &dev->dev, mem_flag_read_only);
if (IS_ERR(m->pa)) {
dev_err(&dev->dev, "nvmap pin failed for ucode");
err = PTR_ERR(m->pa);
return PTR_ERR(buf);
sgt = nvhost_memmgr_pin(ctx->hwctx.memmgr, buf,
- &ctx->hwctx.channel->dev->dev);
+ &ctx->hwctx.channel->dev->dev, mem_flag_none);
if (IS_ERR(sgt))
return PTR_ERR(sgt);
return PTR_ERR(buf);
sgt = nvhost_memmgr_pin(ctx->hwctx.memmgr, buf,
- &ctx->hwctx.channel->dev->dev);
+ &ctx->hwctx.channel->dev->dev, mem_flag_none);
if (IS_ERR(sgt))
return PTR_ERR(sgt);
}
v->ucode.sgt = nvhost_memmgr_pin(v->host->memmgr, v->ucode.mem_r,
- &dev->dev);
+ &dev->dev, mem_flag_read_only);
if (IS_ERR(v->ucode.sgt)) {
nvhost_err(&dev->dev, "nvmap pin failed for ucode, %ld",
PTR_ERR(v->ucode.sgt));
ctx->hwctx.save_slots = 0;
ctx->restore_sgt = nvhost_memmgr_pin(nvmap,
- ctx->restore, &ch->dev->dev);
+ ctx->restore, &ch->dev->dev, mem_flag_none);
if (IS_ERR(ctx->restore_sgt))
goto fail_pin;
ctx->restore_phys = nvhost_memmgr_dma_addr(ctx->restore_sgt);