ARM: tegra: dtb: add pm375 support

Add dtb for PM375 T124 board

Bug 1454434

Change-Id: I931667815c7d35dce0342a8c88e2afde6b2af001
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/366541
(cherry picked from commit 9c21054f02b09a46fbe420f34da4b5e7c9d2822e)
Reviewed-on: http://git-master/r/387705
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b6bf398135a6f6d8a7cd1464f54fea350f6b23a2..a72cc160d4bc10e9e93ba0e15310161573e9e903 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -219,6 +219,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra124-ardbeg-e1780-1000-a03-00-sata.dtb \
        tegra124-laguna.dtb \
        tegra124-laguna-pm358.dtb \
+       tegra124-jetson_tk1-pm375-000-c00-00.dtb \
        tegra124-norrin.dtb \
        tegra124-norrin-pm374-0001-a00-00.dtb \
        tegra124-norrin-pm374-0001-a01-00.dtb \

diff --git a/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts b/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts
new file mode 100644 (file)
index 0000000..c3e8b0a
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts
@@ -0,0 +1,99 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+#include "tegra124-platforms/tegra124-tn8-keys-e1780-1100-a02.dtsi"
+#include "tegra124-platforms/tegra124-jetson_tk1-gpio-pm375-0000-c00-00.dtsi"
+#include "tegra124-platforms/tegra124-jetson_tk1-pinmux-pm375-0000-c00-00.dtsi"
+#include "tegra124-platforms/tegra124-jetson_tk1-pmic-pm375-0000-c00-00.dtsi"
+#include "tegra124-platforms/tegra124-jetson_tk1-fixed-pm375-0000-c00-00.dtsi"
+
+/ {
+       model = "NVIDIA Tegra124 PM375";
+       compatible = "nvidia,jetson-tk1", "nvidia,laguna", "nvidia,tegra124";
+       nvidia,dtsfilename = __FILE__;
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       chosen {
+               bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk";
+               linux,initrd-start = <0x85000000>;
+               linux,initrd-end = <0x851bc400>;
+       };
+
+       pinmux {
+               pinctrl-names = "default", "drive", "unused", "suspend";
+               pinctrl-3 = <&pinmux_suspend>;
+
+               /* Change the pin dap_mclk1_req to required configurations */
+               unused_lowpower {
+                       dap_mclk1_req_pee2 {
+                       nvidia,pins = "dap_mclk1_req_pee2";
+                       nvidia,function = "sata";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+               };
+
+               /* On suspend, make dap_mclk1_req to pull up */
+               pinmux_suspend: pins_on_suspend {
+               dap_mclk1_req_pee2 {
+                       nvidia,pins = "dap_mclk1_req_pee2";
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       };
+               };
+       };
+
+        serial@70006000 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+        serial@70006040 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+        serial@70006200 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+       i2c@7000d000 {
+               nvidia,bit-banging-xfer-after-shutdown;
+       };
+
+       memory@0x80000000 {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x0 0x80000000>;
+       };
+
+       spi@7000d400 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+
+       spi@7000da00 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+
+       pmc {
+               status = "okay";
+               nvidia,invert-interrupt;
+               nvidia,suspend-mode = <0>;
+               nvidia,cpu-pwr-good-time = <2000>;
+               nvidia,cpu-pwr-off-time = <2000>;
+               nvidia,core-pwr-good-time = <3845 3845>;
+               nvidia,core-pwr-off-time = <2000>;
+               nvidia,core-power-req-active-high;
+               nvidia,sys-clock-req-active-high;
+       };
+
+       pcie-controller {
+               nvidia,port0_status = <1>;
+               nvidia,port1_status = <1>;
+               status = "okay";
+       };
+
+};

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-fixed-pm375-0000-c00-00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-fixed-pm375-0000-c00-00.dtsi
new file mode 100644 (file)
index 0000000..3415f28
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-fixed-pm375-0000-c00-00.dtsi
@@ -0,0 +1,515 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
+/ {
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               vdd_ac_bat: regulator@0 {
+                   compatible = "regulator-fixed";
+                   reg = <0>;
+                   regulator-name = "vdd-ac-bat";
+                   regulator-min-microvolt = <8400000>;
+                   regulator-max-microvolt = <8400000>;
+
+                   consumers {
+                           c1 {
+                                   regulator-consumer-supply = "vdd_sys_bl";
+                           };
+                           c2 {
+                                   regulator-consumer-supply = "vddio_pex_sata";
+                           };
+                   };
+           };
+
+               vdd_3v3_aon: regulator@1 {
+                    compatible = "regulator-fixed";
+                    reg = <1>;
+                    regulator-name = "vdd-3v3-aon";
+                    regulator-min-microvolt = <3300000>;
+                    regulator-max-microvolt = <3300000>;
+
+                    consumers {
+                            c1 {
+                                    regulator-consumer-supply = "vdd_3v3_emmc";
+                            };
+                            c2 {
+                                    regulator-consumer-supply = "vdd_com_3v3";
+                            };
+                    };
+            };
+
+               usb0_vbus: regulator@2 {
+                  compatible = "regulator-fixed-sync";
+                  reg = <2>;
+                  regulator-name = "usb0-vbus";
+                  regulator-min-microvolt = <5000000>;
+                  regulator-max-microvolt = <5000000>;
+                  gpio = <&gpio TEGRA_GPIO(N, 4) 0>;
+                  enable-active-high;
+                  gpio-open-drain;
+
+                  consumers {
+                          c1 {
+                                  regulator-consumer-supply = "usb_vbus";
+                                  regulator-consumer-device = "tegra-ehci.0";
+                          };
+                          c2 {
+                                  regulator-consumer-supply = "usb_vbus";
+                                  regulator-consumer-device = "tegra-otg";
+                          };
+                          c3 {
+                                  regulator-consumer-supply = "usb_vbus0";
+                                  regulator-consumer-device = "tegra-xhci";
+                          };
+                  };
+          };
+
+               usb1_usb2_vbus: regulator@3 {
+                       compatible = "regulator-fixed-sync";
+                       reg = <3>;
+                       regulator-name = "usb1-usb2-vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(N, 5) 0>;
+                       enable-active-high;
+                       gpio-open-drain;
+
+                       consumers {
+                               c1 {
+                                       regulator-consumer-supply = "usb_vbus";
+                                       regulator-consumer-device = "tegra-ehci.2";
+                               };
+                               c2 {
+                                       regulator-consumer-supply = "usb_vbus2";
+                                       regulator-consumer-device = "tegra-xhci";
+                               };
+                               c3 {
+                                       regulator-consumer-supply = "usb_vbus";
+                                       regulator-consumer-device = "tegra-ehci.1";
+                               };
+                               c4 {
+                                       regulator-consumer-supply = "usb_vbus1";
+                                       regulator-consumer-device = "tegra-xhci";
+                               };
+                       };
+               };
+
+               vdd_hdmi: regulator@4 {
+                 compatible = "regulator-fixed-sync";
+                 reg = <4>;
+                 regulator-name = "vdd-hdmi";
+                 regulator-min-microvolt = <5000000>;
+                 regulator-max-microvolt = <5000000>;
+                 gpio = <&gpio TEGRA_GPIO(K, 6) 0>;
+                 enable-active-high;
+                 startup-delay-us = <5000>;
+
+                 consumers {
+                         c1 {
+                                 regulator-consumer-supply = "vdd_hdmi_5v0";
+                                 regulator-consumer-device = "tegradc.1";
+                         };
+                         c2 {
+                                 regulator-consumer-supply = "vdd_hdmi_5v0";
+                                 regulator-consumer-device = "tegradc.0";
+                         };
+                 };
+         };
+
+               avdd_hdmi_pll: regulator@5 {
+                      compatible = "regulator-fixed-sync";
+                      reg = <5>;
+                      regulator-name = "avdd-hdmi-pll";
+                      regulator-min-microvolt = <3300000>;
+                      regulator-max-microvolt = <3300000>;
+                      gpio = <&gpio TEGRA_GPIO(H, 7) 0>;
+                      vin-supply = <&as3722_sd4>;
+                      consumers {
+                              c1 {
+                                      regulator-consumer-supply = "avdd_hdmi_pll";
+                                      regulator-consumer-device = "tegradc.1";
+                              };
+                              c2 {
+                                      regulator-consumer-supply = "avdd_hdmi_pll";
+                                      regulator-consumer-device = "tegradc.0";
+                              };
+                      };
+              };
+
+               vdd_lcd_bl: regulator@6 {
+                   compatible = "regulator-fixed-sync";
+                   reg = <6>;
+                   regulator-name = "vdd-lcd-bl";
+                   regulator-min-microvolt = <3300000>;
+                   regulator-max-microvolt = <3300000>;
+                   gpio = <&gpio TEGRA_GPIO(P, 2) 0>;
+                   enable-active-high;
+
+                   consumers {
+                           c1 {
+                                   regulator-consumer-supply = "vdd_lcd_bl";
+                           };
+                   };
+           };
+
+               vdd_lcd_bl_en: regulator@7 {
+                      compatible = "regulator-fixed-sync";
+                      reg = <7>;
+                      regulator-name = "vdd-lcd-bl-en";
+                      regulator-min-microvolt = <5000000>;
+                      regulator-max-microvolt = <5000000>;
+                      enable-active-high;
+                      gpio = <&gpio TEGRA_GPIO(H, 2) 0>;
+
+                      consumers {
+                              c1 {
+                                      regulator-consumer-supply = "vdd_lcd_bl_en";
+                              };
+                      };
+              };
+
+               reg_3v3_supply: regulator@8 {
+                       compatible = "regulator-fixed";
+                       reg = <8>;
+                       regulator-name = "reg-3v3-supply";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+
+                       consumers {
+                               c1 {
+                                       regulator-consumer-supply = "hvdd_pex";
+                               };
+                               c2 {
+                                       regulator-consumer-supply = "hvdd_pex_pll";
+                               };
+                               c3 {
+                                       regulator-consumer-supply = "vdd_sys_cam_3v3";
+                               };
+                               c4 {
+                                       regulator-consumer-supply = "micvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5645.0";
+                               };
+                               c5 {
+                                       regulator-consumer-supply = "micvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5639.0";
+                               };
+                               c6 {
+                                       regulator-consumer-supply = "vdd_gps_3v3";
+                               };
+                               c7 {
+                                       regulator-consumer-supply = "vdd_nfc_3v3";
+                               };
+                               c8 {
+                                       regulator-consumer-supply = "vdd_3v3_sensor";
+                               };
+                               c9 {
+                                       regulator-consumer-supply = "vdd_kp_3v3";
+                               };
+                               c10 {
+                                       regulator-consumer-supply = "vdd_tp_3v3";
+                               };
+                               c11 {
+                                       regulator-consumer-supply = "vdd_dtv_3v3";
+                               };
+                               c12 {
+                                       regulator-consumer-supply = "vdd_modem_3v3";
+                               };
+                               c13 {
+                                       regulator-consumer-supply = "vdd";
+                                       regulator-consumer-device = "0-004c";
+                               };
+                               c14 {
+                                       regulator-consumer-supply = "vdd";
+                                       regulator-consumer-device = "0-0048";
+                               };
+                               c15 {
+                                       regulator-consumer-supply = "vdd";
+                                       regulator-consumer-device = "0-0069";
+                               };
+                               c16 {
+                                       regulator-consumer-supply = "vdd";
+                                       regulator-consumer-device = "0-000c";
+                               };
+                               c17 {
+                                       regulator-consumer-supply = "vdd";
+                                       regulator-consumer-device = "0-0077";
+                               };
+                               c18 {
+                                       regulator-consumer-supply = "vin";
+                                       regulator-consumer-device = "2-0030";
+                               };
+                       };
+               };
+
+               reg_5v0_supply: regulator@9 {
+                       compatible = "regulator-fixed-sync";
+                       reg = <9>;
+                       regulator-name = "reg-5v0-supply";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+
+                       consumers {
+                               c1 {
+                                       regulator-consumer-supply = "spkvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5645.0";
+                               };
+                               c2 {
+                                       regulator-consumer-supply = "spkvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5639.0";
+                               };
+                               c3 {
+                                       regulator-consumer-supply = "vdd_5v0_sensor";
+                               };
+                       };
+               };
+
+               reg_1v8_supply: regulator@10 {
+                       compatible = "regulator-fixed-sync";
+                       reg = <10>;
+                       regulator-name = "reg-1v8-supply";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+
+                       consumers {
+                               c1 {
+                                       regulator-consumer-supply = "avdd_lvds0_pll";
+                               };
+                               c2 {
+                                       regulator-consumer-supply = "dvdd_lcd";
+                               };
+                               c3 {
+                                       regulator-consumer-supply = "vdd_ds_1v8";
+                               };
+                               c4 {
+                                       regulator-consumer-supply = "avdd";
+                                       regulator-consumer-device = "tegra-snd-rt5645.0";
+                               };
+                               c5 {
+                                       regulator-consumer-supply = "dbvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5645.0";
+                               };
+                               c6 {
+                                       regulator-consumer-supply = "avdd";
+                                       regulator-consumer-device = "tegra-snd-rt5639.0";
+                               };
+                               c7 {
+                                       regulator-consumer-supply = "dbvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5639.0";
+                               };
+                               c8 {
+                                       regulator-consumer-supply = "dmicvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5639.0";
+                               };
+                               c9 {
+                                       regulator-consumer-supply = "dmicvdd";
+                                       regulator-consumer-device = "tegra-snd-rt5645.0";
+                               };
+                               c10 {
+                                       regulator-consumer-supply = "vdd_1v8b_nfc";
+                               };
+                               c11 {
+                                       regulator-consumer-supply = "vdd_1v8_sensor";
+                               };
+                               c12 {
+                                       regulator-consumer-supply = "vdd_1v8_sdmmc";
+                               };
+                               c13 {
+                                       regulator-consumer-supply = "vdd_kp_1v8";
+                               };
+                               c14 {
+                                       regulator-consumer-supply = "vdd_tp_1v8";
+                               };
+                               c15 {
+                                       regulator-consumer-supply = "vdd_modem_1v8";
+                               };
+                               c16 {
+                                       regulator-consumer-supply = "vdd_1v8b";
+                                       regulator-consumer-device = "0-0048";
+                               };
+                               c17 {
+                                       regulator-consumer-supply = "dvdd";
+                                       regulator-consumer-device = "spi0.0";
+                               };
+                               c18 {
+                                       regulator-consumer-supply = "vlogic";
+                                       regulator-consumer-device = "0-0069";
+                               };
+                               c19 {
+                                       regulator-consumer-supply = "vid";
+                                       regulator-consumer-device = "0-000c";
+                               };
+                               c20 {
+                                       regulator-consumer-supply = "vddio";
+                                       regulator-consumer-device = "0-0077";
+                               };
+                               c21 {
+                                       regulator-consumer-supply = "vi2c";
+                                       regulator-consumer-device = "2-0030";
+                               };
+                               c22 {
+                                       regulator-consumer-supply = "avdd_pll_utmip";
+                                       regulator-consumer-device = "tegra-udc.0";
+                               };
+                               c23 {
+                                       regulator-consumer-supply = "avdd_pll_utmip";
+                                       regulator-consumer-device = "tegra-ehci.0";
+                               };
+                               c24 {
+                                       regulator-consumer-supply = "avdd_pll_utmip";
+                                       regulator-consumer-device = "tegra-ehci.1";
+                               };
+                               c25 {
+                                       regulator-consumer-supply = "avdd_pll_utmip";
+                                       regulator-consumer-device = "tegra-ehci.2";
+                               };
+                               c26 {
+                                       regulator-consumer-supply = "avdd_pll_utmip";
+                                       regulator-consumer-device = "tegra-xhci";
+                               };
+                       };
+               };
+
+               reg_dcdc_1v2: regulator@11 {
+                     compatible = "regulator-fixed-sync";
+                     reg = <11>;
+                     regulator-name = "reg-dcdc-1v2";
+                     regulator-min-microvolt = <1200000>;
+                     regulator-max-microvolt = <1200000>;
+                     enable-active-high;
+                     gpio = <&gpio TEGRA_GPIO(R, 2) 0>;
+
+                     consumers {
+                             c1 {
+                                     regulator-consumer-supply = "vdd_1v2_en";
+                             };
+                     };
+             };
+
+               as3722_gpio2_supply: regulator@12 {
+                            compatible = "regulator-fixed-sync";
+                            reg = <12>;
+                            regulator-name = "as3722-gpio2-supply";
+                            regulator-min-microvolt = <3300000>;
+                            regulator-max-microvolt = <3300000>;
+                            gpio = <&as3722 2 0>;
+                            enable-active-high;
+                            regulator-boot-on;
+
+                            consumers {
+                                    c1 {
+                                            regulator-consumer-supply = "avdd_usb";
+                                            regulator-consumer-device = "tegra-udc.0";
+                                    };
+                                    c2 {
+                                            regulator-consumer-supply = "avdd_usb";
+                                            regulator-consumer-device = "tegra-ehci.0";
+                                    };
+                                    c3 {
+                                            regulator-consumer-supply = "avdd_usb";
+                                            regulator-consumer-device = "tegra-ehci.1";
+                                    };
+                                    c4 {
+                                            regulator-consumer-supply = "avdd_usb";
+                                            regulator-consumer-device = "tegra-ehci.2";
+                                    };
+                                    c5 {
+                                            regulator-consumer-supply = "hvdd_usb";
+                                            regulator-consumer-device = "tegra-xhci";
+                                    };
+                                    c6 {
+                                            regulator-consumer-supply = "vddio_hv";
+                                            regulator-consumer-device = "tegradc.1";
+                                    };
+                                    c7 {
+                                            regulator-consumer-supply = "pwrdet_hv";
+                                    };
+                                    c8 {
+                                            regulator-consumer-supply = "hvdd_sata";
+                                    };
+                            };
+                    };
+               as3722_gpio4_supply: regulator@13 {
+                            compatible = "regulator-fixed-sync";
+                            reg = <13>;
+                            regulator-name = "as3722-gpio4-supply";
+                            regulator-min-microvolt = <3300000>;
+                            regulator-max-microvolt = <3300000>;
+                            enable-active-high;
+                            gpio = <&as3722 4 0>;
+
+                            consumers {
+                                    c1 {
+                                            regulator-consumer-supply = "avdd_lcd";
+                                    };
+                            };
+                    };
+               sdmmc_en_supply: regulator@14 {
+                        compatible = "regulator-fixed-sync";
+                        reg = <14>;
+                        regulator-name = "sdmmc-en-supply";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        enable-active-high;
+                        gpio = <&gpio TEGRA_GPIO(R, 0) 0>;
+
+                        consumers {
+                                c1 {
+                                        regulator-consumer-supply = "vddio_sd_slot";
+                                        regulator-consumer-device = "sdhci-tegra.1";
+                                };
+                                c2 {
+                                        regulator-consumer-supply = "vddio_sd_slot";
+                                        regulator-consumer-device = "sdhci-tegra.2";
+                                };
+                        };
+                };
+               vdd_cdc_1v2_aud: regulator@15 {
+                        compatible = "regulator-fixed-sync";
+                        reg = <15>;
+                        regulator-name = "vdd-cdc-1v2-aud";
+                        regulator-min-microvolt = <1200000>;
+                        regulator-max-microvolt = <1200000>;
+                        enable-active-high;
+                        gpio = <&gpio TEGRA_GPIO(R, 2) 0>;
+                        startup-delay-us = <250000>;
+                        consumers {
+                                c1 {
+                                        regulator-consumer-supply = "ldoen";
+                                        regulator-consumer-device = "tegra-snd-rt5639.0";
+                                };
+                        };
+                };
+               reg_aon_1v8: regulator@16 {
+                        compatible = "regulator-fixed-sync";
+                        reg = <16>;
+                        regulator-name = "reg-aon-1v8";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        consumers {
+                                c1 {
+                                        regulator-consumer-supply = "vdd_1v8_emmc";
+                                };
+                                c2 {
+                                        regulator-consumer-supply = "vdd_1v8b_com_f";
+                                };
+                                c3 {
+                                        regulator-consumer-supply = "vdd_1v8b_gps_f";
+                                };
+                        };
+                };
+               reg_aon_1v2: regulator@17 {
+                    compatible = "regulator-fixed-sync";
+                    reg = <17>;
+                    regulator-name = "reg-aon-1v2";
+                    regulator-min-microvolt = <1200000>;
+                    regulator-max-microvolt = <1200000>;
+                    consumers {
+                            c1 {
+                                    regulator-consumer-supply = "vdd_1v2_bb_hsic";
+                            };
+                    };
+            };
+       };
+};

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-gpio-pm375-0000-c00-00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-gpio-pm375-0000-c00-00.dtsi
new file mode 100644 (file)
index 0000000..1f505ef
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-gpio-pm375-0000-c00-00.dtsi
@@ -0,0 +1,93 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
+/ {
+       gpio: gpio@6000d000 {
+               gpio-init-names = "default";
+               gpio-init-0 = <&gpio_default>;
+
+               gpio_default: default {
+                       gpio-input = <  TEGRA_GPIO(C, 7)
+                                       TEGRA_GPIO(G, 2)
+                                       TEGRA_GPIO(G, 3)
+                                       TEGRA_GPIO(H, 4)
+                                       TEGRA_GPIO(H, 6)
+                                       TEGRA_GPIO(I, 5)
+                                       TEGRA_GPIO(I, 6)
+                                       TEGRA_GPIO(J, 0)
+                                       TEGRA_GPIO(J, 2)
+                                       TEGRA_GPIO(FF, 2)
+                                       TEGRA_GPIO(K, 2)
+                                       TEGRA_GPIO(K, 3)
+                                       TEGRA_GPIO(N, 7)
+                                       TEGRA_GPIO(O, 0)
+                                       TEGRA_GPIO(O, 1)
+                                       TEGRA_GPIO(O, 2)
+                                       TEGRA_GPIO(O, 3)
+                                       TEGRA_GPIO(O, 5)
+                                       TEGRA_GPIO(O, 7)
+                                       TEGRA_GPIO(Q, 0)
+                                       TEGRA_GPIO(Q, 1)
+                                       TEGRA_GPIO(Q, 2)
+                                       TEGRA_GPIO(Q, 5)
+                                       TEGRA_GPIO(Q, 6)
+                                       TEGRA_GPIO(Q, 7)
+                                       TEGRA_GPIO(R, 4)
+                                       TEGRA_GPIO(R, 7)
+                                       TEGRA_GPIO(S, 0)
+                                       TEGRA_GPIO(S, 5)
+                                       TEGRA_GPIO(U, 1)
+                                       TEGRA_GPIO(U, 2)
+                                       TEGRA_GPIO(U, 5)
+                                       TEGRA_GPIO(U, 6)
+                                       TEGRA_GPIO(V, 0)
+                                       TEGRA_GPIO(V, 1)
+                                       TEGRA_GPIO(W, 2)
+                                       TEGRA_GPIO(W, 3)
+                                       TEGRA_GPIO(X, 3)
+                                       TEGRA_GPIO(X, 5)
+                                       TEGRA_GPIO(X, 6)
+                                       TEGRA_GPIO(CC, 1)
+                                       TEGRA_GPIO(CC, 2)>;
+                       gpio-output-low = <TEGRA_GPIO(G, 0)
+                                       TEGRA_GPIO(P, 0)
+                                       TEGRA_GPIO(P, 1)
+                                       TEGRA_GPIO(P, 2)
+                                       TEGRA_GPIO(BB, 4)
+                                       TEGRA_GPIO(G, 1)
+                                       TEGRA_GPIO(H, 3)
+                                       TEGRA_GPIO(H, 5)
+                                       TEGRA_GPIO(I, 0)
+                                       TEGRA_GPIO(I, 2)
+                                       TEGRA_GPIO(I, 4)
+                                       TEGRA_GPIO(K, 1)
+                                       TEGRA_GPIO(K, 5)
+                                       TEGRA_GPIO(K, 6)
+                                       TEGRA_GPIO(O, 6)
+                                       TEGRA_GPIO(R, 0)
+                                       TEGRA_GPIO(R, 1)
+                                       TEGRA_GPIO(R, 5)
+                                       TEGRA_GPIO(S, 3)
+                                       TEGRA_GPIO(S, 4)
+                                       TEGRA_GPIO(S, 6)
+                                       TEGRA_GPIO(U, 0)
+                                       TEGRA_GPIO(U, 3)
+                                       TEGRA_GPIO(U, 4)
+                                       TEGRA_GPIO(X, 1)
+                                       TEGRA_GPIO(X, 4)
+                                       TEGRA_GPIO(X, 7)
+                                       TEGRA_GPIO(T, 0)
+                                       TEGRA_GPIO(T, 1)
+                                       TEGRA_GPIO(BB, 3)
+                                       TEGRA_GPIO(BB, 5)
+                                       TEGRA_GPIO(BB, 6)
+                                       TEGRA_GPIO(BB, 7)
+                                       TEGRA_GPIO(CC, 5)
+                                       TEGRA_GPIO(FF, 1)
+                                       TEGRA_GPIO(H, 2)
+                                       TEGRA_GPIO(EE, 1)>;
+                       gpio-output-high = <TEGRA_GPIO(K, 4)
+                                       TEGRA_GPIO(R, 2)
+                                       TEGRA_GPIO(EE, 2)>;
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pinmux-pm375-0000-c00-00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pinmux-pm375-0000-c00-00.dtsi
new file mode 100644 (file)
index 0000000..5418f26
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pinmux-pm375-0000-c00-00.dtsi
@@ -0,0 +1,1584 @@
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
+/ {
+  pinmux: pinmux {
+         pinctrl-names = "default", "drive", "unused";
+         pinctrl-0 = <&pinmux_default>;
+         pinctrl-1 = <&drive_default>;
+         pinctrl-2 = <&pinmux_unused_lowpower>;
+
+         pinmux_default: common {
+               dap_mclk1_pw4 {
+                       nvidia,pins = "dap_mclk1_pw4";
+                       nvidia,function = "extperiph1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dap_mclk1_req_pee2 {
+                       nvidia,pins = "dap_mclk1_req_pee2";
+                       nvidia,function = "sata";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dap1_din_pn1 {
+                       nvidia,pins = "dap1_din_pn1";
+                       nvidia,function = "i2s0";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap1_dout_pn2 {
+                       nvidia,pins = "dap1_dout_pn2";
+                       nvidia,function = "sata";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dap1_fs_pn0 {
+                       nvidia,pins = "dap1_fs_pn0";
+                       nvidia,function = "i2s0";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+               dap1_sclk_pn3 {
+                       nvidia,pins = "dap1_sclk_pn3";
+                       nvidia,function = "i2s0";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap2_din_pa4 {
+                       nvidia,pins = "dap2_din_pa4";
+                       nvidia,function = "i2s1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap2_dout_pa5 {
+                       nvidia,pins = "dap2_dout_pa5";
+                       nvidia,function = "i2s1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap2_fs_pa2 {
+                       nvidia,pins = "dap2_fs_pa2";
+                       nvidia,function = "i2s1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap2_sclk_pa3 {
+                       nvidia,pins = "dap2_sclk_pa3";
+                       nvidia,function = "i2s1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dvfs_pwm_px0 {
+                       nvidia,pins = "dvfs_pwm_px0";
+                       nvidia,function = "cldvfs";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dvfs_clk_px2 {
+                       nvidia,pins = "dvfs_clk_px2";
+                       nvidia,function = "cldvfs";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ulpi_clk_py0 {
+                       nvidia,pins = "ulpi_clk_py0";
+                       nvidia,function = "spi1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ulpi_dir_py1 {
+                       nvidia,pins = "ulpi_dir_py1";
+                       nvidia,function = "spi1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ulpi_nxt_py2 {
+                       nvidia,pins = "ulpi_nxt_py2";
+                       nvidia,function = "spi1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ulpi_stp_py3 {
+                       nvidia,pins = "ulpi_stp_py3";
+                       nvidia,function = "spi1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               cam_i2c_scl_pbb1 {
+                       nvidia,pins = "cam_i2c_scl_pbb1";
+                       nvidia,function = "i2c3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               cam_i2c_sda_pbb2 {
+                       nvidia,pins = "cam_i2c_sda_pbb2";
+                       nvidia,function = "i2c3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               cam_mclk_pcc0 {
+                       nvidia,pins = "cam_mclk_pcc0";
+                       nvidia,function = "vi_alt3";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pbb0 {
+                       nvidia,pins = "pbb0";
+                       nvidia,function = "vimclk2_alt";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pbb4 {
+                       nvidia,pins = "pbb4";
+                       nvidia,function = "vgp4";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               gen2_i2c_scl_pt5 {
+                       nvidia,pins = "gen2_i2c_scl_pt5";
+                       nvidia,function = "i2c2";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               gen2_i2c_sda_pt6 {
+                       nvidia,pins = "gen2_i2c_sda_pt6";
+                       nvidia,function = "i2c2";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               pj7 {
+                       nvidia,pins = "pj7";
+                       nvidia,function = "uartd";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pb0 {
+                       nvidia,pins = "pb0";
+                       nvidia,function = "uartd";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pb1 {
+                       nvidia,pins = "pb1";
+                       nvidia,function = "uartd";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pk7 {
+                       nvidia,pins = "pk7";
+                       nvidia,function = "uartd";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pg4 {
+                       nvidia,pins = "pg4";
+                       nvidia,function = "spi4";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pg5 {
+                       nvidia,pins = "pg5";
+                       nvidia,function = "spi4";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pg6 {
+                       nvidia,pins = "pg6";
+                       nvidia,function = "spi4";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pg7 {
+                       nvidia,pins = "pg7";
+                       nvidia,function = "spi4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pi3 {
+                       nvidia,pins = "pi3";
+                       nvidia,function = "spi4";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ph1 {
+                       nvidia,pins = "ph1";
+                       nvidia,function = "pwm1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pk0 {
+                       nvidia,pins = "pk0";
+                       nvidia,function = "soc";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row15_ps7 {
+                       nvidia,pins = "kb_row15_ps7";
+                       nvidia,function = "soc";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               clk_32k_out_pa0 {
+                       nvidia,pins = "clk_32k_out_pa0";
+                       nvidia,function = "soc";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pex_l0_clkreq_n_pdd2 {
+                       nvidia,pins = "pex_l0_clkreq_n_pdd2";
+                       nvidia,function = "pe0";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pex_l0_rst_n_pdd1 {
+                       nvidia,pins = "pex_l0_rst_n_pdd1";
+                       nvidia,function = "pe0";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pex_l1_rst_n_pdd5 {
+                       nvidia,pins = "pex_l1_rst_n_pdd5";
+                       nvidia,function = "pe1";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pex_l1_clkreq_n_pdd6 {
+                       nvidia,pins = "pex_l1_clkreq_n_pdd6";
+                       nvidia,function = "pe1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pex_wake_n_pdd3 {
+                       nvidia,pins = "pex_wake_n_pdd3";
+                       nvidia,function = "pe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc1_clk_pz0 {
+                       nvidia,pins = "sdmmc1_clk_pz0";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_cmd_pz1 {
+                       nvidia,pins = "sdmmc1_cmd_pz1";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_dat0_py7 {
+                       nvidia,pins = "sdmmc1_dat0_py7";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_dat1_py6 {
+                       nvidia,pins = "sdmmc1_dat1_py6";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_dat2_py5 {
+                       nvidia,pins = "sdmmc1_dat2_py5";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_dat3_py4 {
+                       nvidia,pins = "sdmmc1_dat3_py4";
+                       nvidia,function = "sdmmc1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc3_clk_pa6 {
+                       nvidia,pins = "sdmmc3_clk_pa6";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_cmd_pa7 {
+                       nvidia,pins = "sdmmc3_cmd_pa7";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_dat0_pb7 {
+                       nvidia,pins = "sdmmc3_dat0_pb7";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_dat1_pb6 {
+                       nvidia,pins = "sdmmc3_dat1_pb6";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_dat2_pb5 {
+                       nvidia,pins = "sdmmc3_dat2_pb5";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_dat3_pb4 {
+                       nvidia,pins = "sdmmc3_dat3_pb4";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_clk_lb_out_pee4 {
+                       nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_clk_lb_in_pee5 {
+                       nvidia,pins = "sdmmc3_clk_lb_in_pee5";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_col4_pq4 {
+                       nvidia,pins = "kb_col4_pq4";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc3_cd_n_pv2 {
+                       nvidia,pins = "sdmmc3_cd_n_pv2";
+                       nvidia,function = "sdmmc3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_clk_pcc4 {
+                       nvidia,pins = "sdmmc4_clk_pcc4";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_cmd_pt7 {
+                       nvidia,pins = "sdmmc4_cmd_pt7";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat0_paa0 {
+                       nvidia,pins = "sdmmc4_dat0_paa0";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat1_paa1 {
+                       nvidia,pins = "sdmmc4_dat1_paa1";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat2_paa2 {
+                       nvidia,pins = "sdmmc4_dat2_paa2";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat3_paa3 {
+                       nvidia,pins = "sdmmc4_dat3_paa3";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat4_paa4 {
+                       nvidia,pins = "sdmmc4_dat4_paa4";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat5_paa5 {
+                       nvidia,pins = "sdmmc4_dat5_paa5";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat6_paa6 {
+                       nvidia,pins = "sdmmc4_dat6_paa6";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               sdmmc4_dat7_paa7 {
+                       nvidia,pins = "sdmmc4_dat7_paa7";
+                       nvidia,function = "sdmmc4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row10_ps2 {
+                       nvidia,pins = "kb_row10_ps2";
+                       nvidia,function = "uarta";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row9_ps1 {
+                       nvidia,pins = "kb_row9_ps1";
+                       nvidia,function = "uarta";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row3_pr3 {
+                       nvidia,pins = "kb_row3_pr3";
+                       nvidia,function = "sys";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row6_pr6 {
+                       nvidia,pins = "kb_row6_pr6";
+                       nvidia,function = "displaya_alt";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pwr_i2c_scl_pz6 {
+                       nvidia,pins = "pwr_i2c_scl_pz6";
+                       nvidia,function = "i2cpwr";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               pwr_i2c_sda_pz7 {
+                       nvidia,pins = "pwr_i2c_sda_pz7";
+                       nvidia,function = "i2cpwr";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               jtag_rtck {
+                       nvidia,pins = "jtag_rtck";
+                       nvidia,function = "rtck";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               clk_32k_in {
+                       nvidia,pins = "clk_32k_in";
+                       nvidia,function = "clk";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               clk2_out_pw5 {
+                       nvidia,pins = "clk2_out_pw5";
+                       nvidia,function = "extperiph2";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               core_pwr_req {
+                       nvidia,pins = "core_pwr_req";
+                       nvidia,function = "pwron";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               cpu_pwr_req {
+                       nvidia,pins = "cpu_pwr_req";
+                       nvidia,function = "cpu";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pwr_int_n {
+                       nvidia,pins = "pwr_int_n";
+                       nvidia,function = "pmi";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               reset_out_n {
+                       nvidia,pins = "reset_out_n";
+                       nvidia,function = "reset_out_n";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               clk3_out_pee0 {
+                       nvidia,pins = "clk3_out_pee0";
+                       nvidia,function = "extperiph3";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dp_hpd_pff0 {
+                       nvidia,pins = "dp_hpd_pff0";
+                       nvidia,function = "dp";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dap4_din_pp5 {
+                       nvidia,pins = "dap4_din_pp5";
+                       nvidia,function = "i2s3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap4_dout_pp6 {
+                       nvidia,pins = "dap4_dout_pp6";
+                       nvidia,function = "i2s3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap4_fs_pp4 {
+                       nvidia,pins = "dap4_fs_pp4";
+                       nvidia,function = "i2s3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap4_sclk_pp7 {
+                       nvidia,pins = "dap4_sclk_pp7";
+                       nvidia,function = "i2s3";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               gen1_i2c_sda_pc5 {
+                       nvidia,pins = "gen1_i2c_sda_pc5";
+                       nvidia,function = "i2c1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               gen1_i2c_scl_pc4 {
+                       nvidia,pins = "gen1_i2c_scl_pc4";
+                       nvidia,function = "i2c1";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               uart2_cts_n_pj5 {
+                       nvidia,pins = "uart2_cts_n_pj5";
+                       nvidia,function = "uartb";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               uart2_rts_n_pj6 {
+                       nvidia,pins = "uart2_rts_n_pj6";
+                       nvidia,function = "uartb";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               uart2_rxd_pc3 {
+                       nvidia,pins = "uart2_rxd_pc3";
+                       nvidia,function = "irda";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               uart2_txd_pc2 {
+                       nvidia,pins = "uart2_txd_pc2";
+                       nvidia,function = "irda";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               uart3_cts_n_pa1 {
+                       nvidia,pins = "uart3_cts_n_pa1";
+                       nvidia,function = "uartc";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               uart3_rts_n_pc0 {
+                       nvidia,pins = "uart3_rts_n_pc0";
+                       nvidia,function = "uartc";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               uart3_rxd_pw7 {
+                       nvidia,pins = "uart3_rxd_pw7";
+                       nvidia,function = "uartc";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               uart3_txd_pw6 {
+                       nvidia,pins = "uart3_txd_pw6";
+                       nvidia,function = "uartc";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               hdmi_cec_pee3 {
+                       nvidia,pins = "hdmi_cec_pee3";
+                       nvidia,function = "cec";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+               };
+
+               ddc_scl_pv4 {
+                       nvidia,pins = "ddc_scl_pv4";
+                       nvidia,function = "i2c4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ddc_sda_pv5 {
+                       nvidia,pins = "ddc_sda_pv5";
+                       nvidia,function = "i2c4";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               usb_vbus_en0_pn4 {
+                       nvidia,pins = "usb_vbus_en0_pn4";
+                       nvidia,function = "usb";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+               };
+
+               usb_vbus_en1_pn5 {
+                       nvidia,pins = "usb_vbus_en1_pn5";
+                       nvidia,function = "usb";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+               };
+
+               usb_vbus_en2_pff1 {
+                       nvidia,pins = "usb_vbus_en2_pff1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               gpio_x4_aud_px4 {
+                       nvidia,pins = "gpio_x4_aud_px4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               gpio_x5_aud_px5 {
+                       nvidia,pins = "gpio_x5_aud_px5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               gpio_x6_aud_px6 {
+                       nvidia,pins = "gpio_x6_aud_px6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               gpio_x7_aud_px7 {
+                       nvidia,pins = "gpio_x7_aud_px7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               gpio_w2_aud_pw2 {
+                       nvidia,pins = "gpio_w2_aud_pw2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               gpio_w3_aud_pw3 {
+                       nvidia,pins = "gpio_w3_aud_pw3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               gpio_x1_aud_px1 {
+                       nvidia,pins = "gpio_x1_aud_px1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               gpio_x3_aud_px3 {
+                       nvidia,pins = "gpio_x3_aud_px3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap3_din_pp1 {
+                       nvidia,pins = "dap3_din_pp1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               dap3_dout_pp2 {
+                       nvidia,pins = "dap3_dout_pp2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               dap3_fs_pp0 {
+                       nvidia,pins = "dap3_fs_pp0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pv0 {
+                       nvidia,pins = "pv0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pv1 {
+                       nvidia,pins = "pv1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ulpi_data0_po1 {
+                       nvidia,pins = "ulpi_data0_po1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+               ulpi_data1_po2 {
+                       nvidia,pins = "ulpi_data1_po2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                       };
+
+               ulpi_data2_po3 {
+                       nvidia,pins = "ulpi_data2_po3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                       };
+
+               pbb3 {
+                       nvidia,pins = "pbb3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pbb5 {
+                       nvidia,pins = "pbb5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pbb6 {
+                       nvidia,pins = "pbb6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pbb7 {
+                       nvidia,pins = "pbb7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pcc1 {
+                       nvidia,pins = "pcc1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pcc2 {
+                       nvidia,pins = "pcc2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pg0 {
+                       nvidia,pins = "pg0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pg1 {
+                       nvidia,pins = "pg1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ph2 {
+                       nvidia,pins = "ph2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ph3 {
+                       nvidia,pins = "ph3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ph4 {
+                       nvidia,pins = "ph4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ph5 {
+                       nvidia,pins = "ph5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ph6 {
+                       nvidia,pins = "ph6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pg2 {
+                       nvidia,pins = "pg2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pg3 {
+                       nvidia,pins = "pg3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pk1 {
+                       nvidia,pins = "pk1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pj0 {
+                       nvidia,pins = "pj0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pj2 {
+                       nvidia,pins = "pj2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pk3 {
+                       nvidia,pins = "pk3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pk4 {
+                       nvidia,pins = "pk4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pk2 {
+                       nvidia,pins = "pk2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pi6 {
+                       nvidia,pins = "pi6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pi2 {
+                       nvidia,pins = "pi2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pi5 {
+                       nvidia,pins = "pi5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pi4 {
+                       nvidia,pins = "pi4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pc7 {
+                       nvidia,pins = "pc7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pi0 {
+                       nvidia,pins = "pi0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pff2 {
+                       nvidia,pins = "pff2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               clk2_req_pcc5 {
+                       nvidia,pins = "clk2_req_pcc5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_col0_pq0 {
+                       nvidia,pins = "kb_col0_pq0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_col1_pq1 {
+                       nvidia,pins = "kb_col1_pq1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_col2_pq2 {
+                       nvidia,pins = "kb_col2_pq2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_col5_pq5 {
+                       nvidia,pins = "kb_col5_pq5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_col6_pq6 {
+                       nvidia,pins = "kb_col6_pq6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_col7_pq7 {
+                       nvidia,pins = "kb_col7_pq7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row0_pr0 {
+                       nvidia,pins = "kb_row0_pr0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row1_pr1 {
+                       nvidia,pins = "kb_row1_pr1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row11_ps3 {
+                       nvidia,pins = "kb_row11_ps3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row12_ps4 {
+                       nvidia,pins = "kb_row12_ps4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row13_ps5 {
+                       nvidia,pins = "kb_row13_ps5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row14_ps6 {
+                       nvidia,pins = "kb_row14_ps6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row16_pt0 {
+                       nvidia,pins = "kb_row16_pt0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row17_pt1 {
+                       nvidia,pins = "kb_row17_pt1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row2_pr2 {
+                       nvidia,pins = "kb_row2_pr2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row4_pr4 {
+                       nvidia,pins = "kb_row4_pr4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row5_pr5 {
+                       nvidia,pins = "kb_row5_pr5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_row7_pr7 {
+                       nvidia,pins = "kb_row7_pr7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               kb_row8_ps0 {
+                       nvidia,pins = "kb_row8_ps0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               clk3_req_pee1 {
+                       nvidia,pins = "clk3_req_pee1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pu0 {
+                       nvidia,pins = "pu0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu1 {
+                       nvidia,pins = "pu1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu2 {
+                       nvidia,pins = "pu2";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu3 {
+                       nvidia,pins = "pu3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu4 {
+                       nvidia,pins = "pu4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu5 {
+                       nvidia,pins = "pu5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               pu6 {
+                       nvidia,pins = "pu6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               hdmi_int_pn7 {
+                       nvidia,pins = "hdmi_int_pn7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               spdif_in_pk6 {
+                       nvidia,pins = "spdif_in_pk6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+
+               ulpi_data3_po4 {
+                       nvidia,pins = "ulpi_data3_po4";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_DISABLE>;
+               };
+       };
+       pinmux_unused_lowpower: unused_lowpower {
+               dap3_sclk_pp3 {
+                       nvidia,pins = "dap3_sclk_pp3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ph7 {
+                       nvidia,pins = "ph7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ph0 {
+                       nvidia,pins = "ph0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pi1 {
+                       nvidia,pins = "pi1";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               pi7 {
+                       nvidia,pins = "pi7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               sdmmc1_wp_n_pv3 {
+                       nvidia,pins = "sdmmc1_wp_n_pv3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               kb_col3_pq3 {
+                       nvidia,pins = "kb_col3_pq3";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               owr {
+                       nvidia,pins = "owr";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ulpi_data4_po5 {
+                       nvidia,pins = "ulpi_data4_po5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ulpi_data5_po6 {
+                       nvidia,pins = "ulpi_data5_po6";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ulpi_data6_po7 {
+                       nvidia,pins = "ulpi_data6_po7";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               ulpi_data7_po0 {
+                       nvidia,pins = "ulpi_data7_po0";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+               spdif_out_pk5 {
+                       nvidia,pins = "spdif_out_pk5";
+                       nvidia,function = "safe";
+                       nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+               };
+
+       };
+       drive_default: drive {
+               drive_sdio1 {
+                       nvidia,pins = "drive_sdio1";
+                       nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                       nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull-down-strength = <32>;
+                       nvidia,pull-up-strength = <42>;
+                       nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+               };
+
+               drive_sdio3 {
+                       nvidia,pins = "drive_sdio3";
+                       nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                       nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                       nvidia,pull-down-strength = <22>;
+                       nvidia,pull-up-strength = <36>;
+                       nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+               };
+
+               drive_gma {
+                       nvidia,pins = "drive_gma";
+                       nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                       nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                       nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                       nvidia,pull-down-strength = <2>;
+                       nvidia,pull-up-strength = <1>;
+                       nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       nvidia,drive-type = <1>;
+               };
+       };
+  };
+};

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pmic-pm375-0000-c00-00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pmic-pm375-0000-c00-00.dtsi
new file mode 100644 (file)
index 0000000..4253ef7
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-jetson_tk1-pmic-pm375-0000-c00-00.dtsi
@@ -0,0 +1,491 @@
+ #include <dt-bindings/gpio/tegra-gpio.h>
+ #include <dt-bindings/mfd/as3722.h>
+ #include <dt-bindings/regulator/regulator.h>
+
+/ {
+       i2c@7000d000 {
+               as3722: as3722@40 {
+                       compatible = "ams,as3722";
+                       reg = <0x40>;
+                       interrupts = <0 86 IRQ_TYPE_NONE>;
+
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       ams,major-rev = <1>;
+                       ams,minor-rev = <2>;
+                       ams,system-power-controller;
+                       ams,extcon-name = "as3722-extcon";
+                       ams,enable-adc1-continuous-mode;
+                       ams,enable-low-voltage-range;
+                       ams,adc-channel = <12>;
+                       ams,hi-threshold = <256>;
+                       ams,low-threshold = <128>;
+                       ams,enable-clock32k-out;
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&as3722_default>;
+
+                       as3722_default: pinmux@0 {
+                               gpio0 {
+                                       pins = "gpio0";
+                                       function = "gpio";
+                                       output-low;
+                               };
+
+                               gpio1_2_4 {
+                                       pins = "gpio1", "gpio2", "gpio4";
+                                       function = "gpio";
+                                       bias-pull-down;
+                                       output-high;
+                               };
+
+                               gpio7 {
+                                       pins = "gpio7";
+                                       function = "gpio";
+                                       bias-pull-up;
+                                       output-high;
+                               };
+
+                               gpio3_6 {
+                                       pins = "gpio3", "gpio6";
+                                       function = "gpio";
+                                       bias-high-impedance;
+                               };
+                       };
+
+                       regulators {
+                            compatible = "ams,as3722";
+                            ldo0-in-supply = <&as3722_sd2>;
+                            ldo2-in-supply = <&as3722_sd5>;
+                            ldo5-in-supply = <&as3722_sd5>;
+                            ldo7-in-supply = <&as3722_sd5>;
+
+                               as3722_sd0: sd0 {
+                                   regulator-name = "vdd-cpu";
+                                   regulator-min-microvolt = <700000>;
+                                   regulator-max-microvolt = <1400000>;
+                                   regulator-min-microamp = <3500000>;
+                                   regulator-max-microamp = <3500000>;
+                                   regulator-always-on;
+                                   regulator-boot-on;
+                                   ams,ext-control = <AS3722_EXT_CONTROL_ENABLE2>;
+                                   consumers {
+                                           c1 {
+                                           regulator-consumer-supply = "vdd_cpu";
+                                           };
+                                   };
+                           };
+
+                               as3722_sd1: sd1 {
+                                   regulator-name = "vdd-core";
+                                   regulator-min-microvolt = <700000>;
+                                   regulator-max-microvolt = <1350000>;
+                                   regulator-min-microamp = <3500000>;
+                                   regulator-max-microamp = <3500000>;
+                                   regulator-always-on;
+                                   regulator-boot-on;
+                                   ams,ext-control = <AS3722_EXT_CONTROL_ENABLE1>;
+                                   consumers {
+                                           c1 {
+                                                   regulator-consumer-supply = "vdd_core";
+                                           };
+                                   };
+                           };
+
+                               as3722_sd2:  sd2 {
+                                    regulator-name = "vddio-ddr";
+                                    regulator-always-on;
+                                    regulator-boot-on;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vddio_ddr";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "vddio_ddr_mclk";
+                                            };
+                                            c3 {
+                                                    regulator-consumer-supply = "vddio_ddr3";
+                                            };
+                                            c4 {
+                                                    regulator-consumer-supply = "vcore1_ddr3";
+                                            };
+                                    };
+
+                            };
+
+                               as3722_sd4: sd4 {
+                                   regulator-name = "avdd-pll-pex";
+                                   regulator-min-microvolt = <1050000>;
+                                   regulator-max-microvolt = <1050000>;
+                                   regulator-always-on;
+                                   regulator-boot-on;
+                                   ams,ext-control = <AS3722_EXT_CONTROL_ENABLE1>;
+
+                                   consumers {
+                                           c1 {
+                                                   regulator-consumer-supply = "avdd_pex_pll";
+                                           };
+                                           c2 {
+                                                   regulator-consumer-supply = "avddio_pex_pll";
+                                           };
+                                           c3 {
+                                                   regulator-consumer-supply = "dvddio_pex";
+                                           };
+                                           c4 {
+                                                   regulator-consumer-supply = "pwrdet_pex_ctl";
+                                           };
+                                           c5 {
+                                                   regulator-consumer-supply = "avdd_sata";
+                                           };
+                                           c6 {
+                                                   regulator-consumer-supply = "vdd_sata";
+                                           };
+                                           c7 {
+                                                   regulator-consumer-supply = "avdd_sata_pll";
+                                           };
+                                           c8 {
+                                                   regulator-consumer-supply = "avddio_usb";
+                                                   regulator-consumer-device = "tegra-xhci";
+                                           };
+                                           c9 {
+                                                   regulator-consumer-supply = "avdd_hdmi";
+                                                   regulator-consumer-device = "tegradc.1";
+                                           };
+                                           c10 {
+                                                   regulator-consumer-supply = "avdd_hdmi";
+                                                   regulator-consumer-device = "tegradc.0";
+                                           };
+                                   };
+                           };
+
+                               as3722_sd5: sd5 {
+                                   regulator-name = "vdd-1v8";
+                                   regulator-always-on;
+                                   regulator-boot-on;
+
+                                   consumers {
+                                           c1 {
+                                                   regulator-consumer-supply = "vddio_sys";
+                                           };
+                                           c2 {
+                                                   regulator-consumer-supply = "vddio_sys_2";
+                                           };
+                                           c3 {
+                                                   regulator-consumer-supply = "vddio_audio";
+                                           };
+                                           c4 {
+                                                   regulator-consumer-supply = "pwrdet_audio";
+                                           };
+                                           c5 {
+                                                   regulator-consumer-supply = "vddio_sdmmc";
+                                                   regulator-consumer-device = "sdhci-tegra.0";
+                                           };
+                                           c6 {
+                                                   regulator-consumer-supply = "pwrdet_sdmmc1";
+                                           };
+                                           c7 {
+                                                   regulator-consumer-supply = "vddio_sdmmc";
+                                                   regulator-consumer-device = "sdhci-tegra.3";
+                                           };
+                                           c8 {
+                                                   regulator-consumer-supply = "pwrdet_sdmmc4";
+                                           };
+                                           c9 {
+                                                   regulator-consumer-supply = "vddio_uart";
+                                           };
+                                           c10 {
+                                                   regulator-consumer-supply = "pwrdet_uart";
+                                           };
+                                           c11 {
+                                                   regulator-consumer-supply = "vddio_bb";
+                                           };
+                                           c12 {
+                                                   regulator-consumer-supply = "pwrdet_bb";
+                                                   };
+                                           c13 {
+                                                   regulator-consumer-supply = "vddio_gmi";
+                                           };
+                                           c14 {
+                                                   regulator-consumer-supply = "pwrdet_nand";
+                                           };
+                                           c15 {
+                                                   regulator-consumer-supply = "avdd_osc";
+                                           };
+                                   };
+                           };
+
+                               as3722_sd6: sd6 {
+                                   regulator-name = "vdd-gpu";
+                                   regulator-min-microvolt = <650000>;
+                                   regulator-max-microvolt = <1200000>;
+                                   regulator-min-microamp = <3500000>;
+                                   regulator-max-microamp = <3500000>;
+                                   regulator-init-microvolt = <1000000>;
+                                   regulator-boot-on;
+
+                                   consumers {
+                                           c1 {
+                                           regulator-consumer-supply = "vdd_gpu";
+                                           };
+                                           c2 {
+                                           regulator-consumer-supply = "vdd_gpu_simon";
+                                           };
+                                   };
+                           };
+
+                               as3722_ldo0: ldo0 {
+                                    regulator-name = "avdd-pll";
+                                    regulator-always-on;
+                                    regulator-boot-on;
+                                    ams,ext-control = <AS3722_EXT_CONTROL_ENABLE1>;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "avdd_pll_m";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "avdd_pll_ap_c2_c3";
+                                            };
+                                            c3 {
+                                                    regulator-consumer-supply = "avdd_pll_cud2dpd";
+                                            };
+                                            c4 {
+                                                    regulator-consumer-supply = "avdd_pll_c4";
+                                            };
+                                            c5 {
+                                                    regulator-consumer-supply = "avdd_lvds0_io";
+                                            };
+                                            c6 {
+                                                    regulator-consumer-supply = "vddio_ddr_hs";
+                                            };
+                                            c7 {
+                                                    regulator-consumer-supply = "avdd_pll_erefe";
+                                            };
+                                            c8 {
+                                                    regulator-consumer-supply = "avdd_pll_x";
+                                            };
+                                            c9 {
+                                                    regulator-consumer-supply = "avdd_pll_cg";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo1: ldo1 {
+                                    regulator-name = "vdd-cam";
+                                    regulator-min-microvolt = <1800000>;
+                                    regulator-max-microvolt = <1800000>;
+                                    regulator-boot-on;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vddio_cam";
+                                                    regulator-consumer-device = "vi";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "pwrdet_cam";
+
+                                            };
+                                            c3 {
+                                                    regulator-consumer-supply = "vdd_cam_1v8_cam";
+                                            };
+                                            c4 {
+                                                    regulator-consumer-supply = "vif";
+                                                    regulator-consumer-device = "2-0010";
+                                            };
+                                            c5 {
+                                                    regulator-consumer-supply = "vif";
+                                                    regulator-consumer-device = "2-0036";
+                                            };
+                                            c6 {
+                                                    regulator-consumer-supply = "vdd_i2c";
+                                                    regulator-consumer-device = "2-000c";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo2: ldo2 {
+                                    regulator-name = "avdd-dsi-csi";
+                                    regulator-boot-on;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vddio_hsic";
+                                                    regulator-consumer-device = "tegra-ehci.1";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "vddio_hsic";
+                                                    regulator-consumer-device = "tegra-ehci.2";
+                                            };
+                                            c3 {
+                                                    regulator-consumer-supply = "vddio_hsic";
+                                                    regulator-consumer-device = "tegra-xhci";
+                                            };
+                                            c4 {
+                                                    regulator-consumer-supply = "avdd_dsi_csi";
+                                                    regulator-consumer-device = "tegradc.0";
+                                            };
+                                            c5 {
+                                                    regulator-consumer-supply = "avdd_dsi_csi";
+                                                    regulator-consumer-device = "tegradc.1";
+                                            };
+                                            c6 {
+                                                    regulator-consumer-supply = "avdd_dsi_csi";
+                                                    regulator-consumer-device = "vi.0";
+                                            };
+                                            c7 {
+                                                    regulator-consumer-supply = "avdd_dsi_csi";
+                                                    regulator-consumer-device = "vi.1";
+                                            };
+                                            c8 {
+                                                    regulator-consumer-supply = "pwrdet_mipi";
+                                            };
+                                            c9 {
+                                                    regulator-consumer-supply = "avdd_hsic_com";
+                                            };
+                                            c10 {
+                                                    regulator-consumer-supply = "avdd_hsic_mdm";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo3: ldo3 {
+                                    regulator-name = "vdd-rtc";
+                                    regulator-min-microvolt = <800000>;
+                                    regulator-max-microvolt = <800000>;
+                                    regulator-always-on;
+                                    regulator-boot-on;
+                                    ams,enable-tracking;
+                                    ams,disable-tracking-suspend;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vdd_rtc";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo4: ldo4 {
+                                    regulator-name = "avdd-cam";
+                                    regulator-min-microvolt = <2700000>;
+                                    regulator-max-microvolt = <2700000>;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vdd_2v7_hv";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "avdd_cam2_cam";
+                                            };
+                                            c3 {
+                                                    regulator-consumer-supply = "vana";
+                                                    regulator-consumer-device = "2-0010";
+                                            };
+                                            c4 {
+                                                    regulator-consumer-supply = "vana";
+                                                    regulator-consumer-device = "2-000c";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo5: ldo5 {
+                                    regulator-name = "vdd-1v2-cam";
+                                    regulator-min-microvolt = <1200000>;
+                                    regulator-max-microvolt = <1200000>;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vdd_1v2_cam";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "vdig";
+                                                    regulator-consumer-device = "2-0010";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo6: ldo6 {
+                                    regulator-name = "vddio-sdmmc-2";
+                                    regulator-min-microvolt = <1800000>;
+                                    regulator-max-microvolt = <3300000>;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vddio_sdmmc";
+                                                    regulator-consumer-device = "sdhci-tegra.2";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "pwrdet_sdmmc3";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo7: ldo7 {
+                                    regulator-name = "vdd-1v1-cam";
+                                    regulator-min-microvolt = <1050000>;
+                                    regulator-max-microvolt = <1050000>;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "vdd_cam_1v1_cam";
+                                            };
+                                            c2 {
+                                                    regulator-consumer-supply = "imx135_reg2";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo9: ldo9 {
+                                    regulator-name = "avdd-spi";
+                                    regulator-min-microvolt = <3300000>;
+                                    regulator-max-microvolt = <3300000>;
+                                    regulator-boot-on;
+
+                                    consumers {
+                                            c1 {
+                                                    regulator-consumer-supply = "avdd";
+                                                    regulator-consumer-device = "spi0.0";
+                                            };
+                                    };
+                            };
+
+                               as3722_ldo10: ldo10 {
+                                     regulator-name = "vdd-2v7-cam";
+                                     regulator-min-microvolt = <2700000>;
+                                     regulator-max-microvolt = <2700000>;
+
+                                     consumers {
+                                             c1 {
+                                                     regulator-consumer-supply = "avdd_af1_cam";
+                                             };
+                                             c2 {
+                                                     regulator-consumer-supply = "avdd_cam1_cam";
+                                             };
+                                             c3 {
+                                                     regulator-consumer-supply = "imx135_reg1";
+                                             };
+                                             c4 {
+                                                     regulator-consumer-supply = "vdd";
+                                                     regulator-consumer-device = "2-000c";
+                                             };
+                                     };
+                             };
+
+                               as3722_ldo11: ldo11 {
+                                     regulator-name = "vpp-fuse";
+                                     regulator-min-microvolt = <1800000>;
+                                     regulator-max-microvolt = <1800000>;
+                               };
+                       };
+               };
+       };
+
+       /* Populate fuse supply */
+       efuse@7000f800 {
+               vpp_fuse-supply = <&as3722_ldo11>;
+       };
+};