The Audio DSP (ADSP) handles audio related modules.
Required properties:
- - compatible: should be set to "nvidia,tegra210-adsp" for t210
- &
- should be set to "nvidia,tegra18x-adsp" for t186
- - reg: should contain ADSP registers' location and length
+ - compatible: should be set to "nvidia,tegra210-adsp" for t210
+ - reg: should contain ADSP registers' location and length
+ - nvidia,adsp_mem: should contain Memory address and sizes of ADSP OS, APP, ARAM
Example:
adsp {
- compatible = "nvidia,tegra210-adsp";
- reg = <0x70080000 0x1000>;
+ compatible = "nvidia,tegra210-adsp";
+ reg = <0x0 0x702ef000 0x0 0x1000>, /* AMC */
+ <0x0 0x702ec000 0x0 0x2000>, /* AMISC */
+ <0x0 0x702ee000 0x0 0x1000>, /* ABRIDGE */
+ <0x0 0x01000000 0x0 0x6f2c0000>, /* DRAM MAP1 */
+ <0x0 0x70300000 0x0 0x8fd00000>; /* DRAM MAP2 */
+ nvidia,adsp_mem = <0x80300000 0x01000000>, /* ADSP OS */
+ <0x80B00000 0x00800000>; /* ADSP APP */
};
<0x0 0x01000000 0x0 0x6f2c0000>, /* DRAM MAP1 */
<0x0 0x70300000 0x0 0x8fd00000>; /* DRAM MAP2 */
iommus = <&smmu TEGRA_SWGROUP_APE>;
+ nvidia,adsp_mem = <0x80300000 0x01000000>, /* ADSP OS */
+ <0x80B00000 0x00800000>; /* ADSP APP */
status = "disabled";
};
}
EXPORT_SYMBOL(nvadsp_get_timestamp_counter);
+static int __init nvadsp_parse_dt(struct platform_device *pdev)
+{
+ struct nvadsp_drv_data *drv_data = platform_get_drvdata(pdev);
+ struct device *dev = &pdev->dev;
+ struct device_node *of_node;
+ u32 *adsp_mem;
+ int iter;
+
+ adsp_mem = drv_data->adsp_mem;
+ of_node = dev->of_node;
+
+ for (iter = 0; iter < ADSP_MEM_END; iter++) {
+ if (of_property_read_u32_index(dev->of_node, "nvidia,adsp_mem",
+ iter, &adsp_mem[iter])) {
+ dev_err(dev, "adsp mem node %d not found\n", iter);
+ return -EINVAL;
+ }
+ }
+ return 0;
+
+}
+
static int __init nvadsp_probe(struct platform_device *pdev)
{
struct nvadsp_drv_data *drv_data;
+ struct device *dev = &pdev->dev;
struct resource *res = NULL;
void __iomem *base = NULL;
int ret = 0;
int iter;
int dram_iter;
- struct device *dev = &pdev->dev;
dev_info(dev, "in probe()...\n");
goto out;
}
+ platform_set_drvdata(pdev, drv_data);
+ ret = nvadsp_parse_dt(pdev);
+ if (ret)
+ goto out;
+
#if CONFIG_DEBUG_FS
if (adsp_debug_init(drv_data))
dev_err(dev,
nvadsp_drv_data = drv_data;
- platform_set_drvdata(pdev, drv_data);
-
tegra_ape_pd_add_device(dev);
pm_genpd_dev_need_save(dev, true);
pm_genpd_dev_need_restore(dev, true);
ADSP_MAX_DRAM_MAP
};
+enum adsp_mem_dt {
+ ADSP_OS_ADDR,
+ ADSP_OS_SIZE,
+ ADSP_APP_ADDR,
+ ADSP_APP_SIZE,
+ ADSP_MEM_END,
+};
+
+
#define AMISC_REGS 0x2000
#define AMISC_ADSP_L2_REGFILEBASE 0x10
#ifdef CONFIG_TEGRA_ADSP_ACTMON
bool actmon_initialized;
#endif
+ u32 adsp_mem[ADSP_MEM_END];
};
#define ADSP_CONFIG 0x04
struct mutex fw_load_lock;
bool os_running;
struct mutex os_run_lock;
+ dma_addr_t adsp_os_addr;
+ size_t adsp_os_size;
+ dma_addr_t app_alloc_addr;
+ size_t app_size;
};
static struct nvadsp_os_data priv;
int ret = 0;
#if defined(CONFIG_TEGRA_NVADSP_ON_SMMU)
- addr = ADSP_SMMU_LOAD_ADDR;
- size = ADSP_SMMU_SIZE;
+ addr = priv.adsp_os_addr;
+ size = priv.adsp_os_size;
dram_va = dma_alloc_at_coherent(dev, size, &addr, GFP_KERNEL);
if (!dram_va) {
dev_err(dev, "unable to allocate SMMU pages\n");
static void deallocate_memory_for_adsp_os(struct device *dev)
{
#if defined(CONFIG_TEGRA_NVADSP_ON_SMMU)
- void *va = nvadsp_da_to_va_mappings(ADSP_SMMU_LOAD_ADDR,
- ADSP_SMMU_SIZE);
- dma_free_coherent(dev, ADSP_SMMU_SIZE, va, ADSP_SMMU_LOAD_ADDR);
+ void *va = nvadsp_da_to_va_mappings(priv.adsp_os_addr,
+ priv.adsp_os_size);
+ dma_free_coherent(dev, priv.adsp_os_addr, va, priv.adsp_os_size);
#endif
}
goto deallocate_os_memory;
}
- ret = dram_app_mem_init(ADSP_APP_MEM_SMMU_ADDR, ADSP_APP_MEM_SIZE);
+ ret = dram_app_mem_init(priv.app_alloc_addr, priv.app_size);
if (ret) {
dev_err(dev, "Memory allocation dynamic apps failed\n");
goto deallocate_os_memory;
priv.misc_base = drv_data->base_regs[AMISC];
priv.dram_region = drv_data->dram_region;
+ priv.adsp_os_addr = drv_data->adsp_mem[ADSP_OS_ADDR];
+ priv.adsp_os_size = drv_data->adsp_mem[ADSP_OS_SIZE];
+ priv.app_alloc_addr = drv_data->adsp_mem[ADSP_APP_ADDR];
+ priv.app_size = drv_data->adsp_mem[ADSP_APP_SIZE];
+
ret = devm_request_irq(dev, wdt_virq, adsp_wdt_handler,
IRQF_TRIGGER_RISING, "adsp watchdog", &priv);
if (ret) {
#define APE_FPGA_MISC_RST_DEVICES 0x702dc800 /*1882048512*/
#define APE_RESET (1 << 6)
-#define ADSP_SMMU_LOAD_ADDR 0x80300000
-#define ADSP_APP_MEM_SMMU_ADDR (ADSP_SMMU_LOAD_ADDR + SZ_8M)
-#define ADSP_APP_MEM_SIZE SZ_8M
-#define ADSP_SMMU_SIZE SZ_16M
-
#define AMC_EVP_RESET_VEC_0 0x700
#define AMC_EVP_UNDEF_VEC_0 0x704
#define AMC_EVP_SWI_VEC_0 0x708