]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
dvfs: tegra21: Increase CPU max rate to 2.014 GHz
authorAlex Frid <afrid@nvidia.com>
Fri, 6 Mar 2015 20:54:41 +0000 (12:54 -0800)
committerBo Yan <byan@nvidia.com>
Thu, 26 Mar 2015 12:35:57 +0000 (05:35 -0700)
Increased CPU max rate to 2.014 GHz for shield sku.

Bug 1558421

Change-Id: Ic803f91d109a7c4be6476a5417f24719361c3ed0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/714879
Reviewed-by: Bo Yan <byan@nvidia.com>
drivers/platform/tegra/tegra21_dvfs.c
drivers/platform/tegra/tegra21_speedo.c

index 0e92a42ac5325afdab3f20422431bedb9b19b4b8..0b0a33438a41d2979616ba935c1a0c6cd510b135 100644 (file)
@@ -92,7 +92,7 @@ static struct dvfs_rail tegra21_dvfs_rail_vdd_cpu = {
        .stats = {
                .bin_uV = 6250, /* 6.25mV */
        },
-       .version = "p4v22",
+       .version = "p4v29",
 };
 
 static struct dvfs_rail tegra21_dvfs_rail_vdd_core = {
@@ -137,8 +137,8 @@ static struct dvfs_rail *tegra21_dvfs_rails[] = {
 
 /* CPU DVFS tables */
 static unsigned long cpu_max_freq[] = {
-/* speedo_id   0        1      */
-               1912500, 1912500,
+/* speedo_id   0        1        2      */
+               1912500, 1912500, 2014500,
 };
 
 #define CPU_CVB_TABLE          \
@@ -165,10 +165,41 @@ static unsigned long cpu_max_freq[] = {
                { 1734000, {   766504,    62165,    -2323 }, {  3386160 , -154021 ,  2393  } }, \
                { 1836000, {   832865,    60975,    -2323 }, {  5100873 , -279186 ,  4747  } }, \
                { 1912500, {   863559,    60085,    -2323 }, {  5100873 , -279186 ,  4747  } }, \
+               { 2014500, {   939271,    58895,    -2323 }, {  5100873 , -279186 ,  4747  } }, \
                { 0,       { }, { }, }, \
        }
 
 static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
+       {
+               .speedo_id = 2,
+               .process_id = 0,
+               .dfll_tune_data  = {
+                       .tune0          = 0xFFEAD0FF,
+                       .tune1          = 0x020091D9,
+                       .droop_rate_min = 1000000,
+                       .min_millivolts = 870,
+               },
+               .pll_tune_data = {
+                       .min_millivolts = 950,
+               },
+               .max_mv = 1227,
+               CPU_CVB_TABLE,
+       },
+       {
+               .speedo_id = 2,
+               .process_id = 1,
+               .dfll_tune_data  = {
+                       .tune0          = 0xFFEAD0FF,
+                       .tune1          = 0x025501D0,
+                       .droop_rate_min = 1000000,
+                       .min_millivolts = 870,
+               },
+               .pll_tune_data = {
+                       .min_millivolts = 950,
+               },
+               .max_mv = 1227,
+               CPU_CVB_TABLE,
+       },
        {
                .speedo_id = -1,
                .process_id = 0,
@@ -214,8 +245,8 @@ static struct dvfs cpu_dvfs = {
 
 /* CPU LP DVFS tables */
 static unsigned long cpu_lp_max_freq[] = {
-/* speedo_id   0        1      */
-               1228800, 1228800,
+/* speedo_id   0        1        2 */
+               1228800, 1228800, 1228800,
 };
 
 #define CPU_LP_CVB_TABLE       \
index b7db786a49e20c8da43bf723a182cee6d7d59442..f8f2ebfe4254e1b5cbf1edb0ced618959bfb1efa 100644 (file)
@@ -100,19 +100,25 @@ static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = {
 
 static void rev_sku_to_speedo_ids(int rev, int sku, int speedo_rev)
 {
+       bool shield_sku = false;
+
+#ifdef CONFIG_OF
+       shield_sku = of_property_read_bool(of_chosen,
+                                          "nvidia,tegra-shield-sku");
+#endif
        switch (sku) {
        case 0x00: /* Engg sku */
        case 0x01: /* Engg sku */
        case 0x07:
        case 0x17:
        case 0x27:
-               cpu_speedo_id = 0;
+               cpu_speedo_id = shield_sku ? 2 : 0;
                soc_speedo_id = 0;
                gpu_speedo_id = speedo_rev >= 2 ? 1 : 0;
                threshold_index = 0;
                break;
        case 0x13:
-               cpu_speedo_id = 1;
+               cpu_speedo_id = shield_sku ? 2 : 1;
                soc_speedo_id = 0;
                gpu_speedo_id = speedo_rev >= 2 ? 1 : 0;
                threshold_index = 0;