ARM: tegra: dvfs: Add 1st CL-DVFS out disable fence

Added read fence after CL-DVFS output is disabled first time during
initialization. This is necessary to avoid spurious I2C transaction
when updating output limits on tegra SoC that has I2C output enable
control register and output limits register separated in different
apertures.

Bug 144152

Change-Id: Ifd5931bf79689f88389bbff3d7bd27f522c98b5c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/373338
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.c b/arch/arm/mach-tegra/tegra_cl_dvfs.c
index 7df1bd9f03b353ebd51a5eccb84b2a7439e514fa..7a3b8919c091ca69a14cdd5a925fe0d435679a7c 100644 (file)
--- a/arch/arm/mach-tegra/tegra_cl_dvfs.c
+++ b/arch/arm/mach-tegra/tegra_cl_dvfs.c
@@ -1374,7 +1374,17 @@ static void cl_dvfs_init_out_if(struct tegra_cl_dvfs *cld)
                cld->lut_max = get_output_cap(cld, NULL);
        }
 
+       /*
+        * Disable output interface. If configuration and I2C address spaces
+        * are separated, output enable/disable control and output limits are
+        * in different apertures and output must be disabled 1st to avoid
+        * spurious I2C transaction. If configuration and I2C address spaces
+        * are combined output enable/disable control and output limits are
+        * in the same register, and it is safe to just clear it.
+        */
        cl_dvfs_i2c_writel(cld, 0, CL_DVFS_OUTPUT_CFG);
+       cl_dvfs_i2c_wmb(cld);
+
        val = (cld->safe_output << CL_DVFS_OUTPUT_CFG_SAFE_SHIFT) |
                (out_max << CL_DVFS_OUTPUT_CFG_MAX_SHIFT) |
                (out_min << CL_DVFS_OUTPUT_CFG_MIN_SHIFT);