bw,
disp_params);
if (!err) {
- struct clk *emc_la_clk = clk_get(&dc->ndev->dev, "emc.la");
- clk_set_rate(emc_la_clk, emc_freq_hz);
+ clk_set_rate(dc->emc_la_clk, emc_freq_hz);
break;
}
tegra_dc_put(dc);
+ clk_prepare_enable(dc->emc_la_clk);
+
return true;
}
#endif
tegra_dc_clk_disable(dc);
else
tegra_dvfs_set_rate(dc->clk, 0);
+
+ clk_disable_unprepare(dc->emc_la_clk);
}
void tegra_dc_stats_enable(struct tegra_dc *dc, bool enable)
#else
int isomgr_client_id = -1;
#endif
+ struct clk *emc_la_clk;
struct device_node *np = ndev->dev.of_node;
struct resource *res;
struct resource dt_res;
}
dc->emc_clk = emc_clk;
#endif
+ /*
+ * The emc_la clock is being added to set the floor value
+ * for emc depending on the LA calculaions for each window
+ */
+ emc_la_clk = clk_get(&ndev->dev, "emc.la");
+ if (IS_ERR_OR_NULL(emc_la_clk)) {
+ dev_err(&ndev->dev, "can't get emc.la clock\n");
+ ret = -ENOENT;
+ goto err_put_clk;
+ }
+ dc->emc_la_clk = emc_la_clk;
+ clk_set_rate(dc->emc_la_clk, 0);
#ifdef CONFIG_TEGRA_DC_EXTENSIONS
dc->ext = tegra_dc_ext_register(ndev, dc);
#else
clk_put(emc_clk);
#endif
+ clk_put(dc->emc_la_clk);
err_put_clk:
#ifdef CONFIG_SWITCH
if (dc->switchdev_registered)
#else
clk_put(dc->emc_clk);
#endif
+ clk_put(dc->emc_la_clk);
+
clk_put(dc->clk);
iounmap(dc->base);
if (dc->fb_mem)