ARM: tegra: pmc: T12x wake status clear fix
Problem:
T12x PMC Wake status gets cleared during
LP0 resume
Cause:
During LP0 resume, T12x APBDEV_PMC_DPD_ENABLE_0
register's TSC_MULT_EN bit needs to be
programmed after DPD_ENABLE is cleared.
Fix:
Cleared the DPD_ENABLE bit along with
TSC_MULT_EN bit clear during LP0 resume
for T12x
bug
1367291
Change-Id: Ifcc25709ffb012b4e6d4d0bb325f12d1ede94413
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/273646
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>