ARM: tegra: dvfs: Tune DFLL low at cold

ARM: tegra: dvfs: Tune DFLL low at cold

Added an option to tune DFLL low in the entire voltage range while
temperature is below minimum trip-point; still different tuning setting
are used in low and high voltage ranges while temperature is above cold
trip-point. For now, this option is disabled on all Tegra platforms.

Bug 1492902

Change-Id: Ibf080279b034522add8eed4da15617b59ac1a59a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/391123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>