2 * include/linux/tegra_profiler.h
4 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #ifndef __TEGRA_PROFILER_H
18 #define __TEGRA_PROFILER_H
20 #include <linux/ioctl.h>
22 #define QUADD_SAMPLES_VERSION 27
23 #define QUADD_IO_VERSION 12
25 #define QUADD_IO_VERSION_DYNAMIC_RB 5
26 #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6
27 #define QUADD_IO_VERSION_MOD_STATE_STATUS_FIELD 7
28 #define QUADD_IO_VERSION_BT_KERNEL_CTX 8
29 #define QUADD_IO_VERSION_GET_MMAP 9
30 #define QUADD_IO_VERSION_BT_UNWIND_TABLES 10
31 #define QUADD_IO_VERSION_UNWIND_MIXED 11
32 #define QUADD_IO_VERSION_EXTABLES_MMAP 12
34 #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17
35 #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18
36 #define QUADD_SAMPLE_VERSION_THREAD_STATE_FLD 19
37 #define QUADD_SAMPLE_VERSION_BT_UNWIND_TABLES 22
38 #define QUADD_SAMPLE_VERSION_SUPPORT_IP64 23
39 #define QUADD_SAMPLE_VERSION_SPECIAL_MMAP 24
40 #define QUADD_SAMPLE_VERSION_UNWIND_MIXED 25
41 #define QUADD_SAMPLE_VERSION_UNW_ENTRY_TYPE 26
42 #define QUADD_SAMPLE_VERSION_USE_ARCH_TIMER 27
44 #define QUADD_MAX_COUNTERS 32
45 #define QUADD_MAX_PROCESS 64
47 #define QUADD_DEVICE_NAME "quadd"
48 #define QUADD_AUTH_DEVICE_NAME "quadd_auth"
50 #define QUADD_MOD_DEVICE_NAME "quadd_mod"
51 #define QUADD_MOD_AUTH_DEVICE_NAME "quadd_mod_auth"
53 #define QUADD_IOCTL 100
56 * Setup params (profiling frequency, etc.)
58 #define IOCTL_SETUP _IOW(QUADD_IOCTL, 0, struct quadd_parameters)
63 #define IOCTL_START _IO(QUADD_IOCTL, 1)
68 #define IOCTL_STOP _IO(QUADD_IOCTL, 2)
71 * Getting capabilities
73 #define IOCTL_GET_CAP _IOR(QUADD_IOCTL, 3, struct quadd_comm_cap)
76 * Getting state of module
78 #define IOCTL_GET_STATE _IOR(QUADD_IOCTL, 4, struct quadd_module_state)
81 * Getting version of module
83 #define IOCTL_GET_VERSION _IOR(QUADD_IOCTL, 5, struct quadd_module_version)
86 * Send exception-handling tables info
88 #define IOCTL_SET_EXTAB _IOW(QUADD_IOCTL, 6, struct quadd_extables)
90 #define QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP (1 << 29) /* LP CPU */
91 #define QUADD_CPUMODE_THUMB (1 << 30) /* thumb mode */
93 enum quadd_events_id {
94 QUADD_EVENT_TYPE_CPU_CYCLES = 0,
96 QUADD_EVENT_TYPE_INSTRUCTIONS,
97 QUADD_EVENT_TYPE_BRANCH_INSTRUCTIONS,
98 QUADD_EVENT_TYPE_BRANCH_MISSES,
99 QUADD_EVENT_TYPE_BUS_CYCLES,
101 QUADD_EVENT_TYPE_L1_DCACHE_READ_MISSES,
102 QUADD_EVENT_TYPE_L1_DCACHE_WRITE_MISSES,
103 QUADD_EVENT_TYPE_L1_ICACHE_MISSES,
105 QUADD_EVENT_TYPE_L2_DCACHE_READ_MISSES,
106 QUADD_EVENT_TYPE_L2_DCACHE_WRITE_MISSES,
107 QUADD_EVENT_TYPE_L2_ICACHE_MISSES,
109 QUADD_EVENT_TYPE_MAX,
120 enum quadd_record_type {
121 QUADD_RECORD_TYPE_SAMPLE = 1,
122 QUADD_RECORD_TYPE_MMAP,
123 QUADD_RECORD_TYPE_MA,
124 QUADD_RECORD_TYPE_COMM,
125 QUADD_RECORD_TYPE_DEBUG,
126 QUADD_RECORD_TYPE_HEADER,
127 QUADD_RECORD_TYPE_POWER_RATE,
128 QUADD_RECORD_TYPE_ADDITIONAL_SAMPLE,
131 enum quadd_event_source {
132 QUADD_EVENT_SOURCE_PMU = 1,
133 QUADD_EVENT_SOURCE_PL310,
136 enum quadd_cpu_mode {
137 QUADD_CPU_MODE_KERNEL = 1,
142 #pragma pack(push, 1)
144 #define QUADD_SAMPLE_UNW_METHOD_SHIFT 0
145 #define QUADD_SAMPLE_UNW_METHOD_MASK (1 << QUADD_SAMPLE_UNW_METHOD_SHIFT)
148 QUADD_UNW_METHOD_FP = 0,
149 QUADD_UNW_METHOD_EHT,
150 QUADD_UNW_METHOD_MIXED,
153 #define QUADD_SAMPLE_URC_SHIFT 1
154 #define QUADD_SAMPLE_URC_MASK (0x0f << QUADD_SAMPLE_URC_SHIFT)
157 QUADD_URC_SUCCESS = 0,
159 QUADD_URC_IDX_NOT_FOUND,
160 QUADD_URC_TBL_NOT_EXIST,
162 QUADD_URC_TBL_IS_CORRUPT,
163 QUADD_URC_CANTUNWIND,
164 QUADD_URC_UNHANDLED_INSTRUCTION,
165 QUADD_URC_REFUSE_TO_UNWIND,
166 QUADD_URC_SP_INCORRECT,
167 QUADD_URC_SPARE_ENCODING,
168 QUADD_URC_UNSUPPORTED_PR,
169 QUADD_URC_PC_INCORRECT,
170 QUADD_URC_LEVEL_TOO_DEEP,
171 QUADD_URC_FP_INCORRECT,
175 #define QUADD_SED_IP64 (1 << 0)
177 #define QUADD_SED_UNW_METHOD_SHIFT 1
178 #define QUADD_SED_UNW_METHOD_MASK (0x07 << QUADD_SED_UNW_METHOD_SHIFT)
181 QUADD_UNW_TYPE_FP = 0,
183 QUADD_UNW_TYPE_LR_FP,
184 QUADD_UNW_TYPE_LR_UT,
188 struct quadd_sample_data {
205 #define QUADD_MMAP_ED_IS_FILE_EXISTS (1 << 0)
207 struct quadd_mmap_data {
217 struct quadd_ma_data {
225 struct quadd_power_rate_data {
234 struct quadd_additional_sample {
242 QM_DEBUG_SAMPLE_TYPE_SCHED_IN = 1,
243 QM_DEBUG_SAMPLE_TYPE_SCHED_OUT,
245 QM_DEBUG_SAMPLE_TYPE_TIMER_HANDLE,
246 QM_DEBUG_SAMPLE_TYPE_TIMER_START,
247 QM_DEBUG_SAMPLE_TYPE_TIMER_CANCEL,
248 QM_DEBUG_SAMPLE_TYPE_TIMER_FORWARD,
250 QM_DEBUG_SAMPLE_TYPE_READ_COUNTER,
252 QM_DEBUG_SAMPLE_TYPE_SOURCE_START,
253 QM_DEBUG_SAMPLE_TYPE_SOURCE_STOP,
256 struct quadd_debug_data {
272 #define QUADD_HEADER_MAGIC 0x1122
274 struct quadd_header_data {
284 reserved:26; /* reserved fields for future extensions */
294 struct quadd_record_data {
297 /* sample: it should be the biggest size */
299 struct quadd_sample_data sample;
300 struct quadd_mmap_data mmap;
301 struct quadd_ma_data ma;
302 struct quadd_debug_data debug;
303 struct quadd_header_data hdr;
304 struct quadd_power_rate_data power_rate;
305 struct quadd_additional_sample additional_sample;
311 #define QUADD_MAX_PACKAGE_NAME 320
314 QUADD_PARAM_IDX_SIZE_OF_RB = 0,
315 QUADD_PARAM_IDX_EXTRA = 1,
318 #define QUADD_PARAM_EXTRA_GET_MMAP (1 << 0)
319 #define QUADD_PARAM_EXTRA_BT_FP (1 << 1)
320 #define QUADD_PARAM_EXTRA_BT_UNWIND_TABLES (1 << 2)
321 #define QUADD_PARAM_EXTRA_BT_MIXED (1 << 3)
323 struct quadd_parameters {
333 u32 pids[QUADD_MAX_PROCESS];
336 u8 package_name[QUADD_MAX_PACKAGE_NAME];
338 u32 events[QUADD_MAX_COUNTERS];
341 u32 reserved[16]; /* reserved fields for future extensions */
344 struct quadd_events_cap {
347 branch_instructions:1,
351 l1_dcache_read_misses:1,
352 l1_dcache_write_misses:1,
355 l2_dcache_read_misses:1,
356 l2_dcache_write_misses:1,
361 QUADD_COMM_CAP_IDX_EXTRA = 0,
364 #define QUADD_COMM_CAP_EXTRA_BT_KERNEL_CTX (1 << 0)
365 #define QUADD_COMM_CAP_EXTRA_GET_MMAP (1 << 1)
366 #define QUADD_COMM_CAP_EXTRA_GROUP_SAMPLES (1 << 2)
367 #define QUADD_COMM_CAP_EXTRA_BT_UNWIND_TABLES (1 << 3)
368 #define QUADD_COMM_CAP_EXTRA_SUPPORT_AARCH64 (1 << 4)
369 #define QUADD_COMM_CAP_EXTRA_SPECIAL_ARCH_MMAP (1 << 5)
370 #define QUADD_COMM_CAP_EXTRA_UNWIND_MIXED (1 << 6)
371 #define QUADD_COMM_CAP_EXTRA_UNW_ENTRY_TYPE (1 << 7)
372 #define QUADD_COMM_CAP_EXTRA_USE_ARCH_TIMER (1 << 8)
374 struct quadd_comm_cap {
378 l2_multiple_events:1,
382 struct quadd_events_cap events_cap;
384 u32 reserved[16]; /* reserved fields for future extensions */
388 QUADD_MOD_STATE_IDX_RB_MAX_FILL_COUNT = 0,
389 QUADD_MOD_STATE_IDX_STATUS,
392 #define QUADD_MOD_STATE_STATUS_IS_ACTIVE (1 << 0)
393 #define QUADD_MOD_STATE_STATUS_IS_AUTH_OPEN (1 << 1)
395 struct quadd_module_state {
397 u64 nr_skipped_samples;
400 u32 buffer_fill_size;
402 u32 reserved[16]; /* reserved fields for future extensions */
405 struct quadd_module_version {
412 u32 reserved[4]; /* reserved fields for future extensions */
415 struct quadd_sec_info {
421 QUADD_EXT_IDX_EXTAB_OFFSET = 0,
422 QUADD_EXT_IDX_EXIDX_OFFSET = 1,
423 QUADD_EXT_IDX_MMAP_VM_START = 2,
426 struct quadd_extables {
430 struct quadd_sec_info extab;
431 struct quadd_sec_info exidx;
433 u32 reserved[4]; /* reserved fields for future extensions */
441 struct vm_area_struct;
443 #ifdef CONFIG_TEGRA_PROFILER
444 extern void __quadd_task_sched_in(struct task_struct *prev,
445 struct task_struct *task);
446 extern void __quadd_task_sched_out(struct task_struct *prev,
447 struct task_struct *next);
449 extern void __quadd_event_mmap(struct vm_area_struct *vma);
451 static inline void quadd_task_sched_in(struct task_struct *prev,
452 struct task_struct *task)
454 __quadd_task_sched_in(prev, task);
457 static inline void quadd_task_sched_out(struct task_struct *prev,
458 struct task_struct *next)
460 __quadd_task_sched_out(prev, next);
463 static inline void quadd_event_mmap(struct vm_area_struct *vma)
465 __quadd_event_mmap(vma);
468 #else /* CONFIG_TEGRA_PROFILER */
470 static inline void quadd_task_sched_in(struct task_struct *prev,
471 struct task_struct *task)
475 static inline void quadd_task_sched_out(struct task_struct *prev,
476 struct task_struct *next)
480 static inline void quadd_event_mmap(struct vm_area_struct *vma)
484 #endif /* CONFIG_TEGRA_PROFILER */
486 #endif /* __KERNEL__ */
488 #endif /* __TEGRA_PROFILER_H */