2 * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
4 * Copyright (c) 2010 Google, Inc.
5 * Copyright (c) 2009-2014 NVIDIA CORPORATION. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/err.h>
20 #include <linux/platform_device.h>
21 #include <linux/platform_data/tegra_usb.h>
22 #include <linux/irq.h>
23 #include <linux/usb/otg.h>
24 #include <linux/gpio.h>
26 #include <linux/delay.h>
27 #include <linux/of_gpio.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/tegra-soc.h>
31 #include <linux/usb/tegra_usb_phy.h>
33 #include <linux/tegra_pm_domains.h>
34 #include <linux/pm_qos.h>
35 #include <linux/wakelock.h>
36 #include <linux/irqchip/tegra.h>
38 /* HACK! This needs to come from DT */
39 #include "../../../arch/arm/mach-tegra/iomap.h"
40 #include "../../../arch/arm/mach-tegra/board.h"
43 #define EHCI_DBG(stuff...) pr_info("ehci-tegra: " stuff)
45 #define EHCI_DBG(stuff...) do {} while (0)
48 #if defined(CONFIG_ARM64)
49 #define UTMI1_PORT_OWNER_XUSB 0x1
50 #define UTMI2_PORT_OWNER_XUSB 0x2
51 #define HSIC1_PORT_OWNER_XUSB 0x4
54 static const char driver_name[] = "tegra-ehci";
56 #define TEGRA_USB_DMA_ALIGN 32
58 #define HOSTPC_REG_OFFSET 0x1b4
60 #define HOSTPC1_DEVLC_STS (1 << 28)
61 #define HOSTPC1_DEVLC_NYT_ASUS 1
62 #define TEGRA_STREAM_DISABLE 0x1f8
63 #define TEGRA_STREAM_DISABLE_OFFSET (1 << 4)
65 struct tegra_ehci_hcd {
66 struct ehci_hcd *ehci;
67 struct tegra_usb_phy *phy;
68 struct usb_phy *transceiver;
69 struct mutex sync_lock;
70 struct wake_lock ehci_wake_lock;
73 bool bus_suspended_fail;
74 bool unaligned_dma_buf_supported;
76 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
79 bool cpu_boost_in_work;
80 struct delayed_work boost_cpu_freq_work;
81 struct pm_qos_request boost_cpu_freq_req;
83 bool is_skip_resume_enabled;
86 struct dma_align_buffer {
88 void *old_xfer_buffer;
92 static struct usb_phy *get_usb_phy(struct tegra_usb_phy *x)
94 return (struct usb_phy *)x;
97 static int tegra_ehci_port_speed(struct ehci_hcd *ehci)
99 u32 hostpc = ehci_readl(ehci, &ehci->regs->hostpc);
100 enum usb_device_speed port_speed;
102 switch ((hostpc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
104 port_speed = USB_SPEED_LOW;
107 port_speed = USB_SPEED_FULL;
110 port_speed = USB_SPEED_HIGH;
113 port_speed = USB_SPEED_UNKNOWN;
118 static void tegra_ehci_notify_event(struct tegra_ehci_hcd *tegra, int event)
120 tegra->transceiver->last_event = event;
121 atomic_notifier_call_chain(&tegra->transceiver->notifier, event,
122 tegra->transceiver->otg->gadget);
125 static void free_align_buffer(struct urb *urb, struct usb_hcd *hcd)
127 struct dma_align_buffer *temp;
128 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
130 if (tegra->unaligned_dma_buf_supported)
133 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
136 temp = container_of(urb->transfer_buffer,
137 struct dma_align_buffer, data);
139 /* In transaction, DMA from Device */
140 if (usb_urb_dir_in(urb))
141 memcpy(temp->old_xfer_buffer, temp->data,
142 urb->transfer_buffer_length);
144 urb->transfer_buffer = temp->old_xfer_buffer;
145 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
146 kfree(temp->kmalloc_ptr);
149 static int alloc_align_buffer(struct urb *urb, gfp_t mem_flags,
152 struct dma_align_buffer *temp, *kmalloc_ptr;
154 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
156 if (tegra->unaligned_dma_buf_supported)
159 if (urb->num_sgs || urb->sg ||
160 urb->transfer_buffer_length == 0 ||
161 !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
164 /* Allocate a buffer with enough padding for alignment */
165 kmalloc_size = urb->transfer_buffer_length +
166 sizeof(struct dma_align_buffer) + TEGRA_USB_DMA_ALIGN - 1;
167 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
172 /* Position our struct dma_align_buffer such that data is aligned */
173 temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
174 temp->kmalloc_ptr = kmalloc_ptr;
175 temp->old_xfer_buffer = urb->transfer_buffer;
176 /* OUT transaction, DMA to Device */
177 if (!usb_urb_dir_in(urb))
178 memcpy(temp->data, urb->transfer_buffer,
179 urb->transfer_buffer_length);
181 urb->transfer_buffer = temp->data;
182 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
187 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd,
188 struct urb *urb, gfp_t mem_flags)
192 ret = alloc_align_buffer(urb, mem_flags, hcd);
196 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
199 free_align_buffer(urb, hcd);
204 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd,
207 usb_hcd_unmap_urb_for_dma(hcd, urb);
208 free_align_buffer(urb, hcd);
211 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
212 static void tegra_ehci_boost_cpu_frequency_work(struct work_struct *work)
214 struct tegra_ehci_hcd *tegra = container_of(work,
215 struct tegra_ehci_hcd, boost_cpu_freq_work.work);
216 if (tegra->cpu_boost_in_work) {
217 tegra->boost_requested = true;
218 if (tegra->boost_enable)
219 pm_qos_update_request(
220 &tegra->boost_cpu_freq_req,
221 (s32)CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ * 1000);
226 static irqreturn_t tegra_ehci_irq(struct usb_hcd *hcd)
228 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
229 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
230 irqreturn_t irq_status;
232 spin_lock(&ehci->lock);
233 irq_status = tegra_usb_phy_irq(tegra->phy);
234 if (irq_status == IRQ_NONE) {
235 spin_unlock(&ehci->lock);
238 if (tegra_usb_phy_pmc_wakeup(tegra->phy)) {
239 ehci_dbg(ehci, "pmc interrupt detected\n");
240 wake_lock_timeout(&tegra->ehci_wake_lock, HZ);
241 usb_hcd_resume_root_hub(hcd);
242 hcd_to_bus(hcd)->skip_resume = false;
243 spin_unlock(&ehci->lock);
246 spin_unlock(&ehci->lock);
248 EHCI_DBG("%s() cmd = 0x%x, int_sts = 0x%x, portsc = 0x%x\n", __func__,
249 ehci_readl(ehci, &ehci->regs->command),
250 ehci_readl(ehci, &ehci->regs->status),
251 ehci_readl(ehci, &ehci->regs->port_status[0]));
253 irq_status = ehci_irq(hcd);
255 if (ehci->controller_remote_wakeup) {
256 ehci->controller_remote_wakeup = false;
257 tegra_usb_phy_pre_resume(tegra->phy, true);
258 tegra->port_resuming = 1;
264 static int tegra_ehci_hub_control(
273 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
274 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
276 u32 __iomem *status_reg;
278 if (!tegra_usb_phy_hw_accessible(tegra->phy)) {
280 memset(buf, 0, wLength);
284 /* Do tegra phy specific actions based on the type request */
287 if (tegra->port_resuming) {
289 int delay = ehci->reset_done[wIndex-1] - jiffies;
290 /* Sometimes it seems we get called too soon... In that case, wait.*/
292 ehci_dbg(ehci, "GetPortStatus called too soon, waiting %dms...\n", delay);
293 mdelay(jiffies_to_msecs(delay));
295 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
296 /* Ensure the port PORT_SUSPEND and PORT_RESUME has cleared */
297 if (handshake(ehci, status_reg, (PORT_SUSPEND | PORT_RESUME), 0, 25000)) {
298 EHCI_DBG("%s: timeout waiting for SUSPEND to clear\n", __func__);
300 tegra_usb_phy_post_resume(tegra->phy);
301 tegra->port_resuming = 0;
302 /* If run bit is not set by now enable it */
303 cmd = ehci_readl(ehci, &ehci->regs->command);
304 if (!(cmd & CMD_RUN)) {
306 ehci->command |= CMD_RUN;
307 ehci_writel(ehci, cmd, &ehci->regs->command);
309 /* Now we can safely re-enable irqs */
310 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
313 case ClearPortFeature:
314 if (wValue == USB_PORT_FEAT_SUSPEND) {
315 tegra_usb_phy_pre_resume(tegra->phy, false);
316 tegra->port_resuming = 1;
317 } else if (wValue == USB_PORT_FEAT_ENABLE) {
319 temp = ehci_readl(ehci, &ehci->regs->port_status[0]) & ~PORT_RWC_BITS;
320 ehci_writel(ehci, temp & ~PORT_PE, &ehci->regs->port_status[0]);
325 if (wValue == USB_PORT_FEAT_SUSPEND)
326 tegra_usb_phy_pre_suspend(tegra->phy);
330 /* handle ehci hub control request */
331 retval = ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
333 /* do tegra phy specific actions based on the type request */
337 if (wValue == USB_PORT_FEAT_SUSPEND) {
338 tegra_usb_phy_post_suspend(tegra->phy);
339 } else if (wValue == USB_PORT_FEAT_RESET) {
341 tegra_usb_phy_bus_reset(tegra->phy);
342 } else if (wValue == USB_PORT_FEAT_POWER) {
344 tegra_usb_phy_port_power(tegra->phy);
347 case ClearPortFeature:
348 if (wValue == USB_PORT_FEAT_SUSPEND) {
349 /* tegra USB controller needs 25 ms to resume the port */
350 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
359 static void tegra_ehci_shutdown(struct usb_hcd *hcd)
361 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
362 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
363 struct platform_device *pdev = to_platform_device(hcd->self.controller);
364 struct tegra_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
365 mutex_lock(&tegra->sync_lock);
366 if (tegra_usb_phy_hw_accessible(tegra->phy)) {
367 ehci_silence_controller(ehci);
370 tegra_usb_enable_vbus(tegra->phy, false);
371 mutex_unlock(&tegra->sync_lock);
374 static int tegra_ehci_setup(struct usb_hcd *hcd)
376 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
377 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
379 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
383 /* EHCI registers start at offset 0x100 */
384 ehci->caps = hcd->regs + 0x100;
386 ehci->has_hostpc = tegra->has_hostpc;
387 ehci->broken_hostpc_phcd = true;
389 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
390 ehci->has_hostpc = 1;
392 val = readl(hcd->regs + HOSTPC_REG_OFFSET);
393 val &= ~HOSTPC1_DEVLC_STS;
394 val &= ~HOSTPC1_DEVLC_NYT_ASUS;
395 writel(val, hcd->regs + HOSTPC_REG_OFFSET);
397 /* switch to host mode */
400 retval = ehci_setup(hcd);
404 ehci->controller_remote_wakeup = false;
405 tegra_usb_phy_reset(tegra->phy);
407 #if !defined(CONFIG_ARCH_TEGRA_2x_SOC)
408 if (tegra_platform_is_fpga()) {
409 val = readl(hcd->regs + TEGRA_STREAM_DISABLE);
410 val |= TEGRA_STREAM_DISABLE_OFFSET;
411 writel(val , hcd->regs + TEGRA_STREAM_DISABLE);
420 static int tegra_ehci_bus_suspend(struct usb_hcd *hcd)
422 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
424 EHCI_DBG("%s() BEGIN\n", __func__);
426 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
427 tegra->boost_requested = false;
428 if (tegra->boost_enable
429 && pm_qos_request_active(&tegra->boost_cpu_freq_req))
430 pm_qos_update_request(&tegra->boost_cpu_freq_req,
431 PM_QOS_DEFAULT_VALUE);
432 tegra->cpu_boost_in_work = false;
435 mutex_lock(&tegra->sync_lock);
436 tegra->bus_suspended_fail = false;
437 err = ehci_bus_suspend(hcd);
439 tegra->bus_suspended_fail = true;
441 usb_phy_set_suspend(get_usb_phy(tegra->phy), 1);
442 hcd_to_bus(hcd)->skip_resume = true;
444 mutex_unlock(&tegra->sync_lock);
445 EHCI_DBG("%s() END\n", __func__);
450 static int tegra_ehci_bus_resume(struct usb_hcd *hcd)
452 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
454 EHCI_DBG("%s() BEGIN\n", __func__);
456 mutex_lock(&tegra->sync_lock);
457 usb_phy_set_suspend(get_usb_phy(tegra->phy), 0);
458 err = ehci_bus_resume(hcd);
459 mutex_unlock(&tegra->sync_lock);
461 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
462 tegra->boost_requested = true;
463 if (pm_qos_request_active(&tegra->boost_cpu_freq_req)
464 && tegra->boost_enable
465 && (tegra_ehci_port_speed(tegra->ehci) == USB_SPEED_HIGH))
466 pm_qos_update_request(&tegra->boost_cpu_freq_req,
467 (s32)CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ * 1000);
468 tegra->cpu_boost_in_work = false;
470 EHCI_DBG("%s() END\n", __func__);
475 static const struct hc_driver tegra_ehci_hc_driver = {
476 .description = hcd_name,
477 .product_desc = "Tegra EHCI Host Controller",
478 .hcd_priv_size = sizeof(struct ehci_hcd),
479 .flags = HCD_USB2 | HCD_MEMORY,
481 /* standard ehci functions */
484 .urb_enqueue = ehci_urb_enqueue,
485 .urb_dequeue = ehci_urb_dequeue,
486 .endpoint_disable = ehci_endpoint_disable,
487 .endpoint_reset = ehci_endpoint_reset,
488 .get_frame_number = ehci_get_frame,
489 .hub_status_data = ehci_hub_status_data,
490 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
491 .relinquish_port = ehci_relinquish_port,
492 .port_handed_over = ehci_port_handed_over,
494 /* modified ehci functions for tegra */
495 .reset = tegra_ehci_setup,
496 .irq = tegra_ehci_irq,
497 .shutdown = tegra_ehci_shutdown,
498 .map_urb_for_dma = tegra_ehci_map_urb_for_dma,
499 .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma,
500 .hub_control = tegra_ehci_hub_control,
502 .bus_suspend = tegra_ehci_bus_suspend,
503 .bus_resume = tegra_ehci_bus_resume,
507 static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
509 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
510 static ssize_t show_boost_enable(struct device *dev,
511 struct device_attribute *attr,
514 struct tegra_ehci_hcd *tegra = dev_get_drvdata(dev);
515 return scnprintf(buf, PAGE_SIZE, "%s\n",
516 tegra->boost_enable ? "Y" : "N");
520 static ssize_t store_boost_enable(struct device *dev,
521 struct device_attribute *attr,
522 const char *buf, size_t count)
524 struct tegra_ehci_hcd *tegra = dev_get_drvdata(dev);
526 bool old_boost = tegra->boost_enable;
528 if (strtobool(buf, &new_boost) == 0) {
529 tegra->boost_enable = new_boost;
530 if (!old_boost && new_boost
531 && tegra->boost_requested
532 && pm_qos_request_active(&tegra->boost_cpu_freq_req))
533 pm_qos_update_request(
534 &tegra->boost_cpu_freq_req,
535 (s32)CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ * 1000);
536 else if (old_boost && !new_boost
537 && pm_qos_request_active(&tegra->boost_cpu_freq_req))
538 pm_qos_update_request(&tegra->boost_cpu_freq_req,
539 PM_QOS_DEFAULT_VALUE);
543 static DEVICE_ATTR(boost_enable, 0644,
544 show_boost_enable, store_boost_enable);
547 static struct tegra_usb_platform_data *tegra_ehci_dt_parse_pdata(
548 struct platform_device *pdev)
551 struct tegra_usb_platform_data *pdata;
552 struct device_node *np = pdev->dev.of_node;
557 int modem_id = tegra_get_modem_id();
558 int usb_port_owner_info = tegra_get_usb_port_owner_info();
563 pdata = devm_kzalloc(&pdev->dev, sizeof(struct tegra_usb_platform_data),
566 dev_err(&pdev->dev, "Can't allocate platform data\n");
567 return ERR_PTR(-ENOMEM);
570 pdata->op_mode = TEGRA_USB_OPMODE_HOST;
571 pdata->port_otg = of_property_read_bool(np, "nvidia,port-otg");
572 pdata->has_hostpc = of_property_read_bool(np, "nvidia,has-hostpc");
573 pdata->unaligned_dma_buf_supported =
574 of_property_read_bool(np, "nvidia,unaligned-dma-buf-supported");
576 is_intf_utmi = of_property_read_bool(np, "nvidia,is-intf-utmi");
577 instance = of_alias_get_id(pdev->dev.of_node, "ehci");
578 #if defined(CONFIG_ARCH_TEGRA_21x_SOC)
580 pdata->phy_intf = TEGRA_USB_PHY_INTF_HSIC;
581 tegra_set_wake_source(42, INT_USB2);
584 if (instance == 1 && modem_id) {
585 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
586 pdata->phy_intf = TEGRA_USB_PHY_INTF_HSIC;
587 tegra_set_wake_source(42, INT_USB2);
590 } else if (is_intf_utmi) {
591 if (!(usb_port_owner_info &
592 (UTMI1_PORT_OWNER_XUSB ||
593 UTMI2_PORT_OWNER_XUSB)))
594 pdata->phy_intf = TEGRA_USB_PHY_INTF_UTMI;
599 pdata->op_mode = TEGRA_USB_OPMODE_HOST;
601 pdata->u_data.host.hot_plug =
602 of_property_read_bool(np, "nvidia,hot-plug");
603 pdata->u_data.host.remote_wakeup_supported =
604 of_property_read_bool(np, "nvidia,remote-wakeup-supported");
606 pdata->u_data.host.power_off_on_suspend = of_property_read_bool(np,
607 "nvidia,power-off-on-suspend");
609 pdata->u_data.host.turn_off_vbus_on_lp0 = of_property_read_bool(np,
610 "nvidia,turn-off-vbus-on-lp0");
613 if (pdata->phy_intf == TEGRA_USB_PHY_INTF_UTMI) {
614 err = of_property_read_u32(np,
615 "nvidia,hssync-start-delay", &val);
616 pdata->u_cfg.utmi.hssync_start_delay = val;
618 err = of_property_read_u32(np,
619 "nvidia,idle-wait-delay", &val);
620 pdata->u_cfg.utmi.idle_wait_delay = val;
622 err = of_property_read_u32(np, "nvidia,elastic-limit", &val);
623 pdata->u_cfg.utmi.elastic_limit = val;
625 err = of_property_read_u32(np,
626 "nvidia,term-range-adj", &val);
627 pdata->u_cfg.utmi.term_range_adj = val;
629 err = of_property_read_u32(np, "nvidia,xcvr-setup", &val);
630 pdata->u_cfg.utmi.xcvr_setup = val;
632 err = of_property_read_u32(np, "nvidia,xcvr-lsfslew", &val);
633 pdata->u_cfg.utmi.xcvr_lsfslew = val;
635 err = of_property_read_u32(np, "nvidia,xcvr-lsrslew", &val);
636 pdata->u_cfg.utmi.xcvr_lsrslew = val;
638 err = of_property_read_u32(np,
639 "nvidia,xcvr-setup-offset", &val);
640 pdata->u_cfg.utmi.xcvr_setup_offset = val;
642 err = of_property_read_u32(np, "nvidia,xcvr-use-lsb", &val);
643 pdata->u_cfg.utmi.xcvr_use_lsb = val;
645 pdata->u_cfg.utmi.xcvr_use_fuses =
646 of_property_read_bool(np, "nvidia,xcvr-use-fuses");
648 err = of_property_read_u32(np, "nvidia,vbus-oc-map", &val);
649 pdata->u_cfg.utmi.vbus_oc_map = val;
651 err = of_property_read_u32(np,
652 "nvidia,xcvr-hsslew-lsb", &val);
653 pdata->u_cfg.utmi.xcvr_hsslew_lsb = val;
655 err = of_property_read_u32(np,
656 "nvidia,xcvr-hsslew-msb", &val);
657 pdata->u_cfg.utmi.xcvr_hsslew_msb = val;
666 static int tegra_ehci_probe(struct platform_device *pdev)
668 struct resource *res;
670 struct tegra_ehci_hcd *tegra;
671 struct tegra_usb_platform_data *pdata;
674 int instance = pdev->id;
676 /* Right now device-tree probed devices don't get dma_mask set.
677 * Since shared usb code relies on it, set it here for now.
678 * Once we have dma capability bindings this can go away.
680 if (!pdev->dev.dma_mask)
681 pdev->dev.dma_mask = &tegra_ehci_dma_mask;
683 pdata = pdev->dev.platform_data;
686 if (pdev->dev.of_node) {
687 pdata = tegra_ehci_dt_parse_pdata(pdev);
688 pdev->dev.platform_data = pdata;
691 pdata = dev_get_platdata(&pdev->dev);
694 dev_err(&pdev->dev, "Platform data missing\n");
697 tegra = devm_kzalloc(&pdev->dev, sizeof(struct tegra_ehci_hcd),
700 dev_err(&pdev->dev, "memory alloc failed\n");
704 mutex_init(&tegra->sync_lock);
706 hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
707 dev_name(&pdev->dev));
709 dev_err(&pdev->dev, "unable to create HCD\n");
713 platform_set_drvdata(pdev, tegra);
715 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
716 tegra->boost_requested = false;
717 /* Add boost enable/disable knob */
718 tegra->boost_enable = true;
719 err = device_create_file(hcd->self.controller, &dev_attr_boost_enable);
724 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
726 dev_err(&pdev->dev, "failed to get I/O memory\n");
730 hcd->rsrc_start = res->start;
731 hcd->rsrc_len = resource_size(res);
732 hcd->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
734 dev_err(&pdev->dev, "failed to remap I/O memory\n");
739 /* This is pretty ugly and needs to be fixed when we do only
740 * device-tree probing. Old code relies on the platform_device
741 * numbering that we lack for device-tree-instantiated devices.
744 switch (res->start) {
748 case TEGRA_USB2_BASE:
751 case TEGRA_USB3_BASE:
756 dev_err(&pdev->dev, "unknown usb instance\n");
761 irq = platform_get_irq(pdev, 0);
763 dev_err(&pdev->dev, "failed to get IRQ\n");
769 tegra->unaligned_dma_buf_supported = pdata->unaligned_dma_buf_supported;
770 tegra->has_hostpc = pdata->has_hostpc;
772 tegra->phy = tegra_usb_phy_open(pdev);
773 hcd->phy = get_usb_phy(tegra->phy);
774 if (IS_ERR(tegra->phy)) {
775 dev_err(&pdev->dev, "failed to open USB phy\n");
780 err = tegra_usb_phy_power_on(tegra->phy);
782 dev_err(&pdev->dev, "failed to power on the phy\n");
786 err = usb_phy_init(get_usb_phy(tegra->phy));
788 dev_err(&pdev->dev, "failed to init the phy\n");
792 err = usb_add_hcd(hcd, irq, IRQF_SHARED | IRQF_TRIGGER_HIGH);
794 dev_err(&pdev->dev, "Failed to add USB HCD, error=%d\n", err);
798 tegra->ehci = hcd_to_ehci(hcd);
800 hcd_to_bus(hcd)->skip_resume = pdata->u_data.host.skip_resume;
801 tegra->is_skip_resume_enabled = pdata->u_data.host.skip_resume;
802 if (pdata->port_otg) {
804 devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
805 if (!IS_ERR_OR_NULL(tegra->transceiver))
806 otg_set_host(tegra->transceiver->otg, &hcd->self);
809 tegra_pd_add_device(&pdev->dev);
810 pm_runtime_enable(&pdev->dev);
812 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
813 INIT_DELAYED_WORK(&tegra->boost_cpu_freq_work,
814 tegra_ehci_boost_cpu_frequency_work);
815 pm_qos_add_request(&tegra->boost_cpu_freq_req, PM_QOS_CPU_FREQ_MIN,
816 PM_QOS_DEFAULT_VALUE);
817 schedule_delayed_work(&tegra->boost_cpu_freq_work, 12000);
818 tegra->cpu_boost_in_work = true;
821 wake_lock_init(&tegra->ehci_wake_lock,
822 WAKE_LOCK_SUSPEND, dev_name(&pdev->dev));
827 usb_phy_shutdown(get_usb_phy(tegra->phy));
829 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
830 device_remove_file(hcd->self.controller, &dev_attr_boost_enable);
840 static int tegra_ehci_resume(struct platform_device *pdev)
843 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
844 struct tegra_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
845 struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
848 err = disable_irq_wake(tegra->irq);
851 "Couldn't disable USB host mode wakeup, irq=%d, "
852 "error=%d\n", tegra->irq, err);
855 if (tegra->is_skip_resume_enabled) {
856 if (tegra_usb_phy_is_pmc_wake(tegra->phy))
857 hcd_to_bus(hcd)->skip_resume = false;
860 if (pdata->u_data.host.turn_off_vbus_on_lp0) {
861 tegra_usb_enable_vbus(tegra->phy, true);
862 tegra_ehci_notify_event(tegra, USB_EVENT_ID);
864 if (tegra->is_skip_resume_enabled)
867 return tegra_usb_phy_power_on(tegra->phy);
871 static int tegra_ehci_suspend(struct platform_device *pdev, pm_message_t state)
873 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
874 struct tegra_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
877 /* bus suspend could have failed because of remote wakeup resume */
878 if (tegra->bus_suspended_fail)
881 if (!tegra->is_skip_resume_enabled) {
882 err = tegra_usb_phy_power_off(tegra->phy);
885 if (pdata->u_data.host.turn_off_vbus_on_lp0) {
886 tegra_usb_enable_vbus(tegra->phy, false);
887 tegra_usb_phy_pmc_disable(tegra->phy);
891 err = enable_irq_wake(tegra->irq);
894 "Couldn't enable USB host mode wakeup, irq=%d, "
895 "error=%d\n", tegra->irq, err);
902 static int tegra_ehci_remove(struct platform_device *pdev)
904 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
905 struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
906 struct usb_device *rhdev = NULL;
907 struct tegra_usb_platform_data *pdata;
908 unsigned long timeout = 0;
910 wake_lock_destroy(&tegra->ehci_wake_lock);
912 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
913 cancel_delayed_work_sync(&tegra->boost_cpu_freq_work);
914 tegra->cpu_boost_in_work = false;
915 pm_qos_remove_request(&tegra->boost_cpu_freq_req);
917 rhdev = hcd->self.root_hub;
918 pdata = dev_get_platdata(&pdev->dev);
920 if (!IS_ERR_OR_NULL(tegra->transceiver))
921 otg_set_host(tegra->transceiver->otg, NULL);
923 /* Make sure phy is powered ON to access USB register */
924 if(!tegra_usb_phy_hw_accessible(tegra->phy))
925 tegra_usb_phy_power_on(tegra->phy);
927 if (pdata->port_otg) {
928 timeout = jiffies + 5 * HZ;
929 /* wait for devices connected to root hub to disconnect*/
930 while (rhdev && usb_hub_find_child(rhdev, 1)) {
931 /* wait for any control packets
932 sent to root hub to complete */
933 if (time_after(jiffies, timeout))
940 #ifdef CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ
941 device_remove_file(hcd->self.controller, &dev_attr_boost_enable);
945 tegra_usb_phy_power_off(tegra->phy);
946 usb_phy_shutdown(get_usb_phy(tegra->phy));
948 mutex_destroy(&tegra->sync_lock);
949 tegra_pd_remove_device(&pdev->dev);
954 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
956 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
957 struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
959 if (hcd->driver->shutdown)
960 hcd->driver->shutdown(hcd);
963 static struct of_device_id tegra_ehci_of_match[] = {
964 { .compatible = "nvidia,tegra20-ehci", },
965 { .compatible = "nvidia,tegra132-ehci", },
969 static struct platform_driver tegra_ehci_driver = {
970 .probe = tegra_ehci_probe,
971 .remove = tegra_ehci_remove,
972 .shutdown = tegra_ehci_hcd_shutdown,
974 .suspend = tegra_ehci_suspend,
975 .resume = tegra_ehci_resume,
979 .of_match_table = tegra_ehci_of_match,