2 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
4 * Derived from the PCAN project file driver/src/pcan_pci.c:
6 * Copyright (C) 2001-2006 PEAK System-Technik GmbH
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the version 2 of the GNU General Public License
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software Foundation,
19 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/netdevice.h>
26 #include <linux/delay.h>
27 #include <linux/pci.h>
28 #include <linux/can.h>
29 #include <linux/can/dev.h>
30 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
38 #define DRV_NAME "peak_pci"
40 MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
41 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI cards");
42 MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI CAN card");
43 MODULE_LICENSE("GPL v2");
47 struct pci_dev *pci_dev;
48 struct net_device *slave_dev;
49 volatile void __iomem *conf_addr;
52 #define PEAK_PCI_SINGLE 0 /* single channel device */
53 #define PEAK_PCI_MASTER 1 /* multi channel master device */
54 #define PEAK_PCI_SLAVE 2 /* multi channel slave device */
56 #define PEAK_PCI_CAN_CLOCK (16000000 / 2)
58 #define PEAK_PCI_CDR_SINGLE (CDR_CBP | CDR_CLKOUT_MASK | CDR_CLK_OFF)
59 #define PEAK_PCI_CDR_MASTER (CDR_CBP | CDR_CLKOUT_MASK)
61 #define PEAK_PCI_OCR OCR_TX0_PUSHPULL
64 * Important PITA registers
66 #define PITA_ICR 0x00 /* interrupt control register */
67 #define PITA_GPIOICR 0x18 /* general purpose I/O interface
69 #define PITA_MISC 0x1C /* miscellanoes register */
71 #define PCI_CONFIG_PORT_SIZE 0x1000 /* size of the config io-memory */
72 #define PCI_PORT_SIZE 0x0400 /* size of a channel io-memory */
74 #define PEAK_PCI_VENDOR_ID 0x001C /* the PCI device and vendor IDs */
75 #define PEAK_PCI_DEVICE_ID 0x0001
77 static struct pci_device_id peak_pci_tbl[] = {
78 {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
82 MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
84 static u8 peak_pci_read_reg(struct net_device *dev, int port)
87 val = readb((const volatile void __iomem *)
88 (dev->base_addr + (port << 2)));
92 static void peak_pci_write_reg(struct net_device *dev, int port, u8 val)
94 writeb(val, (volatile void __iomem *)
95 (dev->base_addr + (port << 2)));
98 static void peak_pci_post_irq(struct net_device *dev)
100 struct sja1000_priv *priv = netdev_priv(dev);
101 struct peak_pci *board = priv->priv;
104 /* Select and clear in Pita stored interrupt */
105 icr_low = readw(board->conf_addr + PITA_ICR);
106 if (board->channel == PEAK_PCI_SLAVE) {
107 if (icr_low & 0x0001)
108 writew(0x0001, board->conf_addr + PITA_ICR);
110 if (icr_low & 0x0002)
111 writew(0x0002, board->conf_addr + PITA_ICR);
115 static void peak_pci_del_chan(struct net_device *dev, int init_step)
117 struct sja1000_priv *priv = netdev_priv(dev);
118 struct peak_pci *board;
123 priv = netdev_priv(dev);
131 case 0: /* Full cleanup */
132 printk(KERN_INFO "Removing %s device %s\n",
133 DRV_NAME, dev->name);
134 unregister_sja1000dev(dev);
136 icr_high = readw(board->conf_addr + PITA_ICR + 2);
137 if (board->channel == PEAK_PCI_SLAVE)
141 writew(icr_high, board->conf_addr + PITA_ICR + 2);
143 iounmap((void *)dev->base_addr);
145 if (board->channel != PEAK_PCI_SLAVE)
146 iounmap((void *)board->conf_addr);
148 free_sja1000dev(dev);
154 static int peak_pci_add_chan(struct pci_dev *pdev, int channel,
155 struct net_device **master_dev)
157 struct net_device *dev;
158 struct sja1000_priv *priv;
159 struct peak_pci *board;
164 dev = alloc_sja1000dev(sizeof(struct peak_pci));
169 priv = netdev_priv(dev);
172 board->pci_dev = pdev;
173 board->channel = channel;
175 if (channel != PEAK_PCI_SLAVE) {
177 addr = pci_resource_start(pdev, 0);
178 board->conf_addr = ioremap(addr, PCI_CONFIG_PORT_SIZE);
179 if (board->conf_addr == 0) {
185 /* Set GPIO control register */
186 writew(0x0005, board->conf_addr + PITA_GPIOICR + 2);
188 /* Enable single or dual channel */
189 if (channel == PEAK_PCI_MASTER)
190 writeb(0x00, board->conf_addr + PITA_GPIOICR);
192 writeb(0x04, board->conf_addr + PITA_GPIOICR);
194 writeb(0x05, board->conf_addr + PITA_MISC + 3);
196 /* Leave parport mux mode */
197 writeb(0x04, board->conf_addr + PITA_MISC + 3);
199 struct sja1000_priv *master_priv = netdev_priv(*master_dev);
200 struct peak_pci *master_board = master_priv->priv;
201 master_board->slave_dev = dev;
202 board->conf_addr = master_board->conf_addr;
205 addr = pci_resource_start(pdev, 1);
206 if (channel == PEAK_PCI_SLAVE)
207 addr += PCI_PORT_SIZE;
209 dev->base_addr = (unsigned long)ioremap(addr, PCI_PORT_SIZE);
210 if (dev->base_addr == 0) {
216 priv->read_reg = peak_pci_read_reg;
217 priv->write_reg = peak_pci_write_reg;
218 priv->post_irq = peak_pci_post_irq;
220 priv->can.bittiming.clock = PEAK_PCI_CAN_CLOCK;
222 priv->ocr = PEAK_PCI_OCR;
224 if (channel == PEAK_PCI_MASTER)
225 priv->cdr = PEAK_PCI_CDR_MASTER;
227 priv->cdr = PEAK_PCI_CDR_SINGLE;
229 /* Register and setup interrupt handling */
230 dev->irq = pdev->irq;
231 icr_high = readw(board->conf_addr + PITA_ICR + 2);
232 if (channel == PEAK_PCI_SLAVE)
236 writew(icr_high, board->conf_addr + PITA_ICR + 2);
239 SET_NETDEV_DEV(dev, &pdev->dev);
241 /* Register SJA1000 device */
242 err = register_sja1000dev(dev);
244 printk(KERN_ERR "Registering %s device failed (err=%d)\n",
249 if (channel != PEAK_PCI_SLAVE)
252 printk(KERN_INFO "%s: %s at base_addr=%#lx conf_addr=%p irq=%d\n",
253 DRV_NAME, dev->name, dev->base_addr, board->conf_addr, dev->irq);
258 peak_pci_del_chan(dev, init_step);
262 static int __devinit peak_pci_init_one(struct pci_dev *pdev,
263 const struct pci_device_id *ent)
267 struct net_device *master_dev = NULL;
269 printk(KERN_INFO "%s: initializing device %04x:%04x\n",
270 DRV_NAME, pdev->vendor, pdev->device);
272 err = pci_enable_device(pdev);
276 err = pci_request_regions(pdev, DRV_NAME);
280 err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
282 goto failure_cleanup;
284 err = pci_write_config_word(pdev, 0x44, 0);
286 goto failure_cleanup;
288 if (sub_sys_id > 3) {
289 err = peak_pci_add_chan(pdev,
290 PEAK_PCI_MASTER, &master_dev);
292 goto failure_cleanup;
294 err = peak_pci_add_chan(pdev,
295 PEAK_PCI_SLAVE, &master_dev);
297 goto failure_cleanup;
299 err = peak_pci_add_chan(pdev, PEAK_PCI_SINGLE,
302 goto failure_cleanup;
305 pci_set_drvdata(pdev, master_dev);
310 peak_pci_del_chan(master_dev, 0);
312 pci_release_regions(pdev);
319 static void __devexit peak_pci_remove_one(struct pci_dev *pdev)
321 struct net_device *dev = pci_get_drvdata(pdev);
322 struct sja1000_priv *priv = netdev_priv(dev);
323 struct peak_pci *board = priv->priv;
325 if (board->slave_dev)
326 peak_pci_del_chan(board->slave_dev, 0);
327 peak_pci_del_chan(dev, 0);
329 pci_release_regions(pdev);
330 pci_disable_device(pdev);
331 pci_set_drvdata(pdev, NULL);
334 static struct pci_driver peak_pci_driver = {
336 .id_table = peak_pci_tbl,
337 .probe = peak_pci_init_one,
338 .remove = __devexit_p(peak_pci_remove_one),
341 static int __init peak_pci_init(void)
343 return pci_register_driver(&peak_pci_driver);
346 static void __exit peak_pci_exit(void)
348 pci_unregister_driver(&peak_pci_driver);
351 module_init(peak_pci_init);
352 module_exit(peak_pci_exit);