Added bth_test application. Not finished.

[mirosot.git] / bth_tests / bluetooth / h2638_pkt_controll.c

diff --git a/bth_tests/bluetooth/h2638_pkt_controll.c b/bth_tests/bluetooth/h2638_pkt_controll.c
new file mode 100644 (file)
index 0000000..2046382
--- /dev/null
+++ b/bth_tests/bluetooth/h2638_pkt_controll.c
@@ -0,0 +1,121 @@
+/*******************************************************************
+  bluetooth library
+
+  h2638_pkt_control.c - fce for TPU operation
+
+  Copyright (C) 2006 by Petr Kovacik petr_kovacik@gmail.com
+
+ *******************************************************************/
+
+#include <types.h>
+#include <cpu_def.h>
+#include <h8s2638h.h>
+#include <system_def.h>
+#include <stdlib.h>
+#include "hci.h"
+#include "bth_h8s2638.h"
+
+
+long int timer;
+
+/**
+ * interrupt hanlder, increments the timer variable and blinks LEDs
+ */
+void bth_inruppt_pkt_controll(void) __attribute__ ((interrupt_handler));
+
+void bth_inruppt_pkt_controll(void)
+{
+  static char count = 0;
+  count++;
+  if (count%2) DEB_LED_ON(0);
+  else DEB_LED_OFF(0);
+
+  
+  //*TPU_TSR1 &= ~TSR1_TCFVm ; //reset overflow flag (clear interrupt)
+  *TPU_TSR1 &= ~TSR1_TGFAm;
+  timer++;
+//  *TPU_TSR1 &= ~TSR1_TCFVm ; //reset overflow flag (clear interrupt)
+};
+
+
+/**
+ * Starts TPU channel 1
+*/
+void bth_start_TPU_counter(void)
+{
+    *TPU_TSTR|=(1<<1);         /* Start channel 1 */
+};
+
+
+/**
+ * Stop TPU 1
+ */
+void bth_stop_TPU_counter(void)
+{
+    *TPU_TSTR&=~(1<<1);                /* Stop channel 1 */
+};
+
+
+/**
+ * Reset TPU 1
+ */
+void bth_clear_TPU_counter(void)
+{
+  *TPU_TCNT1=0;
+};
+
+
+/**
+ * Returns the number of timer interrupts
+ */
+long int bth_get_timer(void)
+{
+  return timer;
+};
+
+/**
+ * Zeroes the timer variable
+ */
+void bth_nul_timer(void)
+{
+  timer=0;
+};
+
+
+/**
+ * Timer initialization - HW 1-timer overflow; 2-???Dosazeni citace hodnoty TIER1_TGIEAm
+ */
+void bth_init_pkt_controll(void)
+{
+
+#if 0  
+  *SYS_MSTPCRA &= ~MSTPCRA_TPUm; // power TPU unit
+
+  *TPU_TCR1 =0x00 | 0x06;     //rising edge, f divided by 256
+  *TPU_TMDR1 =0x00;           // normal mode
+  *TPU_TSR1 &= ~TSR1_TCFVm ;  //reset overflow flag
+  *TPU_TIER1 |=TIER1_TCIEVm;  //enable overflow interrupt
+
+  excptvec_set(42,bth_inruppt_pkt_controll);
+
+  *TPU_TSTR |=TSTR_CST1m;     //start timer
+#endif
+  
+#if 1
+  /* TPU initialization */
+  *SYS_MSTPCRA&=~MSTPCRA_TPUm;
+  //  *TPU_TSTR&=~(1<<1);      /* Stop channel 4 */
+  /* system clock/1 ,rising edge, clearing source TGRA */
+  *TPU_TCR1=(TPCR_TPSC_F64 | TPCR_CKEG_RIS | TPCR_CCLR_TGRA);
+  /* normal mode */
+  *TPU_TMDR1=TPMDR_MD_NORMAL;
+  /* TGRA initiates interrupt */
+  *TPU_TIER1|=TIER1_TGIEAm;
+  excptvec_set(EXCPTVEC_TGI1A,bth_inruppt_pkt_controll);
+
+  *TPU_TGR1A=(10000);
+  *TPU_TSTR |=TSTR_CST1m;     //start timer
+#endif
+  bth_controll_flag=10;
+};
+