2 * SiS 300/540/630[S]/730[S],
3 * SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX],
5 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
7 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the named License,
12 * or any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
23 * Author: Thomas Winischhofer <thomas@winischhofer.net>
25 * Author of (practically wiped) code base:
27 * Copyright (C) 1999 Silicon Integrated Systems, Inc.
29 * See http://www.winischhofer.net/ for more information and updates
31 * Originally based on the VBE 2.0 compliant graphic boards framebuffer driver,
32 * which is (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
36 #include <linux/module.h>
37 #include <linux/moduleparam.h>
38 #include <linux/kernel.h>
39 #include <linux/spinlock.h>
40 #include <linux/errno.h>
41 #include <linux/string.h>
43 #include <linux/screen_info.h>
44 #include <linux/slab.h>
46 #include <linux/selection.h>
47 #include <linux/ioport.h>
48 #include <linux/init.h>
49 #include <linux/pci.h>
50 #include <linux/vmalloc.h>
51 #include <linux/capability.h>
53 #include <linux/types.h>
54 #include <linux/uaccess.h>
63 #if !defined(CONFIG_FB_SIS_300) && !defined(CONFIG_FB_SIS_315)
64 #warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set
65 #warning sisfb will not work!
68 static void sisfb_handle_command(struct sis_video_info *ivideo,
69 struct sisfb_cmd *sisfb_command);
71 /* ------------------ Internal helper routines ----------------- */
74 sisfb_setdefaultparms(void)
92 sisfb_specialtiming = CUT_NONE;
98 sisfb_tvxposoffset = 0;
99 sisfb_tvyposoffset = 0;
100 sisfb_nocrt2rate = 0;
101 #if !defined(__i386__) && !defined(__x86_64__)
107 /* ------------- Parameter parsing -------------- */
109 static void __devinit
110 sisfb_search_vesamode(unsigned int vesamode, bool quiet)
114 /* We don't know the hardware specs yet and there is no ivideo */
118 printk(KERN_ERR "sisfb: Invalid mode. Using default.\n");
120 sisfb_mode_idx = DEFAULT_MODE;
125 vesamode &= 0x1dff; /* Clean VESA mode number from other flags */
127 while(sisbios_mode[i++].mode_no[0] != 0) {
128 if( (sisbios_mode[i-1].vesa_mode_no_1 == vesamode) ||
129 (sisbios_mode[i-1].vesa_mode_no_2 == vesamode) ) {
131 if(sisbios_mode[i-1].mode_no[1] == 0x50 ||
132 sisbios_mode[i-1].mode_no[1] == 0x56 ||
133 sisbios_mode[i-1].mode_no[1] == 0x53)
136 if(sisbios_mode[i-1].mode_no[1] == 0x5a ||
137 sisbios_mode[i-1].mode_no[1] == 0x5b)
140 sisfb_mode_idx = i - 1;
146 printk(KERN_ERR "sisfb: Invalid VESA mode 0x%x'\n", vesamode);
149 static void __devinit
150 sisfb_search_mode(char *name, bool quiet)
152 unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0;
154 char strbuf[16], strbuf1[20];
155 char *nameptr = name;
157 /* We don't know the hardware specs yet and there is no ivideo */
161 printk(KERN_ERR "sisfb: Internal error, using default mode.\n");
163 sisfb_mode_idx = DEFAULT_MODE;
167 if(!strnicmp(name, sisbios_mode[MODE_INDEX_NONE].name, strlen(name))) {
169 printk(KERN_ERR "sisfb: Mode 'none' not supported anymore. Using default.\n");
171 sisfb_mode_idx = DEFAULT_MODE;
175 if(strlen(name) <= 19) {
176 strcpy(strbuf1, name);
177 for(i = 0; i < strlen(strbuf1); i++) {
178 if(strbuf1[i] < '0' || strbuf1[i] > '9') strbuf1[i] = ' ';
181 /* This does some fuzzy mode naming detection */
182 if(sscanf(strbuf1, "%u %u %u %u", &xres, &yres, &depth, &rate) == 4) {
183 if((rate <= 32) || (depth > 32)) {
184 j = rate; rate = depth; depth = j;
186 sprintf(strbuf, "%ux%ux%u", xres, yres, depth);
188 sisfb_parm_rate = rate;
189 } else if(sscanf(strbuf1, "%u %u %u", &xres, &yres, &depth) == 3) {
190 sprintf(strbuf, "%ux%ux%u", xres, yres, depth);
194 if((sscanf(strbuf1, "%u %u", &xres, &yres) == 2) && (xres != 0)) {
195 sprintf(strbuf, "%ux%ux8", xres, yres);
198 sisfb_search_vesamode(simple_strtoul(name, NULL, 0), quiet);
205 while(sisbios_mode[i].mode_no[0] != 0) {
206 if(!strnicmp(nameptr, sisbios_mode[i++].name, strlen(nameptr))) {
208 if(sisbios_mode[i-1].mode_no[1] == 0x50 ||
209 sisbios_mode[i-1].mode_no[1] == 0x56 ||
210 sisbios_mode[i-1].mode_no[1] == 0x53)
213 if(sisbios_mode[i-1].mode_no[1] == 0x5a ||
214 sisbios_mode[i-1].mode_no[1] == 0x5b)
217 sisfb_mode_idx = i - 1;
224 printk(KERN_ERR "sisfb: Invalid mode '%s'\n", nameptr);
228 static void __devinit
229 sisfb_get_vga_mode_from_kernel(void)
233 int mydepth = screen_info.lfb_depth;
235 if(screen_info.orig_video_isVGA != VIDEO_TYPE_VLFB) return;
237 if( (screen_info.lfb_width >= 320) && (screen_info.lfb_width <= 2048) &&
238 (screen_info.lfb_height >= 200) && (screen_info.lfb_height <= 1536) &&
239 (mydepth >= 8) && (mydepth <= 32) ) {
241 if(mydepth == 24) mydepth = 32;
243 sprintf(mymode, "%ux%ux%u", screen_info.lfb_width,
244 screen_info.lfb_height,
248 "sisfb: Using vga mode %s pre-set by kernel as default\n",
251 sisfb_search_mode(mymode, true);
259 sisfb_search_crt2type(const char *name)
263 /* We don't know the hardware specs yet and there is no ivideo */
265 if(name == NULL) return;
267 while(sis_crt2type[i].type_no != -1) {
268 if(!strnicmp(name, sis_crt2type[i].name, strlen(sis_crt2type[i].name))) {
269 sisfb_crt2type = sis_crt2type[i].type_no;
270 sisfb_tvplug = sis_crt2type[i].tvplug_no;
271 sisfb_crt2flags = sis_crt2type[i].flags;
277 sisfb_dstn = (sisfb_crt2flags & FL_550_DSTN) ? 1 : 0;
278 sisfb_fstn = (sisfb_crt2flags & FL_550_FSTN) ? 1 : 0;
280 if(sisfb_crt2type < 0)
281 printk(KERN_ERR "sisfb: Invalid CRT2 type: %s\n", name);
285 sisfb_search_tvstd(const char *name)
289 /* We don't know the hardware specs yet and there is no ivideo */
294 while(sis_tvtype[i].type_no != -1) {
295 if(!strnicmp(name, sis_tvtype[i].name, strlen(sis_tvtype[i].name))) {
296 sisfb_tvstd = sis_tvtype[i].type_no;
304 sisfb_search_specialtiming(const char *name)
309 /* We don't know the hardware specs yet and there is no ivideo */
314 if(!strnicmp(name, "none", 4)) {
315 sisfb_specialtiming = CUT_FORCENONE;
316 printk(KERN_DEBUG "sisfb: Special timing disabled\n");
318 while(mycustomttable[i].chipID != 0) {
319 if(!strnicmp(name,mycustomttable[i].optionName,
320 strlen(mycustomttable[i].optionName))) {
321 sisfb_specialtiming = mycustomttable[i].SpecialID;
323 printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n",
324 mycustomttable[i].vendorName,
325 mycustomttable[i].cardName,
326 mycustomttable[i].optionName);
332 printk(KERN_WARNING "sisfb: Invalid SpecialTiming parameter, valid are:");
333 printk(KERN_WARNING "\t\"none\" (to disable special timings)\n");
335 while(mycustomttable[i].chipID != 0) {
336 printk(KERN_WARNING "\t\"%s\" (for %s %s)\n",
337 mycustomttable[i].optionName,
338 mycustomttable[i].vendorName,
339 mycustomttable[i].cardName);
346 /* ----------- Various detection routines ----------- */
348 static void __devinit
349 sisfb_detect_custom_timing(struct sis_video_info *ivideo)
351 unsigned char *biosver = NULL;
352 unsigned char *biosdate = NULL;
357 if(ivideo->SiS_Pr.UseROM) {
358 biosver = ivideo->SiS_Pr.VirtualRomBase + 0x06;
359 biosdate = ivideo->SiS_Pr.VirtualRomBase + 0x2c;
360 for(i = 0; i < 32768; i++)
361 chksum += ivideo->SiS_Pr.VirtualRomBase[i];
366 if( (mycustomttable[i].chipID == ivideo->chip) &&
367 ((!strlen(mycustomttable[i].biosversion)) ||
368 (ivideo->SiS_Pr.UseROM &&
369 (!strncmp(mycustomttable[i].biosversion, biosver,
370 strlen(mycustomttable[i].biosversion))))) &&
371 ((!strlen(mycustomttable[i].biosdate)) ||
372 (ivideo->SiS_Pr.UseROM &&
373 (!strncmp(mycustomttable[i].biosdate, biosdate,
374 strlen(mycustomttable[i].biosdate))))) &&
375 ((!mycustomttable[i].bioschksum) ||
376 (ivideo->SiS_Pr.UseROM &&
377 (mycustomttable[i].bioschksum == chksum))) &&
378 (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) &&
379 (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) {
381 for(j = 0; j < 5; j++) {
382 if(mycustomttable[i].biosFootprintAddr[j]) {
383 if(ivideo->SiS_Pr.UseROM) {
384 if(ivideo->SiS_Pr.VirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] !=
385 mycustomttable[i].biosFootprintData[j]) {
393 ivideo->SiS_Pr.SiS_CustomT = mycustomttable[i].SpecialID;
394 printk(KERN_DEBUG "sisfb: Identified [%s %s], special timing applies\n",
395 mycustomttable[i].vendorName,
396 mycustomttable[i].cardName);
397 printk(KERN_DEBUG "sisfb: [specialtiming parameter name: %s]\n",
398 mycustomttable[i].optionName);
403 } while(mycustomttable[i].chipID);
406 static bool __devinit
407 sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer)
409 int i, j, xres, yres, refresh, index;
412 if(buffer[0] != 0x00 || buffer[1] != 0xff ||
413 buffer[2] != 0xff || buffer[3] != 0xff ||
414 buffer[4] != 0xff || buffer[5] != 0xff ||
415 buffer[6] != 0xff || buffer[7] != 0x00) {
416 printk(KERN_DEBUG "sisfb: Bad EDID header\n");
420 if(buffer[0x12] != 0x01) {
421 printk(KERN_INFO "sisfb: EDID version %d not supported\n",
426 monitor->feature = buffer[0x18];
428 if(!(buffer[0x14] & 0x80)) {
429 if(!(buffer[0x14] & 0x08)) {
431 "sisfb: WARNING: Monitor does not support separate syncs\n");
435 if(buffer[0x13] >= 0x01) {
436 /* EDID V1 rev 1 and 2: Search for monitor descriptor
441 if(buffer[j] == 0x00 && buffer[j + 1] == 0x00 &&
442 buffer[j + 2] == 0x00 && buffer[j + 3] == 0xfd &&
443 buffer[j + 4] == 0x00) {
444 monitor->hmin = buffer[j + 7];
445 monitor->hmax = buffer[j + 8];
446 monitor->vmin = buffer[j + 5];
447 monitor->vmax = buffer[j + 6];
448 monitor->dclockmax = buffer[j + 9] * 10 * 1000;
449 monitor->datavalid = true;
456 if(!monitor->datavalid) {
457 /* Otherwise: Get a range from the list of supported
458 * Estabished Timings. This is not entirely accurate,
459 * because fixed frequency monitors are not supported
462 monitor->hmin = 65535; monitor->hmax = 0;
463 monitor->vmin = 65535; monitor->vmax = 0;
464 monitor->dclockmax = 0;
465 emodes = buffer[0x23] | (buffer[0x24] << 8) | (buffer[0x25] << 16);
466 for(i = 0; i < 13; i++) {
467 if(emodes & sisfb_ddcsmodes[i].mask) {
468 if(monitor->hmin > sisfb_ddcsmodes[i].h) monitor->hmin = sisfb_ddcsmodes[i].h;
469 if(monitor->hmax < sisfb_ddcsmodes[i].h) monitor->hmax = sisfb_ddcsmodes[i].h + 1;
470 if(monitor->vmin > sisfb_ddcsmodes[i].v) monitor->vmin = sisfb_ddcsmodes[i].v;
471 if(monitor->vmax < sisfb_ddcsmodes[i].v) monitor->vmax = sisfb_ddcsmodes[i].v;
472 if(monitor->dclockmax < sisfb_ddcsmodes[i].d) monitor->dclockmax = sisfb_ddcsmodes[i].d;
476 for(i = 0; i < 8; i++) {
477 xres = (buffer[index] + 31) * 8;
478 switch(buffer[index + 1] & 0xc0) {
479 case 0xc0: yres = (xres * 9) / 16; break;
480 case 0x80: yres = (xres * 4) / 5; break;
481 case 0x40: yres = (xres * 3) / 4; break;
482 default: yres = xres; break;
484 refresh = (buffer[index + 1] & 0x3f) + 60;
485 if((xres >= 640) && (yres >= 480)) {
486 for(j = 0; j < 8; j++) {
487 if((xres == sisfb_ddcfmodes[j].x) &&
488 (yres == sisfb_ddcfmodes[j].y) &&
489 (refresh == sisfb_ddcfmodes[j].v)) {
490 if(monitor->hmin > sisfb_ddcfmodes[j].h) monitor->hmin = sisfb_ddcfmodes[j].h;
491 if(monitor->hmax < sisfb_ddcfmodes[j].h) monitor->hmax = sisfb_ddcfmodes[j].h + 1;
492 if(monitor->vmin > sisfb_ddcsmodes[j].v) monitor->vmin = sisfb_ddcsmodes[j].v;
493 if(monitor->vmax < sisfb_ddcsmodes[j].v) monitor->vmax = sisfb_ddcsmodes[j].v;
494 if(monitor->dclockmax < sisfb_ddcsmodes[j].d) monitor->dclockmax = sisfb_ddcsmodes[j].d;
500 if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) {
501 monitor->datavalid = true;
505 return monitor->datavalid;
508 static void __devinit
509 sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, int crtno)
511 unsigned short temp, i, realcrtno = crtno;
512 unsigned char buffer[256];
514 monitor->datavalid = false;
517 if(ivideo->vbflags & CRT2_LCD) realcrtno = 1;
518 else if(ivideo->vbflags & CRT2_VGA) realcrtno = 2;
522 if((ivideo->sisfb_crt1off) && (!crtno))
525 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
526 realcrtno, 0, &buffer[0], ivideo->vbflags2);
527 if((!temp) || (temp == 0xffff)) {
528 printk(KERN_INFO "sisfb: CRT%d DDC probing failed\n", crtno + 1);
531 printk(KERN_INFO "sisfb: CRT%d DDC supported\n", crtno + 1);
532 printk(KERN_INFO "sisfb: CRT%d DDC level: %s%s%s%s\n",
534 (temp & 0x1a) ? "" : "[none of the supported]",
535 (temp & 0x02) ? "2 " : "",
536 (temp & 0x08) ? "D&P" : "",
537 (temp & 0x10) ? "FPDI-2" : "");
539 i = 3; /* Number of retrys */
541 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
542 realcrtno, 1, &buffer[0], ivideo->vbflags2);
543 } while((temp) && i--);
545 if(sisfb_interpret_edid(monitor, &buffer[0])) {
546 printk(KERN_INFO "sisfb: Monitor range H %d-%dKHz, V %d-%dHz, Max. dotclock %dMHz\n",
547 monitor->hmin, monitor->hmax, monitor->vmin, monitor->vmax,
548 monitor->dclockmax / 1000);
550 printk(KERN_INFO "sisfb: CRT%d DDC EDID corrupt\n", crtno + 1);
553 printk(KERN_INFO "sisfb: CRT%d DDC reading failed\n", crtno + 1);
556 printk(KERN_INFO "sisfb: VESA D&P and FPDI-2 not supported yet\n");
561 /* -------------- Mode validation --------------- */
564 sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor,
565 int mode_idx, int rate_idx, int rate)
568 unsigned int dclock, hsync;
570 if(!monitor->datavalid)
576 /* Skip for 320x200, 320x240, 640x400 */
577 switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) {
588 #ifdef CONFIG_FB_SIS_315
591 if(ivideo->sisvga_engine == SIS_315_VGA) return true;
595 if(rate < (monitor->vmin - 1))
597 if(rate > (monitor->vmax + 1))
600 if(sisfb_gettotalfrommode(&ivideo->SiS_Pr,
601 sisbios_mode[mode_idx].mode_no[ivideo->mni],
602 &htotal, &vtotal, rate_idx)) {
603 dclock = (htotal * vtotal * rate) / 1000;
604 if(dclock > (monitor->dclockmax + 1000))
606 hsync = dclock / htotal;
607 if(hsync < (monitor->hmin - 1))
609 if(hsync > (monitor->hmax + 1))
618 sisfb_validate_mode(struct sis_video_info *ivideo, int myindex, u32 vbflags)
620 u16 xres=0, yres, myres;
622 #ifdef CONFIG_FB_SIS_300
623 if(ivideo->sisvga_engine == SIS_300_VGA) {
624 if(!(sisbios_mode[myindex].chipset & MD_SIS300))
628 #ifdef CONFIG_FB_SIS_315
629 if(ivideo->sisvga_engine == SIS_315_VGA) {
630 if(!(sisbios_mode[myindex].chipset & MD_SIS315))
635 myres = sisbios_mode[myindex].yres;
637 switch(vbflags & VB_DISPTYPE_DISP2) {
640 xres = ivideo->lcdxres; yres = ivideo->lcdyres;
642 if((ivideo->SiS_Pr.SiS_CustomT != CUT_PANEL848) &&
643 (ivideo->SiS_Pr.SiS_CustomT != CUT_PANEL856)) {
644 if(sisbios_mode[myindex].xres > xres)
650 if(ivideo->sisfb_fstn) {
651 if(sisbios_mode[myindex].xres == 320) {
653 switch(sisbios_mode[myindex].mode_no[1]) {
654 case 0x50: myindex = MODE_FSTN_8; break;
655 case 0x56: myindex = MODE_FSTN_16; break;
656 case 0x53: return -1;
662 if(SiS_GetModeID_LCD(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
663 sisbios_mode[myindex].yres, 0, ivideo->sisfb_fstn,
664 ivideo->SiS_Pr.SiS_CustomT, xres, yres, ivideo->vbflags2) < 0x14) {
670 if(SiS_GetModeID_TV(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
671 sisbios_mode[myindex].yres, 0, ivideo->vbflags2) < 0x14) {
677 if(SiS_GetModeID_VGA2(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
678 sisbios_mode[myindex].yres, 0, ivideo->vbflags2) < 0x14) {
688 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int mode_idx)
691 u16 xres = sisbios_mode[mode_idx].xres;
692 u16 yres = sisbios_mode[mode_idx].yres;
694 ivideo->rate_idx = 0;
695 while((sisfb_vrate[i].idx != 0) && (sisfb_vrate[i].xres <= xres)) {
696 if((sisfb_vrate[i].xres == xres) && (sisfb_vrate[i].yres == yres)) {
697 if(sisfb_vrate[i].refresh == rate) {
698 ivideo->rate_idx = sisfb_vrate[i].idx;
700 } else if(sisfb_vrate[i].refresh > rate) {
701 if((sisfb_vrate[i].refresh - rate) <= 3) {
702 DPRINTK("sisfb: Adjusting rate from %d up to %d\n",
703 rate, sisfb_vrate[i].refresh);
704 ivideo->rate_idx = sisfb_vrate[i].idx;
705 ivideo->refresh_rate = sisfb_vrate[i].refresh;
706 } else if((sisfb_vrate[i].idx != 1) &&
707 ((rate - sisfb_vrate[i-1].refresh) <= 2)) {
708 DPRINTK("sisfb: Adjusting rate from %d down to %d\n",
709 rate, sisfb_vrate[i-1].refresh);
710 ivideo->rate_idx = sisfb_vrate[i-1].idx;
711 ivideo->refresh_rate = sisfb_vrate[i-1].refresh;
714 } else if((rate - sisfb_vrate[i].refresh) <= 2) {
715 DPRINTK("sisfb: Adjusting rate from %d down to %d\n",
716 rate, sisfb_vrate[i].refresh);
717 ivideo->rate_idx = sisfb_vrate[i].idx;
723 if(ivideo->rate_idx > 0) {
724 return ivideo->rate_idx;
726 printk(KERN_INFO "sisfb: Unsupported rate %d for %dx%d\n",
733 sisfb_bridgeisslave(struct sis_video_info *ivideo)
737 if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE))
740 inSISIDXREG(SISPART1,0x00,P1_00);
741 if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) ||
742 ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) {
750 sisfballowretracecrt1(struct sis_video_info *ivideo)
754 inSISIDXREG(SISCR,0x17,temp);
758 inSISIDXREG(SISSR,0x1f,temp);
766 sisfbcheckvretracecrt1(struct sis_video_info *ivideo)
768 if(!sisfballowretracecrt1(ivideo))
771 if(inSISREG(SISINPSTAT) & 0x08)
778 sisfbwaitretracecrt1(struct sis_video_info *ivideo)
782 if(!sisfballowretracecrt1(ivideo))
786 while((!(inSISREG(SISINPSTAT) & 0x08)) && --watchdog);
788 while((inSISREG(SISINPSTAT) & 0x08) && --watchdog);
792 sisfbcheckvretracecrt2(struct sis_video_info *ivideo)
794 unsigned char temp, reg;
796 switch(ivideo->sisvga_engine) {
797 case SIS_300_VGA: reg = 0x25; break;
798 case SIS_315_VGA: reg = 0x30; break;
799 default: return false;
802 inSISIDXREG(SISPART1, reg, temp);
810 sisfb_CheckVBRetrace(struct sis_video_info *ivideo)
812 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
813 if(!sisfb_bridgeisslave(ivideo)) {
814 return sisfbcheckvretracecrt2(ivideo);
817 return sisfbcheckvretracecrt1(ivideo);
821 sisfb_setupvbblankflags(struct sis_video_info *ivideo, u32 *vcount, u32 *hcount)
823 u8 idx, reg1, reg2, reg3, reg4;
826 (*vcount) = (*hcount) = 0;
828 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!(sisfb_bridgeisslave(ivideo)))) {
830 ret |= (FB_VBLANK_HAVE_VSYNC |
831 FB_VBLANK_HAVE_HBLANK |
832 FB_VBLANK_HAVE_VBLANK |
833 FB_VBLANK_HAVE_VCOUNT |
834 FB_VBLANK_HAVE_HCOUNT);
835 switch(ivideo->sisvga_engine) {
836 case SIS_300_VGA: idx = 0x25; break;
838 case SIS_315_VGA: idx = 0x30; break;
840 inSISIDXREG(SISPART1,(idx+0),reg1); /* 30 */
841 inSISIDXREG(SISPART1,(idx+1),reg2); /* 31 */
842 inSISIDXREG(SISPART1,(idx+2),reg3); /* 32 */
843 inSISIDXREG(SISPART1,(idx+3),reg4); /* 33 */
844 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING;
845 if(reg1 & 0x02) ret |= FB_VBLANK_VSYNCING;
846 if(reg4 & 0x80) ret |= FB_VBLANK_HBLANKING;
847 (*vcount) = reg3 | ((reg4 & 0x70) << 4);
848 (*hcount) = reg2 | ((reg4 & 0x0f) << 8);
850 } else if(sisfballowretracecrt1(ivideo)) {
852 ret |= (FB_VBLANK_HAVE_VSYNC |
853 FB_VBLANK_HAVE_VBLANK |
854 FB_VBLANK_HAVE_VCOUNT |
855 FB_VBLANK_HAVE_HCOUNT);
856 reg1 = inSISREG(SISINPSTAT);
857 if(reg1 & 0x08) ret |= FB_VBLANK_VSYNCING;
858 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING;
859 inSISIDXREG(SISCR,0x20,reg1);
860 inSISIDXREG(SISCR,0x1b,reg1);
861 inSISIDXREG(SISCR,0x1c,reg2);
862 inSISIDXREG(SISCR,0x1d,reg3);
863 (*vcount) = reg2 | ((reg3 & 0x07) << 8);
864 (*hcount) = (reg1 | ((reg3 & 0x10) << 4)) << 3;
871 sisfb_myblank(struct sis_video_info *ivideo, int blank)
873 u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13;
874 bool backlight = true;
877 case FB_BLANK_UNBLANK: /* on */
886 case FB_BLANK_NORMAL: /* blank */
895 case FB_BLANK_VSYNC_SUSPEND: /* no vsync */
904 case FB_BLANK_HSYNC_SUSPEND: /* no hsync */
913 case FB_BLANK_POWERDOWN: /* off */
926 if(ivideo->currentvbflags & VB_DISPTYPE_CRT1) {
928 if( (!ivideo->sisfb_thismonitor.datavalid) ||
929 ((ivideo->sisfb_thismonitor.datavalid) &&
930 (ivideo->sisfb_thismonitor.feature & 0xe0))) {
932 if(ivideo->sisvga_engine == SIS_315_VGA) {
933 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, 0xbf, cr63);
936 if(!(sisfb_bridgeisslave(ivideo))) {
937 setSISIDXREG(SISSR, 0x01, ~0x20, sr01);
938 setSISIDXREG(SISSR, 0x1f, 0x3f, sr1f);
944 if(ivideo->currentvbflags & CRT2_LCD) {
946 if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) {
948 SiS_SiS30xBLOn(&ivideo->SiS_Pr);
950 SiS_SiS30xBLOff(&ivideo->SiS_Pr);
952 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
953 #ifdef CONFIG_FB_SIS_315
954 if(ivideo->vbflags2 & VB2_CHRONTEL) {
956 SiS_Chrontel701xBLOn(&ivideo->SiS_Pr);
958 SiS_Chrontel701xBLOff(&ivideo->SiS_Pr);
964 if(((ivideo->sisvga_engine == SIS_300_VGA) &&
965 (ivideo->vbflags2 & (VB2_301|VB2_30xBDH|VB2_LVDS))) ||
966 ((ivideo->sisvga_engine == SIS_315_VGA) &&
967 ((ivideo->vbflags2 & (VB2_LVDS | VB2_CHRONTEL)) == VB2_LVDS))) {
968 setSISIDXREG(SISSR, 0x11, ~0x0c, sr11);
971 if(ivideo->sisvga_engine == SIS_300_VGA) {
972 if((ivideo->vbflags2 & VB2_30xB) &&
973 (!(ivideo->vbflags2 & VB2_30xBDH))) {
974 setSISIDXREG(SISPART1, 0x13, 0x3f, p1_13);
976 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
977 if((ivideo->vbflags2 & VB2_30xB) &&
978 (!(ivideo->vbflags2 & VB2_30xBDH))) {
979 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0);
983 } else if(ivideo->currentvbflags & CRT2_VGA) {
985 if(ivideo->vbflags2 & VB2_30xB) {
986 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0);
994 /* ------------- Callbacks from init.c/init301.c -------------- */
996 #ifdef CONFIG_FB_SIS_300
998 sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg)
1000 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1003 pci_read_config_dword(ivideo->nbridge, reg, &val);
1004 return (unsigned int)val;
1008 sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val)
1010 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1012 pci_write_config_dword(ivideo->nbridge, reg, (u32)val);
1016 sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg)
1018 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1021 if(!ivideo->lpcdev) return 0;
1023 pci_read_config_dword(ivideo->lpcdev, reg, &val);
1024 return (unsigned int)val;
1028 #ifdef CONFIG_FB_SIS_315
1030 sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val)
1032 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1034 pci_write_config_byte(ivideo->nbridge, reg, (u8)val);
1038 sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg)
1040 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1043 if(!ivideo->lpcdev) return 0;
1045 pci_read_config_word(ivideo->lpcdev, reg, &val);
1046 return (unsigned int)val;
1050 /* ----------- FBDev related routines for all series ----------- */
1053 sisfb_get_cmap_len(const struct fb_var_screeninfo *var)
1055 return (var->bits_per_pixel == 8) ? 256 : 16;
1059 sisfb_set_vparms(struct sis_video_info *ivideo)
1061 switch(ivideo->video_bpp) {
1063 ivideo->DstColor = 0x0000;
1064 ivideo->SiS310_AccelDepth = 0x00000000;
1065 ivideo->video_cmap_len = 256;
1068 ivideo->DstColor = 0x8000;
1069 ivideo->SiS310_AccelDepth = 0x00010000;
1070 ivideo->video_cmap_len = 16;
1073 ivideo->DstColor = 0xC000;
1074 ivideo->SiS310_AccelDepth = 0x00020000;
1075 ivideo->video_cmap_len = 16;
1078 ivideo->video_cmap_len = 16;
1079 printk(KERN_ERR "sisfb: Unsupported depth %d", ivideo->video_bpp);
1085 sisfb_calc_maxyres(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1087 int maxyres = ivideo->sisfb_mem / (var->xres_virtual * (var->bits_per_pixel >> 3));
1089 if(maxyres > 32767) maxyres = 32767;
1095 sisfb_calc_pitch(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1097 ivideo->video_linelength = var->xres_virtual * (var->bits_per_pixel >> 3);
1098 ivideo->scrnpitchCRT1 = ivideo->video_linelength;
1099 if(!(ivideo->currentvbflags & CRT1_LCDA)) {
1100 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1101 ivideo->scrnpitchCRT1 <<= 1;
1107 sisfb_set_pitch(struct sis_video_info *ivideo)
1109 bool isslavemode = false;
1110 unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3;
1111 unsigned short HDisplay2 = ivideo->video_linelength >> 3;
1113 if(sisfb_bridgeisslave(ivideo)) isslavemode = true;
1115 /* We need to set pitch for CRT1 if bridge is in slave mode, too */
1116 if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) {
1117 outSISIDXREG(SISCR,0x13,(HDisplay1 & 0xFF));
1118 setSISIDXREG(SISSR,0x0E,0xF0,(HDisplay1 >> 8));
1121 /* We must not set the pitch for CRT2 if bridge is in slave mode */
1122 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!isslavemode)) {
1123 orSISIDXREG(SISPART1,ivideo->CRT2_write_enable,0x01);
1124 outSISIDXREG(SISPART1,0x07,(HDisplay2 & 0xFF));
1125 setSISIDXREG(SISPART1,0x09,0xF0,(HDisplay2 >> 8));
1130 sisfb_bpp_to_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1132 ivideo->video_cmap_len = sisfb_get_cmap_len(var);
1134 switch(var->bits_per_pixel) {
1136 var->red.offset = var->green.offset = var->blue.offset = 0;
1137 var->red.length = var->green.length = var->blue.length = 8;
1140 var->red.offset = 11;
1141 var->red.length = 5;
1142 var->green.offset = 5;
1143 var->green.length = 6;
1144 var->blue.offset = 0;
1145 var->blue.length = 5;
1146 var->transp.offset = 0;
1147 var->transp.length = 0;
1150 var->red.offset = 16;
1151 var->red.length = 8;
1152 var->green.offset = 8;
1153 var->green.length = 8;
1154 var->blue.offset = 0;
1155 var->blue.length = 8;
1156 var->transp.offset = 24;
1157 var->transp.length = 8;
1163 sisfb_set_mode(struct sis_video_info *ivideo, int clrscrn)
1165 unsigned short modeno = ivideo->mode_no;
1167 /* >=2.6.12's fbcon clears the screen anyway */
1170 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1172 sisfb_pre_setmode(ivideo);
1174 if(!SiSSetMode(&ivideo->SiS_Pr, modeno)) {
1175 printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no);
1179 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1181 sisfb_post_setmode(ivideo);
1188 sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *info)
1190 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1191 unsigned int htotal = 0, vtotal = 0;
1192 unsigned int drate = 0, hrate = 0;
1193 int found_mode = 0, ret;
1197 htotal = var->left_margin + var->xres + var->right_margin + var->hsync_len;
1199 vtotal = var->upper_margin + var->lower_margin + var->vsync_len;
1201 pixclock = var->pixclock;
1203 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
1204 vtotal += var->yres;
1206 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1207 vtotal += var->yres;
1209 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1210 vtotal += var->yres;
1212 } else vtotal += var->yres;
1214 if(!(htotal) || !(vtotal)) {
1215 DPRINTK("sisfb: Invalid 'var' information\n");
1219 if(pixclock && htotal && vtotal) {
1220 drate = 1000000000 / pixclock;
1221 hrate = (drate * 1000) / htotal;
1222 ivideo->refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1224 ivideo->refresh_rate = 60;
1227 old_mode = ivideo->sisfb_mode_idx;
1228 ivideo->sisfb_mode_idx = 0;
1230 while( (sisbios_mode[ivideo->sisfb_mode_idx].mode_no[0] != 0) &&
1231 (sisbios_mode[ivideo->sisfb_mode_idx].xres <= var->xres) ) {
1232 if( (sisbios_mode[ivideo->sisfb_mode_idx].xres == var->xres) &&
1233 (sisbios_mode[ivideo->sisfb_mode_idx].yres == var->yres) &&
1234 (sisbios_mode[ivideo->sisfb_mode_idx].bpp == var->bits_per_pixel)) {
1235 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni];
1239 ivideo->sisfb_mode_idx++;
1243 ivideo->sisfb_mode_idx = sisfb_validate_mode(ivideo,
1244 ivideo->sisfb_mode_idx, ivideo->currentvbflags);
1246 ivideo->sisfb_mode_idx = -1;
1249 if(ivideo->sisfb_mode_idx < 0) {
1250 printk(KERN_ERR "sisfb: Mode %dx%dx%d not supported\n", var->xres,
1251 var->yres, var->bits_per_pixel);
1252 ivideo->sisfb_mode_idx = old_mode;
1256 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni];
1258 if(sisfb_search_refresh_rate(ivideo, ivideo->refresh_rate, ivideo->sisfb_mode_idx) == 0) {
1259 ivideo->rate_idx = sisbios_mode[ivideo->sisfb_mode_idx].rate_idx;
1260 ivideo->refresh_rate = 60;
1264 /* If acceleration to be used? Need to know
1265 * before pre/post_set_mode()
1268 #if defined(FBINFO_HWACCEL_DISABLED) && defined(FBINFO_HWACCEL_XPAN)
1269 #ifdef STUPID_ACCELF_TEXT_SHIT
1270 if(var->accel_flags & FB_ACCELF_TEXT) {
1271 info->flags &= ~FBINFO_HWACCEL_DISABLED;
1273 info->flags |= FBINFO_HWACCEL_DISABLED;
1276 if(!(info->flags & FBINFO_HWACCEL_DISABLED)) ivideo->accel = -1;
1278 if(var->accel_flags & FB_ACCELF_TEXT) ivideo->accel = -1;
1281 if((ret = sisfb_set_mode(ivideo, 1))) {
1285 ivideo->video_bpp = sisbios_mode[ivideo->sisfb_mode_idx].bpp;
1286 ivideo->video_width = sisbios_mode[ivideo->sisfb_mode_idx].xres;
1287 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres;
1289 sisfb_calc_pitch(ivideo, var);
1290 sisfb_set_pitch(ivideo);
1292 sisfb_set_vparms(ivideo);
1294 ivideo->current_width = ivideo->video_width;
1295 ivideo->current_height = ivideo->video_height;
1296 ivideo->current_bpp = ivideo->video_bpp;
1297 ivideo->current_htotal = htotal;
1298 ivideo->current_vtotal = vtotal;
1299 ivideo->current_linelength = ivideo->video_linelength;
1300 ivideo->current_pixclock = var->pixclock;
1301 ivideo->current_refresh_rate = ivideo->refresh_rate;
1302 ivideo->sisfb_lastrates[ivideo->mode_no] = ivideo->refresh_rate;
1309 sisfb_set_base_CRT1(struct sis_video_info *ivideo, unsigned int base)
1311 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1313 outSISIDXREG(SISCR, 0x0D, base & 0xFF);
1314 outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
1315 outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
1316 if(ivideo->sisvga_engine == SIS_315_VGA) {
1317 setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01);
1322 sisfb_set_base_CRT2(struct sis_video_info *ivideo, unsigned int base)
1324 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1325 orSISIDXREG(SISPART1, ivideo->CRT2_write_enable, 0x01);
1326 outSISIDXREG(SISPART1, 0x06, (base & 0xFF));
1327 outSISIDXREG(SISPART1, 0x05, ((base >> 8) & 0xFF));
1328 outSISIDXREG(SISPART1, 0x04, ((base >> 16) & 0xFF));
1329 if(ivideo->sisvga_engine == SIS_315_VGA) {
1330 setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
1336 sisfb_pan_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1338 if(var->xoffset > (var->xres_virtual - var->xres)) {
1341 if(var->yoffset > (var->yres_virtual - var->yres)) {
1345 ivideo->current_base = (var->yoffset * var->xres_virtual) + var->xoffset;
1347 /* calculate base bpp dep. */
1348 switch(var->bits_per_pixel) {
1352 ivideo->current_base >>= 1;
1356 ivideo->current_base >>= 2;
1360 ivideo->current_base += (ivideo->video_offset >> 2);
1362 sisfb_set_base_CRT1(ivideo, ivideo->current_base);
1363 sisfb_set_base_CRT2(ivideo, ivideo->current_base);
1369 sisfb_open(struct fb_info *info, int user)
1375 sisfb_release(struct fb_info *info, int user)
1381 sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
1382 unsigned transp, struct fb_info *info)
1384 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1386 if(regno >= sisfb_get_cmap_len(&info->var))
1389 switch(info->var.bits_per_pixel) {
1391 outSISREG(SISDACA, regno);
1392 outSISREG(SISDACD, (red >> 10));
1393 outSISREG(SISDACD, (green >> 10));
1394 outSISREG(SISDACD, (blue >> 10));
1395 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1396 outSISREG(SISDAC2A, regno);
1397 outSISREG(SISDAC2D, (red >> 8));
1398 outSISREG(SISDAC2D, (green >> 8));
1399 outSISREG(SISDAC2D, (blue >> 8));
1406 ((u32 *)(info->pseudo_palette))[regno] =
1408 ((green & 0xfc00) >> 5) |
1409 ((blue & 0xf800) >> 11);
1418 ((u32 *)(info->pseudo_palette))[regno] =
1419 (red << 16) | (green << 8) | (blue);
1426 sisfb_set_par(struct fb_info *info)
1430 if((err = sisfb_do_set_var(&info->var, 1, info)))
1433 sisfb_get_fix(&info->fix, -1, info);
1439 sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1441 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1442 unsigned int htotal = 0, vtotal = 0, myrateindex = 0;
1443 unsigned int drate = 0, hrate = 0, maxyres;
1445 int refresh_rate, search_idx, tidx;
1446 bool recalc_clock = false;
1449 htotal = var->left_margin + var->xres + var->right_margin + var->hsync_len;
1451 vtotal = var->upper_margin + var->lower_margin + var->vsync_len;
1453 pixclock = var->pixclock;
1455 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
1456 vtotal += var->yres;
1458 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1459 vtotal += var->yres;
1461 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1462 vtotal += var->yres;
1465 vtotal += var->yres;
1467 if(!(htotal) || !(vtotal)) {
1468 SISFAIL("sisfb: no valid timing data");
1472 while( (sisbios_mode[search_idx].mode_no[0] != 0) &&
1473 (sisbios_mode[search_idx].xres <= var->xres) ) {
1474 if( (sisbios_mode[search_idx].xres == var->xres) &&
1475 (sisbios_mode[search_idx].yres == var->yres) &&
1476 (sisbios_mode[search_idx].bpp == var->bits_per_pixel)) {
1477 if((tidx = sisfb_validate_mode(ivideo, search_idx,
1478 ivideo->currentvbflags)) > 0) {
1489 while(sisbios_mode[search_idx].mode_no[0] != 0) {
1490 if( (var->xres <= sisbios_mode[search_idx].xres) &&
1491 (var->yres <= sisbios_mode[search_idx].yres) &&
1492 (var->bits_per_pixel == sisbios_mode[search_idx].bpp) ) {
1493 if((tidx = sisfb_validate_mode(ivideo,search_idx,
1494 ivideo->currentvbflags)) > 0) {
1504 "sisfb: Adapted from %dx%dx%d to %dx%dx%d\n",
1505 var->xres, var->yres, var->bits_per_pixel,
1506 sisbios_mode[search_idx].xres,
1507 sisbios_mode[search_idx].yres,
1508 var->bits_per_pixel);
1509 var->xres = sisbios_mode[search_idx].xres;
1510 var->yres = sisbios_mode[search_idx].yres;
1513 "sisfb: Failed to find supported mode near %dx%dx%d\n",
1514 var->xres, var->yres, var->bits_per_pixel);
1519 if( ((ivideo->vbflags2 & VB2_LVDS) ||
1520 ((ivideo->vbflags2 & VB2_30xBDH) && (ivideo->currentvbflags & CRT2_LCD))) &&
1521 (var->bits_per_pixel == 8) ) {
1522 /* Slave modes on LVDS and 301B-DH */
1524 recalc_clock = true;
1525 } else if( (ivideo->current_htotal == htotal) &&
1526 (ivideo->current_vtotal == vtotal) &&
1527 (ivideo->current_pixclock == pixclock) ) {
1528 /* x=x & y=y & c=c -> assume depth change */
1529 drate = 1000000000 / pixclock;
1530 hrate = (drate * 1000) / htotal;
1531 refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1532 } else if( ( (ivideo->current_htotal != htotal) ||
1533 (ivideo->current_vtotal != vtotal) ) &&
1534 (ivideo->current_pixclock == var->pixclock) ) {
1535 /* x!=x | y!=y & c=c -> invalid pixclock */
1536 if(ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]]) {
1538 ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]];
1539 } else if(ivideo->sisfb_parm_rate != -1) {
1540 /* Sic, sisfb_parm_rate - want to know originally desired rate here */
1541 refresh_rate = ivideo->sisfb_parm_rate;
1545 recalc_clock = true;
1546 } else if((pixclock) && (htotal) && (vtotal)) {
1547 drate = 1000000000 / pixclock;
1548 hrate = (drate * 1000) / htotal;
1549 refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1550 } else if(ivideo->current_refresh_rate) {
1551 refresh_rate = ivideo->current_refresh_rate;
1552 recalc_clock = true;
1555 recalc_clock = true;
1558 myrateindex = sisfb_search_refresh_rate(ivideo, refresh_rate, search_idx);
1560 /* Eventually recalculate timing and clock */
1562 if(!myrateindex) myrateindex = sisbios_mode[search_idx].rate_idx;
1563 var->pixclock = (u32) (1000000000 / sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr,
1564 sisbios_mode[search_idx].mode_no[ivideo->mni],
1566 sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr,
1567 sisbios_mode[search_idx].mode_no[ivideo->mni],
1569 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1570 var->pixclock <<= 1;
1574 if(ivideo->sisfb_thismonitor.datavalid) {
1575 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, search_idx,
1576 myrateindex, refresh_rate)) {
1578 "sisfb: WARNING: Refresh rate exceeds monitor specs!\n");
1582 /* Adapt RGB settings */
1583 sisfb_bpp_to_var(ivideo, var);
1585 /* Sanity check for offsets */
1586 if(var->xoffset < 0) var->xoffset = 0;
1587 if(var->yoffset < 0) var->yoffset = 0;
1589 if(var->xres > var->xres_virtual)
1590 var->xres_virtual = var->xres;
1592 if(ivideo->sisfb_ypan) {
1593 maxyres = sisfb_calc_maxyres(ivideo, var);
1594 if(ivideo->sisfb_max) {
1595 var->yres_virtual = maxyres;
1597 if(var->yres_virtual > maxyres) {
1598 var->yres_virtual = maxyres;
1601 if(var->yres_virtual <= var->yres) {
1602 var->yres_virtual = var->yres;
1605 if(var->yres != var->yres_virtual) {
1606 var->yres_virtual = var->yres;
1612 /* Truncate offsets to maximum if too high */
1613 if(var->xoffset > var->xres_virtual - var->xres) {
1614 var->xoffset = var->xres_virtual - var->xres - 1;
1617 if(var->yoffset > var->yres_virtual - var->yres) {
1618 var->yoffset = var->yres_virtual - var->yres - 1;
1621 /* Set everything else to 0 */
1622 var->red.msb_right =
1623 var->green.msb_right =
1624 var->blue.msb_right =
1625 var->transp.offset =
1626 var->transp.length =
1627 var->transp.msb_right = 0;
1633 sisfb_pan_display(struct fb_var_screeninfo *var, struct fb_info* info)
1635 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1638 if(var->xoffset > (var->xres_virtual - var->xres))
1641 if(var->yoffset > (var->yres_virtual - var->yres))
1644 if(var->vmode & FB_VMODE_YWRAP)
1647 if(var->xoffset + info->var.xres > info->var.xres_virtual ||
1648 var->yoffset + info->var.yres > info->var.yres_virtual)
1651 if((err = sisfb_pan_var(ivideo, var)) < 0)
1654 info->var.xoffset = var->xoffset;
1655 info->var.yoffset = var->yoffset;
1661 sisfb_blank(int blank, struct fb_info *info)
1663 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1665 return sisfb_myblank(ivideo, blank);
1668 /* ----------- FBDev related routines for all series ---------- */
1670 static int sisfb_ioctl(struct fb_info *info, unsigned int cmd,
1673 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1674 struct sis_memreq sismemreq;
1675 struct fb_vblank sisvbblank;
1680 u32 __user *argp = (u32 __user *)arg;
1684 if(!capable(CAP_SYS_RAWIO))
1687 if(copy_from_user(&sismemreq, (void __user *)arg, sizeof(sismemreq)))
1690 sis_malloc(&sismemreq);
1692 if(copy_to_user((void __user *)arg, &sismemreq, sizeof(sismemreq))) {
1693 sis_free((u32)sismemreq.offset);
1699 if(!capable(CAP_SYS_RAWIO))
1702 if(get_user(gpu32, argp))
1708 case FBIOGET_VBLANK:
1710 memset(&sisvbblank, 0, sizeof(struct fb_vblank));
1712 sisvbblank.count = 0;
1713 sisvbblank.flags = sisfb_setupvbblankflags(ivideo, &sisvbblank.vcount, &sisvbblank.hcount);
1715 if(copy_to_user((void __user *)arg, &sisvbblank, sizeof(sisvbblank)))
1720 case SISFB_GET_INFO_SIZE:
1721 return put_user(sizeof(struct sisfb_info), argp);
1723 case SISFB_GET_INFO_OLD:
1724 if(ivideo->warncount++ < 10)
1726 "sisfb: Deprecated ioctl call received - update your application!\n");
1727 case SISFB_GET_INFO: /* For communication with X driver */
1728 ivideo->sisfb_infoblock.sisfb_id = SISFB_ID;
1729 ivideo->sisfb_infoblock.sisfb_version = VER_MAJOR;
1730 ivideo->sisfb_infoblock.sisfb_revision = VER_MINOR;
1731 ivideo->sisfb_infoblock.sisfb_patchlevel = VER_LEVEL;
1732 ivideo->sisfb_infoblock.chip_id = ivideo->chip_id;
1733 ivideo->sisfb_infoblock.sisfb_pci_vendor = ivideo->chip_vendor;
1734 ivideo->sisfb_infoblock.memory = ivideo->video_size / 1024;
1735 ivideo->sisfb_infoblock.heapstart = ivideo->heapstart / 1024;
1736 if(ivideo->modechanged) {
1737 ivideo->sisfb_infoblock.fbvidmode = ivideo->mode_no;
1739 ivideo->sisfb_infoblock.fbvidmode = ivideo->modeprechange;
1741 ivideo->sisfb_infoblock.sisfb_caps = ivideo->caps;
1742 ivideo->sisfb_infoblock.sisfb_tqlen = ivideo->cmdQueueSize / 1024;
1743 ivideo->sisfb_infoblock.sisfb_pcibus = ivideo->pcibus;
1744 ivideo->sisfb_infoblock.sisfb_pcislot = ivideo->pcislot;
1745 ivideo->sisfb_infoblock.sisfb_pcifunc = ivideo->pcifunc;
1746 ivideo->sisfb_infoblock.sisfb_lcdpdc = ivideo->detectedpdc;
1747 ivideo->sisfb_infoblock.sisfb_lcdpdca = ivideo->detectedpdca;
1748 ivideo->sisfb_infoblock.sisfb_lcda = ivideo->detectedlcda;
1749 ivideo->sisfb_infoblock.sisfb_vbflags = ivideo->vbflags;
1750 ivideo->sisfb_infoblock.sisfb_currentvbflags = ivideo->currentvbflags;
1751 ivideo->sisfb_infoblock.sisfb_scalelcd = ivideo->SiS_Pr.UsePanelScaler;
1752 ivideo->sisfb_infoblock.sisfb_specialtiming = ivideo->SiS_Pr.SiS_CustomT;
1753 ivideo->sisfb_infoblock.sisfb_haveemi = ivideo->SiS_Pr.HaveEMI ? 1 : 0;
1754 ivideo->sisfb_infoblock.sisfb_haveemilcd = ivideo->SiS_Pr.HaveEMILCD ? 1 : 0;
1755 ivideo->sisfb_infoblock.sisfb_emi30 = ivideo->SiS_Pr.EMI_30;
1756 ivideo->sisfb_infoblock.sisfb_emi31 = ivideo->SiS_Pr.EMI_31;
1757 ivideo->sisfb_infoblock.sisfb_emi32 = ivideo->SiS_Pr.EMI_32;
1758 ivideo->sisfb_infoblock.sisfb_emi33 = ivideo->SiS_Pr.EMI_33;
1759 ivideo->sisfb_infoblock.sisfb_tvxpos = (u16)(ivideo->tvxpos + 32);
1760 ivideo->sisfb_infoblock.sisfb_tvypos = (u16)(ivideo->tvypos + 32);
1761 ivideo->sisfb_infoblock.sisfb_heapsize = ivideo->sisfb_heap_size / 1024;
1762 ivideo->sisfb_infoblock.sisfb_videooffset = ivideo->video_offset;
1763 ivideo->sisfb_infoblock.sisfb_curfstn = ivideo->curFSTN;
1764 ivideo->sisfb_infoblock.sisfb_curdstn = ivideo->curDSTN;
1765 ivideo->sisfb_infoblock.sisfb_vbflags2 = ivideo->vbflags2;
1766 ivideo->sisfb_infoblock.sisfb_can_post = ivideo->sisfb_can_post ? 1 : 0;
1767 ivideo->sisfb_infoblock.sisfb_card_posted = ivideo->sisfb_card_posted ? 1 : 0;
1768 ivideo->sisfb_infoblock.sisfb_was_boot_device = ivideo->sisfb_was_boot_device ? 1 : 0;
1770 if(copy_to_user((void __user *)arg, &ivideo->sisfb_infoblock,
1771 sizeof(ivideo->sisfb_infoblock)))
1776 case SISFB_GET_VBRSTATUS_OLD:
1777 if(ivideo->warncount++ < 10)
1779 "sisfb: Deprecated ioctl call received - update your application!\n");
1780 case SISFB_GET_VBRSTATUS:
1781 if(sisfb_CheckVBRetrace(ivideo))
1782 return put_user((u32)1, argp);
1784 return put_user((u32)0, argp);
1786 case SISFB_GET_AUTOMAXIMIZE_OLD:
1787 if(ivideo->warncount++ < 10)
1789 "sisfb: Deprecated ioctl call received - update your application!\n");
1790 case SISFB_GET_AUTOMAXIMIZE:
1791 if(ivideo->sisfb_max)
1792 return put_user((u32)1, argp);
1794 return put_user((u32)0, argp);
1796 case SISFB_SET_AUTOMAXIMIZE_OLD:
1797 if(ivideo->warncount++ < 10)
1799 "sisfb: Deprecated ioctl call received - update your application!\n");
1800 case SISFB_SET_AUTOMAXIMIZE:
1801 if(get_user(gpu32, argp))
1804 ivideo->sisfb_max = (gpu32) ? 1 : 0;
1807 case SISFB_SET_TVPOSOFFSET:
1808 if(get_user(gpu32, argp))
1811 sisfb_set_TVxposoffset(ivideo, ((int)(gpu32 >> 16)) - 32);
1812 sisfb_set_TVyposoffset(ivideo, ((int)(gpu32 & 0xffff)) - 32);
1815 case SISFB_GET_TVPOSOFFSET:
1816 return put_user((u32)(((ivideo->tvxpos+32)<<16)|((ivideo->tvypos+32)&0xffff)),
1820 if(copy_from_user(&ivideo->sisfb_command, (void __user *)arg,
1821 sizeof(struct sisfb_cmd)))
1824 sisfb_handle_command(ivideo, &ivideo->sisfb_command);
1826 if(copy_to_user((void __user *)arg, &ivideo->sisfb_command,
1827 sizeof(struct sisfb_cmd)))
1832 case SISFB_SET_LOCK:
1833 if(get_user(gpu32, argp))
1836 ivideo->sisfblocked = (gpu32) ? 1 : 0;
1840 #ifdef SIS_NEW_CONFIG_COMPAT
1841 return -ENOIOCTLCMD;
1850 sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
1852 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1854 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1856 strlcpy(fix->id, ivideo->myid, sizeof(fix->id));
1858 mutex_lock(&info->mm_lock);
1859 fix->smem_start = ivideo->video_base + ivideo->video_offset;
1860 fix->smem_len = ivideo->sisfb_mem;
1861 mutex_unlock(&info->mm_lock);
1862 fix->type = FB_TYPE_PACKED_PIXELS;
1864 fix->visual = (ivideo->video_bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1866 fix->ypanstep = (ivideo->sisfb_ypan) ? 1 : 0;
1868 fix->line_length = ivideo->video_linelength;
1869 fix->mmio_start = ivideo->mmio_base;
1870 fix->mmio_len = ivideo->mmio_size;
1871 if(ivideo->sisvga_engine == SIS_300_VGA) {
1872 fix->accel = FB_ACCEL_SIS_GLAMOUR;
1873 } else if((ivideo->chip == SIS_330) ||
1874 (ivideo->chip == SIS_760) ||
1875 (ivideo->chip == SIS_761)) {
1876 fix->accel = FB_ACCEL_SIS_XABRE;
1877 } else if(ivideo->chip == XGI_20) {
1878 fix->accel = FB_ACCEL_XGI_VOLARI_Z;
1879 } else if(ivideo->chip >= XGI_40) {
1880 fix->accel = FB_ACCEL_XGI_VOLARI_V;
1882 fix->accel = FB_ACCEL_SIS_GLAMOUR_2;
1888 /* ---------------- fb_ops structures ----------------- */
1890 static struct fb_ops sisfb_ops = {
1891 .owner = THIS_MODULE,
1892 .fb_open = sisfb_open,
1893 .fb_release = sisfb_release,
1894 .fb_check_var = sisfb_check_var,
1895 .fb_set_par = sisfb_set_par,
1896 .fb_setcolreg = sisfb_setcolreg,
1897 .fb_pan_display = sisfb_pan_display,
1898 .fb_blank = sisfb_blank,
1899 .fb_fillrect = fbcon_sis_fillrect,
1900 .fb_copyarea = fbcon_sis_copyarea,
1901 .fb_imageblit = cfb_imageblit,
1902 .fb_sync = fbcon_sis_sync,
1903 #ifdef SIS_NEW_CONFIG_COMPAT
1904 .fb_compat_ioctl= sisfb_ioctl,
1906 .fb_ioctl = sisfb_ioctl
1909 /* ---------------- Chip generation dependent routines ---------------- */
1911 static struct pci_dev * __devinit
1912 sisfb_get_northbridge(int basechipid)
1914 struct pci_dev *pdev = NULL;
1915 int nbridgenum, nbridgeidx, i;
1916 static const unsigned short nbridgeids[] = {
1917 PCI_DEVICE_ID_SI_540, /* for SiS 540 VGA */
1918 PCI_DEVICE_ID_SI_630, /* for SiS 630/730 VGA */
1919 PCI_DEVICE_ID_SI_730,
1920 PCI_DEVICE_ID_SI_550, /* for SiS 550 VGA */
1921 PCI_DEVICE_ID_SI_650, /* for SiS 650/651/740 VGA */
1922 PCI_DEVICE_ID_SI_651,
1923 PCI_DEVICE_ID_SI_740,
1924 PCI_DEVICE_ID_SI_661, /* for SiS 661/741/660/760/761 VGA */
1925 PCI_DEVICE_ID_SI_741,
1926 PCI_DEVICE_ID_SI_660,
1927 PCI_DEVICE_ID_SI_760,
1928 PCI_DEVICE_ID_SI_761
1931 switch(basechipid) {
1932 #ifdef CONFIG_FB_SIS_300
1933 case SIS_540: nbridgeidx = 0; nbridgenum = 1; break;
1934 case SIS_630: nbridgeidx = 1; nbridgenum = 2; break;
1936 #ifdef CONFIG_FB_SIS_315
1937 case SIS_550: nbridgeidx = 3; nbridgenum = 1; break;
1938 case SIS_650: nbridgeidx = 4; nbridgenum = 3; break;
1939 case SIS_660: nbridgeidx = 7; nbridgenum = 5; break;
1941 default: return NULL;
1943 for(i = 0; i < nbridgenum; i++) {
1944 if((pdev = pci_get_device(PCI_VENDOR_ID_SI,
1945 nbridgeids[nbridgeidx+i], NULL)))
1951 static int __devinit
1952 sisfb_get_dram_size(struct sis_video_info *ivideo)
1954 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
1958 ivideo->video_size = 0;
1959 ivideo->UMAsize = ivideo->LFBsize = 0;
1961 switch(ivideo->chip) {
1962 #ifdef CONFIG_FB_SIS_300
1964 inSISIDXREG(SISSR, 0x14, reg);
1965 ivideo->video_size = ((reg & 0x3F) + 1) << 20;
1970 if(!ivideo->nbridge)
1972 pci_read_config_byte(ivideo->nbridge, 0x63, ®);
1973 ivideo->video_size = 1 << (((reg & 0x70) >> 4) + 21);
1976 #ifdef CONFIG_FB_SIS_315
1980 inSISIDXREG(SISSR, 0x14, reg);
1981 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
1982 switch((reg >> 2) & 0x03) {
1985 ivideo->video_size <<= 1;
1988 ivideo->video_size += (ivideo->video_size/2);
1992 inSISIDXREG(SISSR, 0x14, reg);
1993 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
1994 if(reg & 0x0c) ivideo->video_size <<= 1;
1999 inSISIDXREG(SISSR, 0x14, reg);
2000 ivideo->video_size = (((reg & 0x3f) + 1) << 2) << 20;
2004 inSISIDXREG(SISCR, 0x79, reg);
2005 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2010 inSISIDXREG(SISCR, 0x79, reg);
2011 reg = (reg & 0xf0) >> 4;
2013 ivideo->video_size = (1 << reg) << 20;
2014 ivideo->UMAsize = ivideo->video_size;
2016 inSISIDXREG(SISCR, 0x78, reg);
2020 ivideo->LFBsize = (32 << 20);
2022 ivideo->LFBsize = (64 << 20);
2024 ivideo->video_size += ivideo->LFBsize;
2030 inSISIDXREG(SISSR, 0x14, reg);
2031 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2032 if(ivideo->chip != XGI_20) {
2033 reg = (reg & 0x0c) >> 2;
2034 if(ivideo->revision_id == 2) {
2035 if(reg & 0x01) reg = 0x02;
2038 if(reg == 0x02) ivideo->video_size <<= 1;
2039 else if(reg == 0x03) ivideo->video_size <<= 2;
2049 /* -------------- video bridge device detection --------------- */
2051 static void __devinit
2052 sisfb_detect_VB_connect(struct sis_video_info *ivideo)
2056 /* No CRT2 on XGI Z7 */
2057 if(ivideo->chip == XGI_20) {
2058 ivideo->sisfb_crt1off = 0;
2062 #ifdef CONFIG_FB_SIS_300
2063 if(ivideo->sisvga_engine == SIS_300_VGA) {
2064 inSISIDXREG(SISSR, 0x17, temp);
2065 if((temp & 0x0F) && (ivideo->chip != SIS_300)) {
2066 /* PAL/NTSC is stored on SR16 on such machines */
2067 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN))) {
2068 inSISIDXREG(SISSR, 0x16, temp);
2070 ivideo->vbflags |= TV_PAL;
2072 ivideo->vbflags |= TV_NTSC;
2078 inSISIDXREG(SISCR, 0x32, cr32);
2080 if(cr32 & SIS_CRT1) {
2081 ivideo->sisfb_crt1off = 0;
2083 ivideo->sisfb_crt1off = (cr32 & 0xDF) ? 1 : 0;
2086 ivideo->vbflags &= ~(CRT2_TV | CRT2_LCD | CRT2_VGA);
2088 if(cr32 & SIS_VB_TV) ivideo->vbflags |= CRT2_TV;
2089 if(cr32 & SIS_VB_LCD) ivideo->vbflags |= CRT2_LCD;
2090 if(cr32 & SIS_VB_CRT2) ivideo->vbflags |= CRT2_VGA;
2092 /* Check given parms for hardware compatibility.
2093 * (Cannot do this in the search_xx routines since we don't
2094 * know what hardware we are running on then)
2097 if(ivideo->chip != SIS_550) {
2098 ivideo->sisfb_dstn = ivideo->sisfb_fstn = 0;
2101 if(ivideo->sisfb_tvplug != -1) {
2102 if( (ivideo->sisvga_engine != SIS_315_VGA) ||
2103 (!(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) ) {
2104 if(ivideo->sisfb_tvplug & TV_YPBPR) {
2105 ivideo->sisfb_tvplug = -1;
2106 printk(KERN_ERR "sisfb: YPbPr not supported\n");
2110 if(ivideo->sisfb_tvplug != -1) {
2111 if( (ivideo->sisvga_engine != SIS_315_VGA) ||
2112 (!(ivideo->vbflags2 & VB2_SISHIVISIONBRIDGE)) ) {
2113 if(ivideo->sisfb_tvplug & TV_HIVISION) {
2114 ivideo->sisfb_tvplug = -1;
2115 printk(KERN_ERR "sisfb: HiVision not supported\n");
2119 if(ivideo->sisfb_tvstd != -1) {
2120 if( (!(ivideo->vbflags2 & VB2_SISBRIDGE)) &&
2121 (!((ivideo->sisvga_engine == SIS_315_VGA) &&
2122 (ivideo->vbflags2 & VB2_CHRONTEL))) ) {
2123 if(ivideo->sisfb_tvstd & (TV_PALM | TV_PALN | TV_NTSCJ)) {
2124 ivideo->sisfb_tvstd = -1;
2125 printk(KERN_ERR "sisfb: PALM/PALN/NTSCJ not supported\n");
2130 /* Detect/set TV plug & type */
2131 if(ivideo->sisfb_tvplug != -1) {
2132 ivideo->vbflags |= ivideo->sisfb_tvplug;
2134 if(cr32 & SIS_VB_YPBPR) ivideo->vbflags |= (TV_YPBPR|TV_YPBPR525I); /* default: 480i */
2135 else if(cr32 & SIS_VB_HIVISION) ivideo->vbflags |= TV_HIVISION;
2136 else if(cr32 & SIS_VB_SCART) ivideo->vbflags |= TV_SCART;
2138 if(cr32 & SIS_VB_SVIDEO) ivideo->vbflags |= TV_SVIDEO;
2139 if(cr32 & SIS_VB_COMPOSITE) ivideo->vbflags |= TV_AVIDEO;
2143 if(!(ivideo->vbflags & (TV_YPBPR | TV_HIVISION))) {
2144 if(ivideo->sisfb_tvstd != -1) {
2145 ivideo->vbflags &= ~(TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ);
2146 ivideo->vbflags |= ivideo->sisfb_tvstd;
2148 if(ivideo->vbflags & TV_SCART) {
2149 ivideo->vbflags &= ~(TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ);
2150 ivideo->vbflags |= TV_PAL;
2152 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ))) {
2153 if(ivideo->sisvga_engine == SIS_300_VGA) {
2154 inSISIDXREG(SISSR, 0x38, temp);
2155 if(temp & 0x01) ivideo->vbflags |= TV_PAL;
2156 else ivideo->vbflags |= TV_NTSC;
2157 } else if((ivideo->chip <= SIS_315PRO) || (ivideo->chip >= SIS_330)) {
2158 inSISIDXREG(SISSR, 0x38, temp);
2159 if(temp & 0x01) ivideo->vbflags |= TV_PAL;
2160 else ivideo->vbflags |= TV_NTSC;
2162 inSISIDXREG(SISCR, 0x79, temp);
2163 if(temp & 0x20) ivideo->vbflags |= TV_PAL;
2164 else ivideo->vbflags |= TV_NTSC;
2169 /* Copy forceCRT1 option to CRT1off if option is given */
2170 if(ivideo->sisfb_forcecrt1 != -1) {
2171 ivideo->sisfb_crt1off = (ivideo->sisfb_forcecrt1) ? 0 : 1;
2175 /* ------------------ Sensing routines ------------------ */
2177 static bool __devinit
2178 sisfb_test_DDC1(struct sis_video_info *ivideo)
2183 old = SiS_ReadDDC1Bit(&ivideo->SiS_Pr);
2185 if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break;
2187 return (count != -1);
2190 static void __devinit
2191 sisfb_sense_crt1(struct sis_video_info *ivideo)
2193 bool mustwait = false;
2195 #ifdef CONFIG_FB_SIS_315
2201 inSISIDXREG(SISSR,0x1F,sr1F);
2202 orSISIDXREG(SISSR,0x1F,0x04);
2203 andSISIDXREG(SISSR,0x1F,0x3F);
2204 if(sr1F & 0xc0) mustwait = true;
2206 #ifdef CONFIG_FB_SIS_315
2207 if(ivideo->sisvga_engine == SIS_315_VGA) {
2208 inSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,cr63);
2210 andSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,0xBF);
2214 inSISIDXREG(SISCR,0x17,cr17);
2217 orSISIDXREG(SISCR,0x17,0x80);
2219 outSISIDXREG(SISSR, 0x00, 0x01);
2220 outSISIDXREG(SISSR, 0x00, 0x03);
2224 for(i=0; i < 10; i++) sisfbwaitretracecrt1(ivideo);
2227 #ifdef CONFIG_FB_SIS_315
2228 if(ivideo->chip >= SIS_330) {
2229 andSISIDXREG(SISCR,0x32,~0x20);
2230 if(ivideo->chip >= SIS_340) {
2231 outSISIDXREG(SISCR, 0x57, 0x4a);
2233 outSISIDXREG(SISCR, 0x57, 0x5f);
2235 orSISIDXREG(SISCR, 0x53, 0x02);
2236 while((inSISREG(SISINPSTAT)) & 0x01) break;
2237 while(!((inSISREG(SISINPSTAT)) & 0x01)) break;
2238 if((inSISREG(SISMISCW)) & 0x10) temp = 1;
2239 andSISIDXREG(SISCR, 0x53, 0xfd);
2240 andSISIDXREG(SISCR, 0x57, 0x00);
2244 if(temp == 0xffff) {
2247 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags,
2248 ivideo->sisvga_engine, 0, 0, NULL, ivideo->vbflags2);
2249 } while(((temp == 0) || (temp == 0xffff)) && i--);
2251 if((temp == 0) || (temp == 0xffff)) {
2252 if(sisfb_test_DDC1(ivideo)) temp = 1;
2256 if((temp) && (temp != 0xffff)) {
2257 orSISIDXREG(SISCR,0x32,0x20);
2260 #ifdef CONFIG_FB_SIS_315
2261 if(ivideo->sisvga_engine == SIS_315_VGA) {
2262 setSISIDXREG(SISCR,ivideo->SiS_Pr.SiS_MyCR63,0xBF,cr63);
2266 setSISIDXREG(SISCR,0x17,0x7F,cr17);
2268 outSISIDXREG(SISSR,0x1F,sr1F);
2271 /* Determine and detect attached devices on SiS30x */
2272 static void __devinit
2273 SiS_SenseLCD(struct sis_video_info *ivideo)
2275 unsigned char buffer[256];
2276 unsigned short temp, realcrtno, i;
2277 u8 reg, cr37 = 0, paneltype = 0;
2280 ivideo->SiS_Pr.PanelSelfDetected = false;
2282 /* LCD detection only for TMDS bridges */
2283 if(!(ivideo->vbflags2 & VB2_SISTMDSBRIDGE))
2285 if(ivideo->vbflags2 & VB2_30xBDH)
2288 /* If LCD already set up by BIOS, skip it */
2289 inSISIDXREG(SISCR, 0x32, reg);
2294 if(ivideo->SiS_Pr.DDCPortMixup)
2297 /* Check DDC capabilities */
2298 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
2299 realcrtno, 0, &buffer[0], ivideo->vbflags2);
2301 if((!temp) || (temp == 0xffff) || (!(temp & 0x02)))
2305 i = 3; /* Number of retrys */
2307 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags,
2308 ivideo->sisvga_engine, realcrtno, 1,
2309 &buffer[0], ivideo->vbflags2);
2310 } while((temp) && i--);
2315 /* No digital device */
2316 if(!(buffer[0x14] & 0x80))
2319 /* First detailed timing preferred timing? */
2320 if(!(buffer[0x18] & 0x02))
2323 xres = buffer[0x38] | ((buffer[0x3a] & 0xf0) << 4);
2324 yres = buffer[0x3b] | ((buffer[0x3d] & 0xf0) << 4);
2336 if((yres == 1200) && (ivideo->vbflags2 & VB2_30xC))
2347 if((buffer[0x47] & 0x18) == 0x18)
2348 cr37 |= ((((buffer[0x47] & 0x06) ^ 0x06) << 5) | 0x20);
2352 outSISIDXREG(SISCR, 0x36, paneltype);
2354 setSISIDXREG(SISCR, 0x37, 0x0c, cr37);
2355 orSISIDXREG(SISCR, 0x32, 0x08);
2357 ivideo->SiS_Pr.PanelSelfDetected = true;
2360 static int __devinit
2361 SISDoSense(struct sis_video_info *ivideo, u16 type, u16 test)
2363 int temp, mytest, result, i, j;
2365 for(j = 0; j < 10; j++) {
2367 for(i = 0; i < 3; i++) {
2369 outSISIDXREG(SISPART4,0x11,(type & 0x00ff));
2370 temp = (type >> 8) | (mytest & 0x00ff);
2371 setSISIDXREG(SISPART4,0x10,0xe0,temp);
2372 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x1500);
2375 inSISIDXREG(SISPART4,0x03,temp);
2378 if(temp == mytest) result++;
2380 outSISIDXREG(SISPART4,0x11,0x00);
2381 andSISIDXREG(SISPART4,0x10,0xe0);
2382 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x1000);
2385 if((result == 0) || (result >= 2)) break;
2390 static void __devinit
2391 SiS_Sense30x(struct sis_video_info *ivideo)
2393 u8 backupP4_0d,backupP2_00,backupP2_4d,backupSR_1e,biosflag=0;
2394 u16 svhs=0, svhs_c=0;
2395 u16 cvbs=0, cvbs_c=0;
2396 u16 vga2=0, vga2_c=0;
2398 char stdstr[] = "sisfb: Detected";
2399 char tvstr[] = "TV connected to";
2401 if(ivideo->vbflags2 & VB2_301) {
2402 svhs = 0x00b9; cvbs = 0x00b3; vga2 = 0x00d1;
2403 inSISIDXREG(SISPART4,0x01,myflag);
2405 svhs = 0x00dd; cvbs = 0x00ee; vga2 = 0x00fd;
2407 } else if(ivideo->vbflags2 & (VB2_301B | VB2_302B)) {
2408 svhs = 0x016b; cvbs = 0x0174; vga2 = 0x0190;
2409 } else if(ivideo->vbflags2 & (VB2_301LV | VB2_302LV)) {
2410 svhs = 0x0200; cvbs = 0x0100;
2411 } else if(ivideo->vbflags2 & (VB2_301C | VB2_302ELV | VB2_307T | VB2_307LV)) {
2412 svhs = 0x016b; cvbs = 0x0110; vga2 = 0x0190;
2416 vga2_c = 0x0e08; svhs_c = 0x0404; cvbs_c = 0x0804;
2417 if(ivideo->vbflags & (VB2_301LV|VB2_302LV|VB2_302ELV|VB2_307LV)) {
2418 svhs_c = 0x0408; cvbs_c = 0x0808;
2422 if(ivideo->haveXGIROM) {
2423 biosflag = ivideo->bios_abase[0x58] & 0x03;
2424 } else if(ivideo->newrom) {
2425 if(ivideo->bios_abase[0x5d] & 0x04) biosflag |= 0x01;
2426 } else if(ivideo->sisvga_engine == SIS_300_VGA) {
2427 if(ivideo->bios_abase) {
2428 biosflag = ivideo->bios_abase[0xfe] & 0x03;
2432 if(ivideo->chip == SIS_300) {
2433 inSISIDXREG(SISSR,0x3b,myflag);
2434 if(!(myflag & 0x01)) vga2 = vga2_c = 0;
2437 if(!(ivideo->vbflags2 & VB2_SISVGA2BRIDGE)) {
2441 inSISIDXREG(SISSR,0x1e,backupSR_1e);
2442 orSISIDXREG(SISSR,0x1e,0x20);
2444 inSISIDXREG(SISPART4,0x0d,backupP4_0d);
2445 if(ivideo->vbflags2 & VB2_30xC) {
2446 setSISIDXREG(SISPART4,0x0d,~0x07,0x01);
2448 orSISIDXREG(SISPART4,0x0d,0x04);
2450 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000);
2452 inSISIDXREG(SISPART2,0x00,backupP2_00);
2453 outSISIDXREG(SISPART2,0x00,((backupP2_00 | 0x1c) & 0xfc));
2455 inSISIDXREG(SISPART2,0x4d,backupP2_4d);
2456 if(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE) {
2457 outSISIDXREG(SISPART2,0x4d,(backupP2_4d & ~0x10));
2460 if(!(ivideo->vbflags2 & VB2_30xCLV)) {
2461 SISDoSense(ivideo, 0, 0);
2464 andSISIDXREG(SISCR, 0x32, ~0x14);
2466 if(vga2_c || vga2) {
2467 if(SISDoSense(ivideo, vga2, vga2_c)) {
2468 if(biosflag & 0x01) {
2469 printk(KERN_INFO "%s %s SCART output\n", stdstr, tvstr);
2470 orSISIDXREG(SISCR, 0x32, 0x04);
2472 printk(KERN_INFO "%s secondary VGA connection\n", stdstr);
2473 orSISIDXREG(SISCR, 0x32, 0x10);
2478 andSISIDXREG(SISCR, 0x32, 0x3f);
2480 if(ivideo->vbflags2 & VB2_30xCLV) {
2481 orSISIDXREG(SISPART4,0x0d,0x04);
2484 if((ivideo->sisvga_engine == SIS_315_VGA) && (ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) {
2485 outSISIDXREG(SISPART2,0x4d,(backupP2_4d | 0x10));
2486 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000);
2487 if((result = SISDoSense(ivideo, svhs, 0x0604))) {
2488 if((result = SISDoSense(ivideo, cvbs, 0x0804))) {
2489 printk(KERN_INFO "%s %s YPbPr component output\n", stdstr, tvstr);
2490 orSISIDXREG(SISCR,0x32,0x80);
2493 outSISIDXREG(SISPART2,0x4d,backupP2_4d);
2496 andSISIDXREG(SISCR, 0x32, ~0x03);
2498 if(!(ivideo->vbflags & TV_YPBPR)) {
2499 if((result = SISDoSense(ivideo, svhs, svhs_c))) {
2500 printk(KERN_INFO "%s %s SVIDEO output\n", stdstr, tvstr);
2501 orSISIDXREG(SISCR, 0x32, 0x02);
2503 if((biosflag & 0x02) || (!result)) {
2504 if(SISDoSense(ivideo, cvbs, cvbs_c)) {
2505 printk(KERN_INFO "%s %s COMPOSITE output\n", stdstr, tvstr);
2506 orSISIDXREG(SISCR, 0x32, 0x01);
2511 SISDoSense(ivideo, 0, 0);
2513 outSISIDXREG(SISPART2,0x00,backupP2_00);
2514 outSISIDXREG(SISPART4,0x0d,backupP4_0d);
2515 outSISIDXREG(SISSR,0x1e,backupSR_1e);
2517 if(ivideo->vbflags2 & VB2_30xCLV) {
2518 inSISIDXREG(SISPART2,0x00,biosflag);
2519 if(biosflag & 0x20) {
2520 for(myflag = 2; myflag > 0; myflag--) {
2522 outSISIDXREG(SISPART2,0x00,biosflag);
2527 outSISIDXREG(SISPART2,0x00,backupP2_00);
2530 /* Determine and detect attached TV's on Chrontel */
2531 static void __devinit
2532 SiS_SenseCh(struct sis_video_info *ivideo)
2534 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
2536 char stdstr[] = "sisfb: Chrontel: Detected TV connected to";
2538 #ifdef CONFIG_FB_SIS_300
2539 unsigned char test[3];
2543 if(ivideo->chip < SIS_315H) {
2545 #ifdef CONFIG_FB_SIS_300
2546 ivideo->SiS_Pr.SiS_IF_DEF_CH70xx = 1; /* Chrontel 700x */
2547 SiS_SetChrontelGPIO(&ivideo->SiS_Pr, 0x9c); /* Set general purpose IO for Chrontel communication */
2548 SiS_DDC2Delay(&ivideo->SiS_Pr, 1000);
2549 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x25);
2550 /* See Chrontel TB31 for explanation */
2551 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e);
2552 if(((temp2 & 0x07) == 0x01) || (temp2 & 0x04)) {
2553 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0e, 0x0b);
2554 SiS_DDC2Delay(&ivideo->SiS_Pr, 300);
2556 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x25);
2557 if(temp2 != temp1) temp1 = temp2;
2559 if((temp1 >= 0x22) && (temp1 <= 0x50)) {
2560 /* Read power status */
2561 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e);
2562 if((temp1 & 0x03) != 0x03) {
2563 /* Power all outputs */
2564 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0e,0x0b);
2565 SiS_DDC2Delay(&ivideo->SiS_Pr, 300);
2567 /* Sense connected TV devices */
2568 for(i = 0; i < 3; i++) {
2569 SiS_SetCH700x(&ivideo->SiS_Pr, 0x10, 0x01);
2570 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2571 SiS_SetCH700x(&ivideo->SiS_Pr, 0x10, 0x00);
2572 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2573 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x10);
2574 if(!(temp1 & 0x08)) test[i] = 0x02;
2575 else if(!(temp1 & 0x02)) test[i] = 0x01;
2577 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2580 if(test[0] == test[1]) temp1 = test[0];
2581 else if(test[0] == test[2]) temp1 = test[0];
2582 else if(test[1] == test[2]) temp1 = test[1];
2585 "sisfb: TV detection unreliable - test results varied\n");
2589 printk(KERN_INFO "%s SVIDEO output\n", stdstr);
2590 ivideo->vbflags |= TV_SVIDEO;
2591 orSISIDXREG(SISCR, 0x32, 0x02);
2592 andSISIDXREG(SISCR, 0x32, ~0x05);
2593 } else if (temp1 == 0x01) {
2594 printk(KERN_INFO "%s CVBS output\n", stdstr);
2595 ivideo->vbflags |= TV_AVIDEO;
2596 orSISIDXREG(SISCR, 0x32, 0x01);
2597 andSISIDXREG(SISCR, 0x32, ~0x06);
2599 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x0e, 0x01, 0xF8);
2600 andSISIDXREG(SISCR, 0x32, ~0x07);
2602 } else if(temp1 == 0) {
2603 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x0e, 0x01, 0xF8);
2604 andSISIDXREG(SISCR, 0x32, ~0x07);
2606 /* Set general purpose IO for Chrontel communication */
2607 SiS_SetChrontelGPIO(&ivideo->SiS_Pr, 0x00);
2612 #ifdef CONFIG_FB_SIS_315
2613 ivideo->SiS_Pr.SiS_IF_DEF_CH70xx = 2; /* Chrontel 7019 */
2614 temp1 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x49);
2615 SiS_SetCH701x(&ivideo->SiS_Pr, 0x49, 0x20);
2616 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2617 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20);
2619 SiS_SetCH701x(&ivideo->SiS_Pr, 0x20, temp2);
2620 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2622 SiS_SetCH701x(&ivideo->SiS_Pr, 0x20, temp2);
2623 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2624 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20);
2625 SiS_SetCH701x(&ivideo->SiS_Pr, 0x49, temp1);
2627 if(temp2 & 0x02) temp1 |= 0x01;
2628 if(temp2 & 0x10) temp1 |= 0x01;
2629 if(temp2 & 0x04) temp1 |= 0x02;
2630 if( (temp1 & 0x01) && (temp1 & 0x02) ) temp1 = 0x04;
2633 printk(KERN_INFO "%s CVBS output\n", stdstr);
2634 ivideo->vbflags |= TV_AVIDEO;
2635 orSISIDXREG(SISCR, 0x32, 0x01);
2636 andSISIDXREG(SISCR, 0x32, ~0x06);
2639 printk(KERN_INFO "%s SVIDEO output\n", stdstr);
2640 ivideo->vbflags |= TV_SVIDEO;
2641 orSISIDXREG(SISCR, 0x32, 0x02);
2642 andSISIDXREG(SISCR, 0x32, ~0x05);
2645 printk(KERN_INFO "%s SCART output\n", stdstr);
2646 orSISIDXREG(SISCR, 0x32, 0x04);
2647 andSISIDXREG(SISCR, 0x32, ~0x03);
2650 andSISIDXREG(SISCR, 0x32, ~0x07);
2656 static void __devinit
2657 sisfb_get_VB_type(struct sis_video_info *ivideo)
2659 char stdstr[] = "sisfb: Detected";
2660 char bridgestr[] = "video bridge";
2664 /* No CRT2 on XGI Z7 */
2665 if(ivideo->chip == XGI_20)
2668 inSISIDXREG(SISPART4, 0x00, vb_chipid);
2671 inSISIDXREG(SISPART4, 0x01, reg);
2673 ivideo->vbflags |= VB_301; /* Deprecated */
2674 ivideo->vbflags2 |= VB2_301;
2675 printk(KERN_INFO "%s SiS301 %s\n", stdstr, bridgestr);
2676 } else if(reg < 0xc0) {
2677 ivideo->vbflags |= VB_301B; /* Deprecated */
2678 ivideo->vbflags2 |= VB2_301B;
2679 inSISIDXREG(SISPART4,0x23,reg);
2681 ivideo->vbflags |= VB_30xBDH; /* Deprecated */
2682 ivideo->vbflags2 |= VB2_30xBDH;
2683 printk(KERN_INFO "%s SiS301B-DH %s\n", stdstr, bridgestr);
2685 printk(KERN_INFO "%s SiS301B %s\n", stdstr, bridgestr);
2687 } else if(reg < 0xd0) {
2688 ivideo->vbflags |= VB_301C; /* Deprecated */
2689 ivideo->vbflags2 |= VB2_301C;
2690 printk(KERN_INFO "%s SiS301C %s\n", stdstr, bridgestr);
2691 } else if(reg < 0xe0) {
2692 ivideo->vbflags |= VB_301LV; /* Deprecated */
2693 ivideo->vbflags2 |= VB2_301LV;
2694 printk(KERN_INFO "%s SiS301LV %s\n", stdstr, bridgestr);
2695 } else if(reg <= 0xe1) {
2696 inSISIDXREG(SISPART4,0x39,reg);
2698 ivideo->vbflags |= VB_302LV; /* Deprecated */
2699 ivideo->vbflags2 |= VB2_302LV;
2700 printk(KERN_INFO "%s SiS302LV %s\n", stdstr, bridgestr);
2702 ivideo->vbflags |= VB_301C; /* Deprecated */
2703 ivideo->vbflags2 |= VB2_301C;
2704 printk(KERN_INFO "%s SiS301C(P4) %s\n", stdstr, bridgestr);
2706 ivideo->vbflags |= VB_302ELV; /* Deprecated */
2707 ivideo->vbflags2 |= VB2_302ELV;
2708 printk(KERN_INFO "%s SiS302ELV %s\n", stdstr, bridgestr);
2714 ivideo->vbflags |= VB_302B; /* Deprecated */
2715 ivideo->vbflags2 |= VB2_302B;
2716 printk(KERN_INFO "%s SiS302B %s\n", stdstr, bridgestr);
2720 if((!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) && (ivideo->chip != SIS_300)) {
2721 inSISIDXREG(SISCR, 0x37, reg);
2722 reg &= SIS_EXTERNAL_CHIP_MASK;
2724 if(ivideo->sisvga_engine == SIS_300_VGA) {
2725 #ifdef CONFIG_FB_SIS_300
2727 case SIS_EXTERNAL_CHIP_LVDS:
2728 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2729 ivideo->vbflags2 |= VB2_LVDS;
2731 case SIS_EXTERNAL_CHIP_TRUMPION:
2732 ivideo->vbflags |= (VB_LVDS | VB_TRUMPION); /* Deprecated */
2733 ivideo->vbflags2 |= (VB2_LVDS | VB2_TRUMPION);
2735 case SIS_EXTERNAL_CHIP_CHRONTEL:
2736 ivideo->vbflags |= VB_CHRONTEL; /* Deprecated */
2737 ivideo->vbflags2 |= VB2_CHRONTEL;
2739 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
2740 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2741 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2744 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 1;
2746 } else if(ivideo->chip < SIS_661) {
2747 #ifdef CONFIG_FB_SIS_315
2749 case SIS310_EXTERNAL_CHIP_LVDS:
2750 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2751 ivideo->vbflags2 |= VB2_LVDS;
2753 case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
2754 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2755 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2758 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 2;
2760 } else if(ivideo->chip >= SIS_661) {
2761 #ifdef CONFIG_FB_SIS_315
2762 inSISIDXREG(SISCR, 0x38, reg);
2766 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2767 ivideo->vbflags2 |= VB2_LVDS;
2770 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2771 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2774 ivideo->vbflags |= (VB_LVDS | VB_CONEXANT); /* Deprecated */
2775 ivideo->vbflags2 |= (VB2_LVDS | VB2_CONEXANT);
2778 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 2;
2781 if(ivideo->vbflags2 & VB2_LVDS) {
2782 printk(KERN_INFO "%s LVDS transmitter\n", stdstr);
2784 if((ivideo->sisvga_engine == SIS_300_VGA) && (ivideo->vbflags2 & VB2_TRUMPION)) {
2785 printk(KERN_INFO "%s Trumpion Zurac LCD scaler\n", stdstr);
2787 if(ivideo->vbflags2 & VB2_CHRONTEL) {
2788 printk(KERN_INFO "%s Chrontel TV encoder\n", stdstr);
2790 if((ivideo->chip >= SIS_661) && (ivideo->vbflags2 & VB2_CONEXANT)) {
2791 printk(KERN_INFO "%s Conexant external device\n", stdstr);
2795 if(ivideo->vbflags2 & VB2_SISBRIDGE) {
2796 SiS_SenseLCD(ivideo);
2797 SiS_Sense30x(ivideo);
2798 } else if(ivideo->vbflags2 & VB2_CHRONTEL) {
2799 SiS_SenseCh(ivideo);
2803 /* ---------- Engine initialization routines ------------ */
2806 sisfb_engine_init(struct sis_video_info *ivideo)
2809 /* Initialize command queue (we use MMIO only) */
2811 /* BEFORE THIS IS CALLED, THE ENGINES *MUST* BE SYNC'ED */
2813 ivideo->caps &= ~(TURBO_QUEUE_CAP |
2814 MMIO_CMD_QUEUE_CAP |
2818 #ifdef CONFIG_FB_SIS_300
2819 if(ivideo->sisvga_engine == SIS_300_VGA) {
2823 tqueue_pos = (ivideo->video_size - ivideo->cmdQueueSize) / (64 * 1024);
2825 inSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
2828 tq_state |= (u8)(tqueue_pos >> 8);
2829 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
2831 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_ADR, (u8)(tqueue_pos & 0xff));
2833 ivideo->caps |= TURBO_QUEUE_CAP;
2837 #ifdef CONFIG_FB_SIS_315
2838 if(ivideo->sisvga_engine == SIS_315_VGA) {
2839 u32 tempq = 0, templ;
2842 if(ivideo->chip == XGI_20) {
2843 switch(ivideo->cmdQueueSize) {
2845 temp = SIS_CMD_QUEUE_SIZE_Z7_64k;
2849 temp = SIS_CMD_QUEUE_SIZE_Z7_128k;
2852 switch(ivideo->cmdQueueSize) {
2853 case (4 * 1024 * 1024):
2854 temp = SIS_CMD_QUEUE_SIZE_4M;
2856 case (2 * 1024 * 1024):
2857 temp = SIS_CMD_QUEUE_SIZE_2M;
2859 case (1 * 1024 * 1024):
2860 temp = SIS_CMD_QUEUE_SIZE_1M;
2864 temp = SIS_CMD_QUEUE_SIZE_512k;
2868 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD);
2869 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
2871 if((ivideo->chip >= XGI_40) && ivideo->modechanged) {
2872 /* Must disable dual pipe on XGI_40. Can't do
2873 * this in MMIO mode, because it requires
2874 * setting/clearing a bit in the MMIO fire trigger
2877 if(!((templ = MMIO_IN32(ivideo->mmio_vbase, 0x8240)) & (1 << 10))) {
2879 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, 0);
2881 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, (temp | SIS_VRAM_CMDQUEUE_ENABLE));
2883 tempq = MMIO_IN32(ivideo->mmio_vbase, Q_READ_PTR);
2884 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, tempq);
2886 tempq = (u32)(ivideo->video_size - ivideo->cmdQueueSize);
2887 MMIO_OUT32(ivideo->mmio_vbase, Q_BASE_ADDR, tempq);
2889 writel(0x16800000 + 0x8240, ivideo->video_vbase + tempq);
2890 writel(templ | (1 << 10), ivideo->video_vbase + tempq + 4);
2891 writel(0x168F0000, ivideo->video_vbase + tempq + 8);
2892 writel(0x168F0000, ivideo->video_vbase + tempq + 12);
2894 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, (tempq + 16));
2896 sisfb_syncaccel(ivideo);
2898 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
2903 tempq = MMIO_IN32(ivideo->mmio_vbase, MMIO_QUEUE_READPORT);
2904 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_WRITEPORT, tempq);
2906 temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR);
2907 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp);
2909 tempq = (u32)(ivideo->video_size - ivideo->cmdQueueSize);
2910 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_PHYBASE, tempq);
2912 ivideo->caps |= MMIO_CMD_QUEUE_CAP;
2916 ivideo->engineok = 1;
2919 static void __devinit
2920 sisfb_detect_lcd_type(struct sis_video_info *ivideo)
2925 inSISIDXREG(SISCR, 0x36, reg);
2927 if(ivideo->sisvga_engine == SIS_300_VGA) {
2928 ivideo->CRT2LCDType = sis300paneltype[reg];
2929 } else if(ivideo->chip >= SIS_661) {
2930 ivideo->CRT2LCDType = sis661paneltype[reg];
2932 ivideo->CRT2LCDType = sis310paneltype[reg];
2933 if((ivideo->chip == SIS_550) && (sisfb_fstn)) {
2934 if((ivideo->CRT2LCDType != LCD_320x240_2) &&
2935 (ivideo->CRT2LCDType != LCD_320x240_3)) {
2936 ivideo->CRT2LCDType = LCD_320x240;
2941 if(ivideo->CRT2LCDType == LCD_UNKNOWN) {
2942 /* For broken BIOSes: Assume 1024x768, RGB18 */
2943 ivideo->CRT2LCDType = LCD_1024x768;
2944 setSISIDXREG(SISCR,0x36,0xf0,0x02);
2945 setSISIDXREG(SISCR,0x37,0xee,0x01);
2946 printk(KERN_DEBUG "sisfb: Invalid panel ID (%02x), assuming 1024x768, RGB18\n", reg);
2949 for(i = 0; i < SIS_LCD_NUMBER; i++) {
2950 if(ivideo->CRT2LCDType == sis_lcd_data[i].lcdtype) {
2951 ivideo->lcdxres = sis_lcd_data[i].xres;
2952 ivideo->lcdyres = sis_lcd_data[i].yres;
2953 ivideo->lcddefmodeidx = sis_lcd_data[i].default_mode_idx;
2958 #ifdef CONFIG_FB_SIS_300
2959 if(ivideo->SiS_Pr.SiS_CustomT == CUT_BARCO1366) {
2960 ivideo->lcdxres = 1360; ivideo->lcdyres = 1024;
2961 ivideo->lcddefmodeidx = DEFAULT_MODE_1360;
2962 } else if(ivideo->SiS_Pr.SiS_CustomT == CUT_PANEL848) {
2963 ivideo->lcdxres = 848; ivideo->lcdyres = 480;
2964 ivideo->lcddefmodeidx = DEFAULT_MODE_848;
2965 } else if(ivideo->SiS_Pr.SiS_CustomT == CUT_PANEL856) {
2966 ivideo->lcdxres = 856; ivideo->lcdyres = 480;
2967 ivideo->lcddefmodeidx = DEFAULT_MODE_856;
2971 printk(KERN_DEBUG "sisfb: Detected %dx%d flat panel\n",
2972 ivideo->lcdxres, ivideo->lcdyres);
2975 static void __devinit
2976 sisfb_save_pdc_emi(struct sis_video_info *ivideo)
2978 #ifdef CONFIG_FB_SIS_300
2979 /* Save the current PanelDelayCompensation if the LCD is currently used */
2980 if(ivideo->sisvga_engine == SIS_300_VGA) {
2981 if(ivideo->vbflags2 & (VB2_LVDS | VB2_30xBDH)) {
2983 inSISIDXREG(SISCR,0x30,tmp);
2985 /* Currently on LCD? If yes, read current pdc */
2986 inSISIDXREG(SISPART1,0x13,ivideo->detectedpdc);
2987 ivideo->detectedpdc &= 0x3c;
2988 if(ivideo->SiS_Pr.PDC == -1) {
2989 /* Let option override detection */
2990 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
2992 printk(KERN_INFO "sisfb: Detected LCD PDC 0x%02x\n",
2993 ivideo->detectedpdc);
2995 if((ivideo->SiS_Pr.PDC != -1) &&
2996 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
2997 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x\n",
2998 ivideo->SiS_Pr.PDC);
3004 #ifdef CONFIG_FB_SIS_315
3005 if(ivideo->sisvga_engine == SIS_315_VGA) {
3007 /* Try to find about LCDA */
3008 if(ivideo->vbflags2 & VB2_SISLCDABRIDGE) {
3010 inSISIDXREG(SISPART1,0x13,tmp);
3012 ivideo->SiS_Pr.SiS_UseLCDA = true;
3013 ivideo->detectedlcda = 0x03;
3018 if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) {
3020 inSISIDXREG(SISCR,0x30,tmp);
3021 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
3022 /* Currently on LCD? If yes, read current pdc */
3024 inSISIDXREG(SISPART1,0x2D,pdc);
3025 ivideo->detectedpdc = (pdc & 0x0f) << 1;
3026 ivideo->detectedpdca = (pdc & 0xf0) >> 3;
3027 inSISIDXREG(SISPART1,0x35,pdc);
3028 ivideo->detectedpdc |= ((pdc >> 7) & 0x01);
3029 inSISIDXREG(SISPART1,0x20,pdc);
3030 ivideo->detectedpdca |= ((pdc >> 6) & 0x01);
3031 if(ivideo->newrom) {
3032 /* New ROM invalidates other PDC resp. */
3033 if(ivideo->detectedlcda != 0xff) {
3034 ivideo->detectedpdc = 0xff;
3036 ivideo->detectedpdca = 0xff;
3039 if(ivideo->SiS_Pr.PDC == -1) {
3040 if(ivideo->detectedpdc != 0xff) {
3041 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
3044 if(ivideo->SiS_Pr.PDCA == -1) {
3045 if(ivideo->detectedpdca != 0xff) {
3046 ivideo->SiS_Pr.PDCA = ivideo->detectedpdca;
3049 if(ivideo->detectedpdc != 0xff) {
3051 "sisfb: Detected LCD PDC 0x%02x (for LCD=CRT2)\n",
3052 ivideo->detectedpdc);
3054 if(ivideo->detectedpdca != 0xff) {
3056 "sisfb: Detected LCD PDC1 0x%02x (for LCD=CRT1)\n",
3057 ivideo->detectedpdca);
3062 if(ivideo->vbflags2 & VB2_SISEMIBRIDGE) {
3063 inSISIDXREG(SISPART4,0x30,ivideo->SiS_Pr.EMI_30);
3064 inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31);
3065 inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32);
3066 inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33);
3067 ivideo->SiS_Pr.HaveEMI = true;
3068 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
3069 ivideo->SiS_Pr.HaveEMILCD = true;
3074 /* Let user override detected PDCs (all bridges) */
3075 if(ivideo->vbflags2 & VB2_30xBLV) {
3076 if((ivideo->SiS_Pr.PDC != -1) &&
3077 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
3078 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x (for LCD=CRT2)\n",
3079 ivideo->SiS_Pr.PDC);
3081 if((ivideo->SiS_Pr.PDCA != -1) &&
3082 (ivideo->SiS_Pr.PDCA != ivideo->detectedpdca)) {
3083 printk(KERN_INFO "sisfb: Using LCD PDC1 0x%02x (for LCD=CRT1)\n",
3084 ivideo->SiS_Pr.PDCA);
3092 /* -------------------- Memory manager routines ---------------------- */
3094 static u32 __devinit
3095 sisfb_getheapstart(struct sis_video_info *ivideo)
3097 u32 ret = ivideo->sisfb_parm_mem * 1024;
3098 u32 maxoffs = ivideo->video_size - ivideo->hwcursor_size - ivideo->cmdQueueSize;
3101 /* Calculate heap start = end of memory for console
3103 * CCCCCCCCDDDDDDDDDDDDDDDDDDDDDDDDDDDDHHHHQQQQQQQQQQ
3104 * C = console, D = heap, H = HWCursor, Q = cmd-queue
3106 * On 76x in UMA+LFB mode, the layout is as follows:
3107 * DDDDDDDDDDDCCCCCCCCCCCCCCCCCCCCCCCCHHHHQQQQQQQQQQQ
3108 * where the heap is the entire UMA area, eventually
3109 * into the LFB area if the given mem parameter is
3110 * higher than the size of the UMA memory.
3112 * Basically given by "mem" parameter
3114 * maximum = videosize - cmd_queue - hwcursor
3115 * (results in a heap of size 0)
3116 * default = SiS 300: depends on videosize
3117 * SiS 315/330/340/XGI: 32k below max
3120 if(ivideo->sisvga_engine == SIS_300_VGA) {
3121 if(ivideo->video_size > 0x1000000) {
3123 } else if(ivideo->video_size > 0x800000) {
3128 } else if(ivideo->UMAsize && ivideo->LFBsize) {
3131 def = maxoffs - 0x8000;
3134 /* Use default for secondary card for now (FIXME) */
3135 if((!ret) || (ret > maxoffs) || (ivideo->cardnumber != 0))
3141 static u32 __devinit
3142 sisfb_getheapsize(struct sis_video_info *ivideo)
3144 u32 max = ivideo->video_size - ivideo->hwcursor_size - ivideo->cmdQueueSize;
3147 if(ivideo->UMAsize && ivideo->LFBsize) {
3148 if( (!ivideo->sisfb_parm_mem) ||
3149 ((ivideo->sisfb_parm_mem * 1024) > max) ||
3150 ((max - (ivideo->sisfb_parm_mem * 1024)) < ivideo->UMAsize) ) {
3151 ret = ivideo->UMAsize;
3152 max -= ivideo->UMAsize;
3154 ret = max - (ivideo->sisfb_parm_mem * 1024);
3155 max = ivideo->sisfb_parm_mem * 1024;
3157 ivideo->video_offset = ret;
3158 ivideo->sisfb_mem = max;
3160 ret = max - ivideo->heapstart;
3161 ivideo->sisfb_mem = ivideo->heapstart;
3167 static int __devinit
3168 sisfb_heap_init(struct sis_video_info *ivideo)
3172 ivideo->video_offset = 0;
3173 if(ivideo->sisfb_parm_mem) {
3174 if( (ivideo->sisfb_parm_mem < (2 * 1024 * 1024)) ||
3175 (ivideo->sisfb_parm_mem > ivideo->video_size) ) {
3176 ivideo->sisfb_parm_mem = 0;
3180 ivideo->heapstart = sisfb_getheapstart(ivideo);
3181 ivideo->sisfb_heap_size = sisfb_getheapsize(ivideo);
3183 ivideo->sisfb_heap_start = ivideo->video_vbase + ivideo->heapstart;
3184 ivideo->sisfb_heap_end = ivideo->sisfb_heap_start + ivideo->sisfb_heap_size;
3186 printk(KERN_INFO "sisfb: Memory heap starting at %dK, size %dK\n",
3187 (int)(ivideo->heapstart / 1024), (int)(ivideo->sisfb_heap_size / 1024));
3189 ivideo->sisfb_heap.vinfo = ivideo;
3191 ivideo->sisfb_heap.poha_chain = NULL;
3192 ivideo->sisfb_heap.poh_freelist = NULL;
3194 poh = sisfb_poh_new_node(&ivideo->sisfb_heap);
3198 poh->poh_next = &ivideo->sisfb_heap.oh_free;
3199 poh->poh_prev = &ivideo->sisfb_heap.oh_free;
3200 poh->size = ivideo->sisfb_heap_size;
3201 poh->offset = ivideo->heapstart;
3203 ivideo->sisfb_heap.oh_free.poh_next = poh;
3204 ivideo->sisfb_heap.oh_free.poh_prev = poh;
3205 ivideo->sisfb_heap.oh_free.size = 0;
3206 ivideo->sisfb_heap.max_freesize = poh->size;
3208 ivideo->sisfb_heap.oh_used.poh_next = &ivideo->sisfb_heap.oh_used;
3209 ivideo->sisfb_heap.oh_used.poh_prev = &ivideo->sisfb_heap.oh_used;
3210 ivideo->sisfb_heap.oh_used.size = SENTINEL;
3212 if(ivideo->cardnumber == 0) {
3213 /* For the first card, make this heap the "global" one
3214 * for old DRM (which could handle only one card)
3216 sisfb_heap = &ivideo->sisfb_heap;
3222 static struct SIS_OH *
3223 sisfb_poh_new_node(struct SIS_HEAP *memheap)
3225 struct SIS_OHALLOC *poha;
3230 if(memheap->poh_freelist == NULL) {
3231 poha = kmalloc(SIS_OH_ALLOC_SIZE, GFP_KERNEL);
3235 poha->poha_next = memheap->poha_chain;
3236 memheap->poha_chain = poha;
3238 cOhs = (SIS_OH_ALLOC_SIZE - sizeof(struct SIS_OHALLOC)) / sizeof(struct SIS_OH) + 1;
3240 poh = &poha->aoh[0];
3241 for(i = cOhs - 1; i != 0; i--) {
3242 poh->poh_next = poh + 1;
3246 poh->poh_next = NULL;
3247 memheap->poh_freelist = &poha->aoh[0];
3250 poh = memheap->poh_freelist;
3251 memheap->poh_freelist = poh->poh_next;
3256 static struct SIS_OH *
3257 sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size)
3259 struct SIS_OH *pohThis;
3260 struct SIS_OH *pohRoot;
3263 if(size > memheap->max_freesize) {
3264 DPRINTK("sisfb: Can't allocate %dk video memory\n",
3265 (unsigned int) size / 1024);
3269 pohThis = memheap->oh_free.poh_next;
3271 while(pohThis != &memheap->oh_free) {
3272 if(size <= pohThis->size) {
3276 pohThis = pohThis->poh_next;
3280 DPRINTK("sisfb: Can't allocate %dk video memory\n",
3281 (unsigned int) size / 1024);
3285 if(size == pohThis->size) {
3287 sisfb_delete_node(pohThis);
3289 pohRoot = sisfb_poh_new_node(memheap);
3293 pohRoot->offset = pohThis->offset;
3294 pohRoot->size = size;
3296 pohThis->offset += size;
3297 pohThis->size -= size;
3300 memheap->max_freesize -= size;
3302 pohThis = &memheap->oh_used;
3303 sisfb_insert_node(pohThis, pohRoot);
3309 sisfb_delete_node(struct SIS_OH *poh)
3311 poh->poh_prev->poh_next = poh->poh_next;
3312 poh->poh_next->poh_prev = poh->poh_prev;
3316 sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh)
3318 struct SIS_OH *pohTemp = pohList->poh_next;
3320 pohList->poh_next = poh;
3321 pohTemp->poh_prev = poh;
3323 poh->poh_prev = pohList;
3324 poh->poh_next = pohTemp;
3327 static struct SIS_OH *
3328 sisfb_poh_free(struct SIS_HEAP *memheap, u32 base)
3330 struct SIS_OH *pohThis;
3331 struct SIS_OH *poh_freed;
3332 struct SIS_OH *poh_prev;
3333 struct SIS_OH *poh_next;
3338 poh_freed = memheap->oh_used.poh_next;
3340 while(poh_freed != &memheap->oh_used) {
3341 if(poh_freed->offset == base) {
3346 poh_freed = poh_freed->poh_next;
3352 memheap->max_freesize += poh_freed->size;
3354 poh_prev = poh_next = NULL;
3355 ulUpper = poh_freed->offset + poh_freed->size;
3356 ulLower = poh_freed->offset;
3358 pohThis = memheap->oh_free.poh_next;
3360 while(pohThis != &memheap->oh_free) {
3361 if(pohThis->offset == ulUpper) {
3363 } else if((pohThis->offset + pohThis->size) == ulLower) {
3366 pohThis = pohThis->poh_next;
3369 sisfb_delete_node(poh_freed);
3371 if(poh_prev && poh_next) {
3372 poh_prev->size += (poh_freed->size + poh_next->size);
3373 sisfb_delete_node(poh_next);
3374 sisfb_free_node(memheap, poh_freed);
3375 sisfb_free_node(memheap, poh_next);
3380 poh_prev->size += poh_freed->size;
3381 sisfb_free_node(memheap, poh_freed);
3386 poh_next->size += poh_freed->size;
3387 poh_next->offset = poh_freed->offset;
3388 sisfb_free_node(memheap, poh_freed);
3392 sisfb_insert_node(&memheap->oh_free, poh_freed);
3398 sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh)
3403 poh->poh_next = memheap->poh_freelist;
3404 memheap->poh_freelist = poh;
3408 sis_int_malloc(struct sis_video_info *ivideo, struct sis_memreq *req)
3410 struct SIS_OH *poh = NULL;
3412 if((ivideo) && (ivideo->sisfb_id == SISFB_ID) && (!ivideo->havenoheap))
3413 poh = sisfb_poh_allocate(&ivideo->sisfb_heap, (u32)req->size);
3416 req->offset = req->size = 0;
3417 DPRINTK("sisfb: Video RAM allocation failed\n");
3419 req->offset = poh->offset;
3420 req->size = poh->size;
3421 DPRINTK("sisfb: Video RAM allocation succeeded: 0x%lx\n",
3422 (poh->offset + ivideo->video_vbase));
3427 sis_malloc(struct sis_memreq *req)
3429 struct sis_video_info *ivideo = sisfb_heap->vinfo;
3431 if(&ivideo->sisfb_heap == sisfb_heap)
3432 sis_int_malloc(ivideo, req);
3434 req->offset = req->size = 0;
3438 sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req)
3440 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
3442 sis_int_malloc(ivideo, req);
3445 /* sis_free: u32 because "base" is offset inside video ram, can never be >4GB */
3448 sis_int_free(struct sis_video_info *ivideo, u32 base)
3452 if((!ivideo) || (ivideo->sisfb_id != SISFB_ID) || (ivideo->havenoheap))
3455 poh = sisfb_poh_free(&ivideo->sisfb_heap, base);
3458 DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n",
3459 (unsigned int) base);
3466 struct sis_video_info *ivideo = sisfb_heap->vinfo;
3468 sis_int_free(ivideo, base);
3472 sis_free_new(struct pci_dev *pdev, u32 base)
3474 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
3476 sis_int_free(ivideo, base);
3479 /* --------------------- SetMode routines ------------------------- */
3482 sisfb_check_engine_and_sync(struct sis_video_info *ivideo)
3486 /* Check if MMIO and engines are enabled,
3487 * and sync in case they are. Can't use
3488 * ivideo->accel here, as this might have
3489 * been changed before this is called.
3491 inSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, cr30);
3492 inSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, cr31);
3493 /* MMIO and 2D/3D engine enabled? */
3494 if((cr30 & SIS_MEM_MAP_IO_ENABLE) && (cr31 & 0x42)) {
3495 #ifdef CONFIG_FB_SIS_300
3496 if(ivideo->sisvga_engine == SIS_300_VGA) {
3497 /* Don't care about TurboQueue. It's
3498 * enough to know that the engines
3501 sisfb_syncaccel(ivideo);
3504 #ifdef CONFIG_FB_SIS_315
3505 if(ivideo->sisvga_engine == SIS_315_VGA) {
3506 /* Check that any queue mode is
3507 * enabled, and that the queue
3508 * is not in the state of "reset"
3510 inSISIDXREG(SISSR, 0x26, cr30);
3511 if((cr30 & 0xe0) && (!(cr30 & 0x01))) {
3512 sisfb_syncaccel(ivideo);
3520 sisfb_pre_setmode(struct sis_video_info *ivideo)
3522 u8 cr30 = 0, cr31 = 0, cr33 = 0, cr35 = 0, cr38 = 0;
3525 ivideo->currentvbflags &= (VB_VIDEOBRIDGE | VB_DISPTYPE_DISP2);
3527 outSISIDXREG(SISSR, 0x05, 0x86);
3529 inSISIDXREG(SISCR, 0x31, cr31);
3533 cr33 = ivideo->rate_idx & 0x0F;
3535 #ifdef CONFIG_FB_SIS_315
3536 if(ivideo->sisvga_engine == SIS_315_VGA) {
3537 if(ivideo->chip >= SIS_661) {
3538 inSISIDXREG(SISCR, 0x38, cr38);
3539 cr38 &= ~0x07; /* Clear LCDA/DualEdge and YPbPr bits */
3542 inSISIDXREG(SISCR, tvregnum, cr38);
3543 cr38 &= ~0x3b; /* Clear LCDA/DualEdge and YPbPr bits */
3547 #ifdef CONFIG_FB_SIS_300
3548 if(ivideo->sisvga_engine == SIS_300_VGA) {
3550 inSISIDXREG(SISCR, tvregnum, cr38);
3554 SiS_SetEnableDstn(&ivideo->SiS_Pr, false);
3555 SiS_SetEnableFstn(&ivideo->SiS_Pr, false);
3556 ivideo->curFSTN = ivideo->curDSTN = 0;
3558 switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
3561 cr38 &= ~0xc0; /* Clear PAL-M / PAL-N bits */
3562 if((ivideo->vbflags & TV_YPBPR) && (ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) {
3563 #ifdef CONFIG_FB_SIS_315
3564 if(ivideo->chip >= SIS_661) {
3566 if(ivideo->vbflags & TV_YPBPR525P) cr35 |= 0x20;
3567 else if(ivideo->vbflags & TV_YPBPR750P) cr35 |= 0x40;
3568 else if(ivideo->vbflags & TV_YPBPR1080I) cr35 |= 0x60;
3569 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE;
3571 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL));
3572 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
3573 cr30 |= (0x80 | SIS_SIMULTANEOUS_VIEW_ENABLE);
3575 if(ivideo->vbflags & TV_YPBPR525P) cr38 |= 0x10;
3576 else if(ivideo->vbflags & TV_YPBPR750P) cr38 |= 0x20;
3577 else if(ivideo->vbflags & TV_YPBPR1080I) cr38 |= 0x30;
3579 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL));
3582 } else if((ivideo->vbflags & TV_HIVISION) &&
3583 (ivideo->vbflags2 & VB2_SISHIVISIONBRIDGE)) {
3584 if(ivideo->chip >= SIS_661) {
3590 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE;
3593 ivideo->currentvbflags |= TV_HIVISION;
3594 } else if(ivideo->vbflags & TV_SCART) {
3595 cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE);
3598 ivideo->currentvbflags |= TV_SCART;
3600 if(ivideo->vbflags & TV_SVIDEO) {
3601 cr30 = (SIS_VB_OUTPUT_SVIDEO | SIS_SIMULTANEOUS_VIEW_ENABLE);
3602 ivideo->currentvbflags |= TV_SVIDEO;
3604 if(ivideo->vbflags & TV_AVIDEO) {
3605 cr30 = (SIS_VB_OUTPUT_COMPOSITE | SIS_SIMULTANEOUS_VIEW_ENABLE);
3606 ivideo->currentvbflags |= TV_AVIDEO;
3609 cr31 |= SIS_DRIVER_MODE;
3611 if(ivideo->vbflags & (TV_AVIDEO | TV_SVIDEO)) {
3612 if(ivideo->vbflags & TV_PAL) {
3613 cr31 |= 0x01; cr35 |= 0x01;
3614 ivideo->currentvbflags |= TV_PAL;
3615 if(ivideo->vbflags & TV_PALM) {
3616 cr38 |= 0x40; cr35 |= 0x04;
3617 ivideo->currentvbflags |= TV_PALM;
3618 } else if(ivideo->vbflags & TV_PALN) {
3619 cr38 |= 0x80; cr35 |= 0x08;
3620 ivideo->currentvbflags |= TV_PALN;
3623 cr31 &= ~0x01; cr35 &= ~0x01;
3624 ivideo->currentvbflags |= TV_NTSC;
3625 if(ivideo->vbflags & TV_NTSCJ) {
3626 cr38 |= 0x40; cr35 |= 0x02;
3627 ivideo->currentvbflags |= TV_NTSCJ;
3634 cr30 = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
3635 cr31 |= SIS_DRIVER_MODE;
3636 SiS_SetEnableDstn(&ivideo->SiS_Pr, ivideo->sisfb_dstn);
3637 SiS_SetEnableFstn(&ivideo->SiS_Pr, ivideo->sisfb_fstn);
3638 ivideo->curFSTN = ivideo->sisfb_fstn;
3639 ivideo->curDSTN = ivideo->sisfb_dstn;
3643 cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
3644 cr31 |= SIS_DRIVER_MODE;
3645 if(ivideo->sisfb_nocrt2rate) {
3646 cr33 |= (sisbios_mode[ivideo->sisfb_mode_idx].rate_idx << 4);
3648 cr33 |= ((ivideo->rate_idx & 0x0F) << 4);
3652 default: /* disable CRT2 */
3654 cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
3657 outSISIDXREG(SISCR, 0x30, cr30);
3658 outSISIDXREG(SISCR, 0x33, cr33);
3660 if(ivideo->chip >= SIS_661) {
3661 #ifdef CONFIG_FB_SIS_315
3662 cr31 &= ~0x01; /* Clear PAL flag (now in CR35) */
3663 setSISIDXREG(SISCR, 0x35, ~0x10, cr35); /* Leave overscan bit alone */
3664 cr38 &= 0x07; /* Use only LCDA and HiVision/YPbPr bits */
3665 setSISIDXREG(SISCR, 0x38, 0xf8, cr38);
3667 } else if(ivideo->chip != SIS_300) {
3668 outSISIDXREG(SISCR, tvregnum, cr38);
3670 outSISIDXREG(SISCR, 0x31, cr31);
3672 ivideo->SiS_Pr.SiS_UseOEM = ivideo->sisfb_useoem;
3674 sisfb_check_engine_and_sync(ivideo);
3677 /* Fix SR11 for 661 and later */
3678 #ifdef CONFIG_FB_SIS_315
3680 sisfb_fixup_SR11(struct sis_video_info *ivideo)
3684 if(ivideo->chip >= SIS_661) {
3685 inSISIDXREG(SISSR,0x11,tmpreg);
3687 inSISIDXREG(SISSR,0x3e,tmpreg);
3688 tmpreg = (tmpreg + 1) & 0xff;
3689 outSISIDXREG(SISSR,0x3e,tmpreg);
3690 inSISIDXREG(SISSR,0x11,tmpreg);
3693 andSISIDXREG(SISSR,0x11,0x0f);
3700 sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val)
3702 if(val > 32) val = 32;
3703 if(val < -32) val = -32;
3704 ivideo->tvxpos = val;
3706 if(ivideo->sisfblocked) return;
3707 if(!ivideo->modechanged) return;
3709 if(ivideo->currentvbflags & CRT2_TV) {
3711 if(ivideo->vbflags2 & VB2_CHRONTEL) {
3713 int x = ivideo->tvx;
3715 switch(ivideo->chronteltype) {
3719 outSISIDXREG(SISSR,0x05,0x86);
3720 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0a, (x & 0xff));
3721 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x08, ((x & 0x0100) >> 7), 0xFD);
3724 /* Not supported by hardware */
3728 } else if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3730 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43;
3731 unsigned short temp;
3733 p2_1f = ivideo->p2_1f;
3734 p2_20 = ivideo->p2_20;
3735 p2_2b = ivideo->p2_2b;
3736 p2_42 = ivideo->p2_42;
3737 p2_43 = ivideo->p2_43;
3739 temp = p2_1f | ((p2_20 & 0xf0) << 4);
3741 p2_1f = temp & 0xff;
3742 p2_20 = (temp & 0xf00) >> 4;
3743 p2_2b = ((p2_2b & 0x0f) + (val * 2)) & 0x0f;
3744 temp = p2_43 | ((p2_42 & 0xf0) << 4);
3746 p2_43 = temp & 0xff;
3747 p2_42 = (temp & 0xf00) >> 4;
3748 outSISIDXREG(SISPART2,0x1f,p2_1f);
3749 setSISIDXREG(SISPART2,0x20,0x0F,p2_20);
3750 setSISIDXREG(SISPART2,0x2b,0xF0,p2_2b);
3751 setSISIDXREG(SISPART2,0x42,0x0F,p2_42);
3752 outSISIDXREG(SISPART2,0x43,p2_43);
3758 sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val)
3760 if(val > 32) val = 32;
3761 if(val < -32) val = -32;
3762 ivideo->tvypos = val;
3764 if(ivideo->sisfblocked) return;
3765 if(!ivideo->modechanged) return;
3767 if(ivideo->currentvbflags & CRT2_TV) {
3769 if(ivideo->vbflags2 & VB2_CHRONTEL) {
3771 int y = ivideo->tvy;
3773 switch(ivideo->chronteltype) {
3777 outSISIDXREG(SISSR,0x05,0x86);
3778 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0b, (y & 0xff));
3779 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x08, ((y & 0x0100) >> 8), 0xFE);
3782 /* Not supported by hardware */
3786 } else if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3790 p2_01 = ivideo->p2_01;
3791 p2_02 = ivideo->p2_02;
3795 if(!(ivideo->currentvbflags & (TV_HIVISION | TV_YPBPR))) {
3796 while((p2_01 <= 0) || (p2_02 <= 0)) {
3801 outSISIDXREG(SISPART2,0x01,p2_01);
3802 outSISIDXREG(SISPART2,0x02,p2_02);
3808 sisfb_post_setmode(struct sis_video_info *ivideo)
3810 bool crt1isoff = false;
3812 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
3815 #ifdef CONFIG_FB_SIS_315
3819 outSISIDXREG(SISSR, 0x05, 0x86);
3821 #ifdef CONFIG_FB_SIS_315
3822 sisfb_fixup_SR11(ivideo);
3825 /* Now we actually HAVE changed the display mode */
3826 ivideo->modechanged = 1;
3828 /* We can't switch off CRT1 if bridge is in slave mode */
3829 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
3830 if(sisfb_bridgeisslave(ivideo)) doit = false;
3832 ivideo->sisfb_crt1off = 0;
3834 #ifdef CONFIG_FB_SIS_300
3835 if(ivideo->sisvga_engine == SIS_300_VGA) {
3836 if((ivideo->sisfb_crt1off) && (doit)) {
3843 setSISIDXREG(SISCR, 0x17, 0x7f, reg);
3846 #ifdef CONFIG_FB_SIS_315
3847 if(ivideo->sisvga_engine == SIS_315_VGA) {
3848 if((ivideo->sisfb_crt1off) && (doit)) {
3857 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, ~0x40, reg);
3858 setSISIDXREG(SISSR, 0x1f, ~0xc0, reg1);
3863 ivideo->currentvbflags &= ~VB_DISPTYPE_CRT1;
3864 ivideo->currentvbflags |= VB_SINGLE_MODE;
3866 ivideo->currentvbflags |= VB_DISPTYPE_CRT1;
3867 if(ivideo->currentvbflags & VB_DISPTYPE_CRT2) {
3868 ivideo->currentvbflags |= VB_MIRROR_MODE;
3870 ivideo->currentvbflags |= VB_SINGLE_MODE;
3874 andSISIDXREG(SISSR, IND_SIS_RAMDAC_CONTROL, ~0x04);
3876 if(ivideo->currentvbflags & CRT2_TV) {
3877 if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3878 inSISIDXREG(SISPART2,0x1f,ivideo->p2_1f);
3879 inSISIDXREG(SISPART2,0x20,ivideo->p2_20);
3880 inSISIDXREG(SISPART2,0x2b,ivideo->p2_2b);
3881 inSISIDXREG(SISPART2,0x42,ivideo->p2_42);
3882 inSISIDXREG(SISPART2,0x43,ivideo->p2_43);
3883 inSISIDXREG(SISPART2,0x01,ivideo->p2_01);
3884 inSISIDXREG(SISPART2,0x02,ivideo->p2_02);
3885 } else if(ivideo->vbflags2 & VB2_CHRONTEL) {
3886 if(ivideo->chronteltype == 1) {
3887 ivideo->tvx = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0a);
3888 ivideo->tvx |= (((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x02) >> 1) << 8);
3889 ivideo->tvy = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0b);
3890 ivideo->tvy |= ((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x01) << 8);
3895 if(ivideo->tvxpos) {
3896 sisfb_set_TVxposoffset(ivideo, ivideo->tvxpos);
3898 if(ivideo->tvypos) {
3899 sisfb_set_TVyposoffset(ivideo, ivideo->tvypos);
3902 /* Eventually sync engines */
3903 sisfb_check_engine_and_sync(ivideo);
3905 /* (Re-)Initialize chip engines */
3907 sisfb_engine_init(ivideo);
3909 ivideo->engineok = 0;
3914 sisfb_reset_mode(struct sis_video_info *ivideo)
3916 if(sisfb_set_mode(ivideo, 0))
3919 sisfb_set_pitch(ivideo);
3920 sisfb_set_base_CRT1(ivideo, ivideo->current_base);
3921 sisfb_set_base_CRT2(ivideo, ivideo->current_base);
3927 sisfb_handle_command(struct sis_video_info *ivideo, struct sisfb_cmd *sisfb_command)
3931 switch(sisfb_command->sisfb_cmd) {
3932 case SISFB_CMD_GETVBFLAGS:
3933 if(!ivideo->modechanged) {
3934 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_EARLY;
3936 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3937 sisfb_command->sisfb_result[1] = ivideo->currentvbflags;
3938 sisfb_command->sisfb_result[2] = ivideo->vbflags2;
3941 case SISFB_CMD_SWITCHCRT1:
3942 /* arg[0]: 0 = off, 1 = on, 99 = query */
3943 if(!ivideo->modechanged) {
3944 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_EARLY;
3945 } else if(sisfb_command->sisfb_arg[0] == 99) {
3947 sisfb_command->sisfb_result[1] = ivideo->sisfb_crt1off ? 0 : 1;
3948 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3949 } else if(ivideo->sisfblocked) {
3950 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_LOCKED;
3951 } else if((!(ivideo->currentvbflags & CRT2_ENABLE)) &&
3952 (sisfb_command->sisfb_arg[0] == 0)) {
3953 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_NOCRT2;
3955 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3956 mycrt1off = sisfb_command->sisfb_arg[0] ? 0 : 1;
3957 if( ((ivideo->currentvbflags & VB_DISPTYPE_CRT1) && mycrt1off) ||
3958 ((!(ivideo->currentvbflags & VB_DISPTYPE_CRT1)) && !mycrt1off) ) {
3959 ivideo->sisfb_crt1off = mycrt1off;
3960 if(sisfb_reset_mode(ivideo)) {
3961 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OTHER;
3964 sisfb_command->sisfb_result[1] = ivideo->sisfb_crt1off ? 0 : 1;
3969 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_UNKNOWN;
3970 printk(KERN_ERR "sisfb: Unknown command 0x%x\n",
3971 sisfb_command->sisfb_cmd);
3976 static int __init sisfb_setup(char *options)
3980 sisfb_setdefaultparms();
3982 if(!options || !(*options))
3985 while((this_opt = strsep(&options, ",")) != NULL) {
3987 if(!(*this_opt)) continue;
3989 if(!strnicmp(this_opt, "off", 3)) {
3991 } else if(!strnicmp(this_opt, "forcecrt2type:", 14)) {
3992 /* Need to check crt2 type first for fstn/dstn */
3993 sisfb_search_crt2type(this_opt + 14);
3994 } else if(!strnicmp(this_opt, "tvmode:",7)) {
3995 sisfb_search_tvstd(this_opt + 7);
3996 } else if(!strnicmp(this_opt, "tvstandard:",11)) {
3997 sisfb_search_tvstd(this_opt + 11);
3998 } else if(!strnicmp(this_opt, "mode:", 5)) {
3999 sisfb_search_mode(this_opt + 5, false);
4000 } else if(!strnicmp(this_opt, "vesa:", 5)) {
4001 sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0), false);
4002 } else if(!strnicmp(this_opt, "rate:", 5)) {
4003 sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0);
4004 } else if(!strnicmp(this_opt, "forcecrt1:", 10)) {
4005 sisfb_forcecrt1 = (int)simple_strtoul(this_opt + 10, NULL, 0);
4006 } else if(!strnicmp(this_opt, "mem:",4)) {
4007 sisfb_parm_mem = simple_strtoul(this_opt + 4, NULL, 0);
4008 } else if(!strnicmp(this_opt, "pdc:", 4)) {
4009 sisfb_pdc = simple_strtoul(this_opt + 4, NULL, 0);
4010 } else if(!strnicmp(this_opt, "pdc1:", 5)) {
4011 sisfb_pdca = simple_strtoul(this_opt + 5, NULL, 0);
4012 } else if(!strnicmp(this_opt, "noaccel", 7)) {
4014 } else if(!strnicmp(this_opt, "accel", 5)) {
4016 } else if(!strnicmp(this_opt, "noypan", 6)) {
4018 } else if(!strnicmp(this_opt, "ypan", 4)) {
4020 } else if(!strnicmp(this_opt, "nomax", 5)) {
4022 } else if(!strnicmp(this_opt, "max", 3)) {
4024 } else if(!strnicmp(this_opt, "userom:", 7)) {
4025 sisfb_userom = (int)simple_strtoul(this_opt + 7, NULL, 0);
4026 } else if(!strnicmp(this_opt, "useoem:", 7)) {
4027 sisfb_useoem = (int)simple_strtoul(this_opt + 7, NULL, 0);
4028 } else if(!strnicmp(this_opt, "nocrt2rate", 10)) {
4029 sisfb_nocrt2rate = 1;
4030 } else if(!strnicmp(this_opt, "scalelcd:", 9)) {
4031 unsigned long temp = 2;
4032 temp = simple_strtoul(this_opt + 9, NULL, 0);
4033 if((temp == 0) || (temp == 1)) {
4034 sisfb_scalelcd = temp ^ 1;
4036 } else if(!strnicmp(this_opt, "tvxposoffset:", 13)) {
4038 temp = (int)simple_strtol(this_opt + 13, NULL, 0);
4039 if((temp >= -32) && (temp <= 32)) {
4040 sisfb_tvxposoffset = temp;
4042 } else if(!strnicmp(this_opt, "tvyposoffset:", 13)) {
4044 temp = (int)simple_strtol(this_opt + 13, NULL, 0);
4045 if((temp >= -32) && (temp <= 32)) {
4046 sisfb_tvyposoffset = temp;
4048 } else if(!strnicmp(this_opt, "specialtiming:", 14)) {
4049 sisfb_search_specialtiming(this_opt + 14);
4050 } else if(!strnicmp(this_opt, "lvdshl:", 7)) {
4052 temp = simple_strtoul(this_opt + 7, NULL, 0);
4053 if((temp >= 0) && (temp <= 3)) {
4054 sisfb_lvdshl = temp;
4056 } else if(this_opt[0] >= '0' && this_opt[0] <= '9') {
4057 sisfb_search_mode(this_opt, true);
4058 #if !defined(__i386__) && !defined(__x86_64__)
4059 } else if(!strnicmp(this_opt, "resetcard", 9)) {
4060 sisfb_resetcard = 1;
4061 } else if(!strnicmp(this_opt, "videoram:", 9)) {
4062 sisfb_videoram = simple_strtoul(this_opt + 9, NULL, 0);
4065 printk(KERN_INFO "sisfb: Invalid option %s\n", this_opt);
4074 static int __devinit
4075 sisfb_check_rom(void __iomem *rom_base, struct sis_video_info *ivideo)
4080 if((readb(rom_base) != 0x55) || (readb(rom_base + 1) != 0xaa))
4083 romptr = (readb(rom_base + 0x18) | (readb(rom_base + 0x19) << 8));
4084 if(romptr > (0x10000 - 8))
4087 rom = rom_base + romptr;
4089 if((readb(rom) != 'P') || (readb(rom + 1) != 'C') ||
4090 (readb(rom + 2) != 'I') || (readb(rom + 3) != 'R'))
4093 if((readb(rom + 4) | (readb(rom + 5) << 8)) != ivideo->chip_vendor)
4096 if((readb(rom + 6) | (readb(rom + 7) << 8)) != ivideo->chip_id)
4102 static unsigned char * __devinit
4103 sisfb_find_rom(struct pci_dev *pdev)
4105 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4106 void __iomem *rom_base;
4107 unsigned char *myrombase = NULL;
4111 /* First, try the official pci ROM functions (except
4112 * on integrated chipsets which have no ROM).
4115 if(!ivideo->nbridge) {
4117 if((rom_base = pci_map_rom(pdev, &romsize))) {
4119 if(sisfb_check_rom(rom_base, ivideo)) {
4121 if((myrombase = vmalloc(65536))) {
4122 memcpy_fromio(myrombase, rom_base,
4123 (romsize > 65536) ? 65536 : romsize);
4126 pci_unmap_rom(pdev, rom_base);
4130 if(myrombase) return myrombase;
4132 /* Otherwise do it the conventional way. */
4134 #if defined(__i386__) || defined(__x86_64__)
4136 for(temp = 0x000c0000; temp < 0x000f0000; temp += 0x00001000) {
4138 rom_base = ioremap(temp, 65536);
4142 if(!sisfb_check_rom(rom_base, ivideo)) {
4147 if((myrombase = vmalloc(65536)))
4148 memcpy_fromio(myrombase, rom_base, 65536);
4160 static void __devinit
4161 sisfb_post_map_vram(struct sis_video_info *ivideo, unsigned int *mapsize,
4164 if (*mapsize < (min << 20))
4167 ivideo->video_vbase = ioremap(ivideo->video_base, (*mapsize));
4169 if(!ivideo->video_vbase) {
4171 "sisfb: Unable to map maximum video RAM for size detection\n");
4173 while((!(ivideo->video_vbase = ioremap(ivideo->video_base, (*mapsize))))) {
4175 if((*mapsize) < (min << 20))
4178 if(ivideo->video_vbase) {
4180 "sisfb: Video RAM size detection limited to %dMB\n",
4181 (int)((*mapsize) >> 20));
4186 #ifdef CONFIG_FB_SIS_300
4187 static int __devinit
4188 sisfb_post_300_buswidth(struct sis_video_info *ivideo)
4190 void __iomem *FBAddress = ivideo->video_vbase;
4191 unsigned short temp;
4195 andSISIDXREG(SISSR, 0x15, 0xFB);
4196 orSISIDXREG(SISSR, 0x15, 0x04);
4197 outSISIDXREG(SISSR, 0x13, 0x00);
4198 outSISIDXREG(SISSR, 0x14, 0xBF);
4200 for(i = 0; i < 2; i++) {
4202 for(j = 0; j < 4; j++) {
4203 writew(temp, FBAddress);
4204 if(readw(FBAddress) == temp)
4206 orSISIDXREG(SISSR, 0x3c, 0x01);
4207 inSISIDXREG(SISSR, 0x05, reg);
4208 inSISIDXREG(SISSR, 0x05, reg);
4209 andSISIDXREG(SISSR, 0x3c, 0xfe);
4210 inSISIDXREG(SISSR, 0x05, reg);
4211 inSISIDXREG(SISSR, 0x05, reg);
4216 writel(0x01234567L, FBAddress);
4217 writel(0x456789ABL, (FBAddress + 4));
4218 writel(0x89ABCDEFL, (FBAddress + 8));
4219 writel(0xCDEF0123L, (FBAddress + 12));
4221 inSISIDXREG(SISSR, 0x3b, reg);
4223 if(readl((FBAddress + 12)) == 0xCDEF0123L)
4224 return 4; /* Channel A 128bit */
4227 if(readl((FBAddress + 4)) == 0x456789ABL)
4228 return 2; /* Channel B 64bit */
4230 return 1; /* 32bit */
4233 static int __devinit
4234 sisfb_post_300_rwtest(struct sis_video_info *ivideo, int iteration, int buswidth,
4235 int PseudoRankCapacity, int PseudoAdrPinCount,
4236 unsigned int mapsize)
4238 void __iomem *FBAddr = ivideo->video_vbase;
4239 unsigned short sr14;
4240 unsigned int k, RankCapacity, PageCapacity, BankNumHigh, BankNumMid;
4241 unsigned int PhysicalAdrOtherPage, PhysicalAdrHigh, PhysicalAdrHalfPage;
4242 static const unsigned short SiS_DRAMType[17][5] = {
4243 {0x0C,0x0A,0x02,0x40,0x39},
4244 {0x0D,0x0A,0x01,0x40,0x48},
4245 {0x0C,0x09,0x02,0x20,0x35},
4246 {0x0D,0x09,0x01,0x20,0x44},
4247 {0x0C,0x08,0x02,0x10,0x31},
4248 {0x0D,0x08,0x01,0x10,0x40},
4249 {0x0C,0x0A,0x01,0x20,0x34},
4250 {0x0C,0x09,0x01,0x08,0x32},
4251 {0x0B,0x08,0x02,0x08,0x21},
4252 {0x0C,0x08,0x01,0x08,0x30},
4253 {0x0A,0x08,0x02,0x04,0x11},
4254 {0x0B,0x0A,0x01,0x10,0x28},
4255 {0x09,0x08,0x02,0x02,0x01},
4256 {0x0B,0x09,0x01,0x08,0x24},
4257 {0x0B,0x08,0x01,0x04,0x20},
4258 {0x0A,0x08,0x01,0x02,0x10},
4259 {0x09,0x08,0x01,0x01,0x00}
4262 for(k = 0; k <= 16; k++) {
4264 RankCapacity = buswidth * SiS_DRAMType[k][3];
4266 if(RankCapacity != PseudoRankCapacity)
4269 if((SiS_DRAMType[k][2] + SiS_DRAMType[k][0]) > PseudoAdrPinCount)
4272 BankNumHigh = RankCapacity * 16 * iteration - 1;
4273 if(iteration == 3) { /* Rank No */
4274 BankNumMid = RankCapacity * 16 - 1;
4276 BankNumMid = RankCapacity * 16 * iteration / 2 - 1;
4279 PageCapacity = (1 << SiS_DRAMType[k][1]) * buswidth * 4;
4280 PhysicalAdrHigh = BankNumHigh;
4281 PhysicalAdrHalfPage = (PageCapacity / 2 + PhysicalAdrHigh) % PageCapacity;
4282 PhysicalAdrOtherPage = PageCapacity * SiS_DRAMType[k][2] + PhysicalAdrHigh;
4284 andSISIDXREG(SISSR, 0x15, 0xFB); /* Test */
4285 orSISIDXREG(SISSR, 0x15, 0x04); /* Test */
4286 sr14 = (SiS_DRAMType[k][3] * buswidth) - 1;
4287 if(buswidth == 4) sr14 |= 0x80;
4288 else if(buswidth == 2) sr14 |= 0x40;
4289 outSISIDXREG(SISSR, 0x13, SiS_DRAMType[k][4]);
4290 outSISIDXREG(SISSR, 0x14, sr14);
4295 if((BankNumHigh + PhysicalAdrHigh >= mapsize) ||
4296 (BankNumMid + PhysicalAdrHigh >= mapsize) ||
4297 (BankNumHigh + PhysicalAdrHalfPage >= mapsize) ||
4298 (BankNumHigh + PhysicalAdrOtherPage >= mapsize))
4302 writew(((unsigned short)PhysicalAdrHigh),
4303 (FBAddr + BankNumHigh + PhysicalAdrHigh));
4304 writew(((unsigned short)BankNumMid),
4305 (FBAddr + BankNumMid + PhysicalAdrHigh));
4306 writew(((unsigned short)PhysicalAdrHalfPage),
4307 (FBAddr + BankNumHigh + PhysicalAdrHalfPage));
4308 writew(((unsigned short)PhysicalAdrOtherPage),
4309 (FBAddr + BankNumHigh + PhysicalAdrOtherPage));
4312 if(readw(FBAddr + BankNumHigh + PhysicalAdrHigh) == PhysicalAdrHigh)
4319 static void __devinit
4320 sisfb_post_300_ramsize(struct pci_dev *pdev, unsigned int mapsize)
4322 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4324 int PseudoRankCapacity, PseudoAdrPinCount;
4326 buswidth = sisfb_post_300_buswidth(ivideo);
4328 for(i = 6; i >= 0; i--) {
4329 PseudoRankCapacity = 1 << i;
4330 for(j = 4; j >= 1; j--) {
4331 PseudoAdrPinCount = 15 - j;
4332 if((PseudoRankCapacity * j) <= 64) {
4333 if(sisfb_post_300_rwtest(ivideo,
4345 static void __devinit
4346 sisfb_post_sis300(struct pci_dev *pdev)
4348 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4349 unsigned char *bios = ivideo->SiS_Pr.VirtualRomBase;
4350 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8;
4351 u16 index, rindex, memtype = 0;
4352 unsigned int mapsize;
4354 if(!ivideo->SiS_Pr.UseROM)
4357 outSISIDXREG(SISSR, 0x05, 0x86);
4360 if(bios[0x52] & 0x80) {
4361 memtype = bios[0x52];
4363 inSISIDXREG(SISSR, 0x3a, memtype);
4368 v3 = 0x80; v6 = 0x80;
4369 if(ivideo->revision_id <= 0x13) {
4370 v1 = 0x44; v2 = 0x42;
4371 v4 = 0x44; v5 = 0x42;
4373 v1 = 0x68; v2 = 0x43; /* Assume 125Mhz MCLK */
4374 v4 = 0x68; v5 = 0x43; /* Assume 125Mhz ECLK */
4376 index = memtype * 5;
4377 rindex = index + 0x54;
4378 v1 = bios[rindex++];
4379 v2 = bios[rindex++];
4380 v3 = bios[rindex++];
4381 rindex = index + 0x7c;
4382 v4 = bios[rindex++];
4383 v5 = bios[rindex++];
4384 v6 = bios[rindex++];
4387 outSISIDXREG(SISSR, 0x28, v1);
4388 outSISIDXREG(SISSR, 0x29, v2);
4389 outSISIDXREG(SISSR, 0x2a, v3);
4390 outSISIDXREG(SISSR, 0x2e, v4);
4391 outSISIDXREG(SISSR, 0x2f, v5);
4392 outSISIDXREG(SISSR, 0x30, v6);
4397 outSISIDXREG(SISSR, 0x07, v1); /* DAC speed */
4399 outSISIDXREG(SISSR, 0x11, 0x0f); /* DDC, power save */
4401 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a;
4402 v5 = 0x06; v6 = 0x00; v7 = 0x00; v8 = 0x00;
4406 v2 = bios[memtype + 8];
4407 v3 = bios[memtype + 16];
4408 v4 = bios[memtype + 24];
4409 v5 = bios[memtype + 32];
4410 v6 = bios[memtype + 40];
4411 v7 = bios[memtype + 48];
4412 v8 = bios[memtype + 56];
4414 if(ivideo->revision_id >= 0x80)
4416 outSISIDXREG(SISSR, 0x15, v1); /* Ram type (assuming 0, BIOS 0xa5 step 8) */
4417 outSISIDXREG(SISSR, 0x16, v2);
4418 outSISIDXREG(SISSR, 0x17, v3);
4419 outSISIDXREG(SISSR, 0x18, v4);
4420 outSISIDXREG(SISSR, 0x19, v5);
4421 outSISIDXREG(SISSR, 0x1a, v6);
4422 outSISIDXREG(SISSR, 0x1b, v7);
4423 outSISIDXREG(SISSR, 0x1c, v8); /* ---- */
4424 andSISIDXREG(SISSR, 0x15 ,0xfb);
4425 orSISIDXREG(SISSR, 0x15, 0x04);
4427 if(bios[0x53] & 0x02) {
4428 orSISIDXREG(SISSR, 0x19, 0x20);
4431 v1 = 0x04; /* DAC pedestal (BIOS 0xe5) */
4432 if(ivideo->revision_id >= 0x80)
4434 outSISIDXREG(SISSR, 0x1f, v1);
4435 outSISIDXREG(SISSR, 0x20, 0xa4); /* linear & relocated io & disable a0000 */
4436 v1 = 0xf6; v2 = 0x0d; v3 = 0x00;
4442 outSISIDXREG(SISSR, 0x23, v1);
4443 outSISIDXREG(SISSR, 0x24, v2);
4444 outSISIDXREG(SISSR, 0x25, v3);
4445 outSISIDXREG(SISSR, 0x21, 0x84);
4446 outSISIDXREG(SISSR, 0x22, 0x00);
4447 outSISIDXREG(SISCR, 0x37, 0x00);
4448 orSISIDXREG(SISPART1, 0x24, 0x01); /* unlock crt2 */
4449 outSISIDXREG(SISPART1, 0x00, 0x00);
4450 v1 = 0x40; v2 = 0x11;
4455 outSISIDXREG(SISPART1, 0x02, v1);
4457 if(ivideo->revision_id >= 0x80)
4460 inSISIDXREG(SISPART4, 0x00, reg);
4461 if((reg == 1) || (reg == 2)) {
4462 outSISIDXREG(SISCR, 0x37, 0x02);
4463 outSISIDXREG(SISPART2, 0x00, 0x1c);
4464 v4 = 0x00; v5 = 0x00; v6 = 0x10;
4465 if(ivideo->SiS_Pr.UseROM) {
4470 outSISIDXREG(SISPART4, 0x0d, v4);
4471 outSISIDXREG(SISPART4, 0x0e, v5);
4472 outSISIDXREG(SISPART4, 0x10, v6);
4473 outSISIDXREG(SISPART4, 0x0f, 0x3f);
4474 inSISIDXREG(SISPART4, 0x01, reg);
4476 inSISIDXREG(SISPART4, 0x23, reg);
4479 outSISIDXREG(SISPART4, 0x23, reg);
4484 outSISIDXREG(SISSR, 0x32, v2);
4486 andSISIDXREG(SISPART1, 0x24, 0xfe); /* Lock CRT2 */
4488 inSISIDXREG(SISSR, 0x16, reg);
4490 outSISIDXREG(SISCR, 0x35, reg);
4491 outSISIDXREG(SISCR, 0x83, 0x00);
4492 #if !defined(__i386__) && !defined(__x86_64__)
4493 if(sisfb_videoram) {
4494 outSISIDXREG(SISSR, 0x13, 0x28); /* ? */
4495 reg = ((sisfb_videoram >> 10) - 1) | 0x40;
4496 outSISIDXREG(SISSR, 0x14, reg);
4499 /* Need to map max FB size for finding out about RAM size */
4500 mapsize = ivideo->video_size;
4501 sisfb_post_map_vram(ivideo, &mapsize, 4);
4503 if(ivideo->video_vbase) {
4504 sisfb_post_300_ramsize(pdev, mapsize);
4505 iounmap(ivideo->video_vbase);
4508 "sisfb: Failed to map memory for size detection, assuming 8MB\n");
4509 outSISIDXREG(SISSR, 0x13, 0x28); /* ? */
4510 outSISIDXREG(SISSR, 0x14, 0x47); /* 8MB, 64bit default */
4512 #if !defined(__i386__) && !defined(__x86_64__)
4519 inSISIDXREG(SISSR, 0x3a, reg);
4520 if((reg & 0x30) == 0x30) {
4521 v1 = 0x04; /* PCI */
4524 v1 = 0x14; /* AGP */
4528 outSISIDXREG(SISSR, 0x21, v1);
4529 outSISIDXREG(SISSR, 0x22, v2);
4532 sisfb_sense_crt1(ivideo);
4534 /* Set default mode, don't clear screen */
4535 ivideo->SiS_Pr.SiS_UseOEM = false;
4536 SiS_SetEnableDstn(&ivideo->SiS_Pr, false);
4537 SiS_SetEnableFstn(&ivideo->SiS_Pr, false);
4538 ivideo->curFSTN = ivideo->curDSTN = 0;
4539 ivideo->SiS_Pr.VideoMemorySize = 8 << 20;
4540 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
4542 outSISIDXREG(SISSR, 0x05, 0x86);
4545 orSISIDXREG(SISSR, 0x01, 0x20);
4547 /* Save mode number in CR34 */
4548 outSISIDXREG(SISCR, 0x34, 0x2e);
4550 /* Let everyone know what the current mode is */
4551 ivideo->modeprechange = 0x2e;
4555 #ifdef CONFIG_FB_SIS_315
4557 static void __devinit
4558 sisfb_post_sis315330(struct pci_dev *pdev)
4564 static void __devinit
4565 sisfb_post_xgi_delay(struct sis_video_info *ivideo, int delay)
4570 for(i = 0; i <= (delay * 10 * 36); i++) {
4571 inSISIDXREG(SISSR, 0x05, reg);
4576 static int __devinit
4577 sisfb_find_host_bridge(struct sis_video_info *ivideo, struct pci_dev *mypdev,
4578 unsigned short pcivendor)
4580 struct pci_dev *pdev = NULL;
4581 unsigned short temp;
4584 while((pdev = pci_get_class(PCI_CLASS_BRIDGE_HOST, pdev))) {
4585 temp = pdev->vendor;
4586 if(temp == pcivendor) {
4596 static int __devinit
4597 sisfb_post_xgi_rwtest(struct sis_video_info *ivideo, int starta,
4598 unsigned int enda, unsigned int mapsize)
4603 writel(0, ivideo->video_vbase);
4605 for(i = starta; i <= enda; i++) {
4608 writel(pos, ivideo->video_vbase + pos);
4611 sisfb_post_xgi_delay(ivideo, 150);
4613 if(readl(ivideo->video_vbase) != 0)
4616 for(i = starta; i <= enda; i++) {
4619 if(readl(ivideo->video_vbase + pos) != pos)
4628 static void __devinit
4629 sisfb_post_xgi_ramsize(struct sis_video_info *ivideo)
4631 unsigned int buswidth, ranksize, channelab, mapsize;
4634 static const u8 dramsr13[12 * 5] = {
4635 0x02, 0x0e, 0x0b, 0x80, 0x5d,
4636 0x02, 0x0e, 0x0a, 0x40, 0x59,
4637 0x02, 0x0d, 0x0b, 0x40, 0x4d,
4638 0x02, 0x0e, 0x09, 0x20, 0x55,
4639 0x02, 0x0d, 0x0a, 0x20, 0x49,
4640 0x02, 0x0c, 0x0b, 0x20, 0x3d,
4641 0x02, 0x0e, 0x08, 0x10, 0x51,
4642 0x02, 0x0d, 0x09, 0x10, 0x45,
4643 0x02, 0x0c, 0x0a, 0x10, 0x39,
4644 0x02, 0x0d, 0x08, 0x08, 0x41,
4645 0x02, 0x0c, 0x09, 0x08, 0x35,
4646 0x02, 0x0c, 0x08, 0x04, 0x31
4648 static const u8 dramsr13_4[4 * 5] = {
4649 0x02, 0x0d, 0x09, 0x40, 0x45,
4650 0x02, 0x0c, 0x09, 0x20, 0x35,
4651 0x02, 0x0c, 0x08, 0x10, 0x31,
4652 0x02, 0x0b, 0x08, 0x08, 0x21
4655 /* Enable linear mode, disable 0xa0000 address decoding */
4656 /* We disable a0000 address decoding, because
4657 * - if running on x86, if the card is disabled, it means
4658 * that another card is in the system. We don't want
4659 * to interphere with that primary card's textmode.
4660 * - if running on non-x86, there usually is no VGA window
4663 orSISIDXREG(SISSR, 0x20, (0x80 | 0x04));
4665 /* Need to map max FB size for finding out about RAM size */
4666 mapsize = ivideo->video_size;
4667 sisfb_post_map_vram(ivideo, &mapsize, 32);
4669 if(!ivideo->video_vbase) {
4670 printk(KERN_ERR "sisfb: Unable to detect RAM size. Setting default.\n");
4671 outSISIDXREG(SISSR, 0x13, 0x35);
4672 outSISIDXREG(SISSR, 0x14, 0x41);
4677 /* Non-interleaving */
4678 outSISIDXREG(SISSR, 0x15, 0x00);
4680 outSISIDXREG(SISSR, 0x1c, 0x00);
4682 if(ivideo->chip == XGI_20) {
4685 inSISIDXREG(SISCR, 0x97, reg);
4686 if(!(reg & 0x01)) { /* Single 32/16 */
4688 outSISIDXREG(SISSR, 0x13, 0xb1);
4689 outSISIDXREG(SISSR, 0x14, 0x52);
4690 sisfb_post_xgi_delay(ivideo, 1);
4692 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4695 outSISIDXREG(SISSR, 0x13, 0x31);
4696 outSISIDXREG(SISSR, 0x14, 0x42);
4697 sisfb_post_xgi_delay(ivideo, 1);
4698 if(sisfb_post_xgi_rwtest(ivideo, 23, 23, mapsize))
4702 outSISIDXREG(SISSR, 0x13, 0xb1);
4703 outSISIDXREG(SISSR, 0x14, 0x41);
4704 sisfb_post_xgi_delay(ivideo, 1);
4706 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4709 outSISIDXREG(SISSR, 0x13, 0x31);
4710 } else { /* Dual 16/8 */
4712 outSISIDXREG(SISSR, 0x13, 0xb1);
4713 outSISIDXREG(SISSR, 0x14, 0x41);
4714 sisfb_post_xgi_delay(ivideo, 1);
4716 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4719 outSISIDXREG(SISSR, 0x13, 0x31);
4720 outSISIDXREG(SISSR, 0x14, 0x31);
4721 sisfb_post_xgi_delay(ivideo, 1);
4722 if(sisfb_post_xgi_rwtest(ivideo, 22, 22, mapsize))
4726 outSISIDXREG(SISSR, 0x13, 0xb1);
4727 outSISIDXREG(SISSR, 0x14, 0x30);
4728 sisfb_post_xgi_delay(ivideo, 1);
4730 if(sisfb_post_xgi_rwtest(ivideo, 21, 22, mapsize))
4733 outSISIDXREG(SISSR, 0x13, 0x31);
4736 } else { /* XGI_40 */
4738 inSISIDXREG(SISCR, 0x97, reg);
4740 inSISIDXREG(SISSR, 0x39, reg);
4744 if(reg & 0x01) { /* DDRII */
4746 if(ivideo->revision_id == 2) {
4748 outSISIDXREG(SISSR, 0x13, 0xa1);
4749 outSISIDXREG(SISSR, 0x14, 0x44);
4751 sisfb_post_xgi_delay(ivideo, 1);
4752 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4755 outSISIDXREG(SISSR, 0x13, 0x21);
4756 outSISIDXREG(SISSR, 0x14, 0x34);
4757 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4761 outSISIDXREG(SISSR, 0x13, 0xa1);
4762 outSISIDXREG(SISSR, 0x14, 0x40);
4764 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4767 outSISIDXREG(SISSR, 0x13, 0x21);
4768 outSISIDXREG(SISSR, 0x14, 0x30);
4771 outSISIDXREG(SISSR, 0x13, 0xa1);
4772 outSISIDXREG(SISSR, 0x14, 0x4c);
4774 sisfb_post_xgi_delay(ivideo, 1);
4775 if(sisfb_post_xgi_rwtest(ivideo, 23, 25, mapsize))
4779 outSISIDXREG(SISSR, 0x14, 0x48);
4780 sisfb_post_xgi_delay(ivideo, 1);
4782 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4785 outSISIDXREG(SISSR, 0x13, 0x21);
4786 outSISIDXREG(SISSR, 0x14, 0x3c);
4789 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize)) {
4793 outSISIDXREG(SISSR, 0x14, 0x38);
4797 sisfb_post_xgi_delay(ivideo, 1);
4802 if(ivideo->revision_id == 2) {
4804 outSISIDXREG(SISSR, 0x13, 0xa1);
4805 outSISIDXREG(SISSR, 0x14, 0x52);
4806 sisfb_post_xgi_delay(ivideo, 1);
4808 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4811 outSISIDXREG(SISSR, 0x13, 0x21);
4812 outSISIDXREG(SISSR, 0x14, 0x42);
4815 outSISIDXREG(SISSR, 0x13, 0xa1);
4816 outSISIDXREG(SISSR, 0x14, 0x5a);
4817 sisfb_post_xgi_delay(ivideo, 1);
4819 if(sisfb_post_xgi_rwtest(ivideo, 24, 25, mapsize))
4822 outSISIDXREG(SISSR, 0x13, 0x21);
4823 outSISIDXREG(SISSR, 0x14, 0x4a);
4825 sisfb_post_xgi_delay(ivideo, 1);
4831 setSISIDXREG(SISSR, 0x14, 0xf0, sr14);
4832 sisfb_post_xgi_delay(ivideo, 1);
4834 j = (ivideo->chip == XGI_20) ? 5 : 9;
4835 k = (ivideo->chip == XGI_20) ? 12 : 4;
4837 for(i = 0; i < k; i++) {
4839 reg = (ivideo->chip == XGI_20) ?
4840 dramsr13[(i * 5) + 4] : dramsr13_4[(i * 5) + 4];
4841 setSISIDXREG(SISSR, 0x13, 0x80, reg);
4842 sisfb_post_xgi_delay(ivideo, 50);
4844 ranksize = (ivideo->chip == XGI_20) ?
4845 dramsr13[(i * 5) + 3] : dramsr13_4[(i * 5) + 3];
4847 inSISIDXREG(SISSR, 0x13, reg);
4848 if(reg & 0x80) ranksize <<= 1;
4850 if(ivideo->chip == XGI_20) {
4851 if(buswidth == 16) ranksize <<= 1;
4852 else if(buswidth == 32) ranksize <<= 2;
4854 if(buswidth == 64) ranksize <<= 1;
4860 if((ranksize * l) <= 256) {
4861 while((ranksize >>= 1)) reg += 0x10;
4866 setSISIDXREG(SISSR, 0x14, 0x0f, (reg & 0xf0));
4867 sisfb_post_xgi_delay(ivideo, 1);
4869 if(sisfb_post_xgi_rwtest(ivideo, j, ((reg >> 4) + channelab - 2 + 20), mapsize))
4873 iounmap(ivideo->video_vbase);
4876 static void __devinit
4877 sisfb_post_xgi_setclocks(struct sis_video_info *ivideo, u8 regb)
4881 static const u8 cs90[8 * 3] = {
4891 static const u8 csb8[8 * 3] = {
4905 v1 = cs90[index]; v2 = cs90[index + 1]; v3 = cs90[index + 2];
4906 if(ivideo->haveXGIROM) {
4907 v1 = ivideo->bios_abase[0x90 + index];
4908 v2 = ivideo->bios_abase[0x90 + index + 1];
4909 v3 = ivideo->bios_abase[0x90 + index + 2];
4911 outSISIDXREG(SISSR, 0x28, v1);
4912 outSISIDXREG(SISSR, 0x29, v2);
4913 outSISIDXREG(SISSR, 0x2a, v3);
4914 sisfb_post_xgi_delay(ivideo, 0x43);
4915 sisfb_post_xgi_delay(ivideo, 0x43);
4916 sisfb_post_xgi_delay(ivideo, 0x43);
4918 v1 = csb8[index]; v2 = csb8[index + 1]; v3 = csb8[index + 2];
4919 if(ivideo->haveXGIROM) {
4920 v1 = ivideo->bios_abase[0xb8 + index];
4921 v2 = ivideo->bios_abase[0xb8 + index + 1];
4922 v3 = ivideo->bios_abase[0xb8 + index + 2];
4924 outSISIDXREG(SISSR, 0x2e, v1);
4925 outSISIDXREG(SISSR, 0x2f, v2);
4926 outSISIDXREG(SISSR, 0x30, v3);
4927 sisfb_post_xgi_delay(ivideo, 0x43);
4928 sisfb_post_xgi_delay(ivideo, 0x43);
4929 sisfb_post_xgi_delay(ivideo, 0x43);
4932 static int __devinit
4933 sisfb_post_xgi(struct pci_dev *pdev)
4935 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4936 unsigned char *bios = ivideo->bios_abase;
4937 struct pci_dev *mypdev = NULL;
4938 const u8 *ptr, *ptr2;
4939 u8 v1, v2, v3, v4, v5, reg, ramtype;
4940 u32 rega, regb, regd;
4942 static const u8 cs78[3] = { 0xf6, 0x0d, 0x00 };
4943 static const u8 cs76[2] = { 0xa3, 0xfb };
4944 static const u8 cs7b[3] = { 0xc0, 0x11, 0x00 };
4945 static const u8 cs158[8] = {
4946 0x88, 0xaa, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00
4948 static const u8 cs160[8] = {
4949 0x44, 0x77, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00
4951 static const u8 cs168[8] = {
4952 0x48, 0x78, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00
4954 static const u8 cs128[3 * 8] = {
4955 0x90, 0x28, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00,
4956 0x77, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
4957 0x77, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
4959 static const u8 cs148[2 * 8] = {
4960 0x55, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00,
4961 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4963 static const u8 cs31a[8 * 4] = {
4964 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
4965 0xaa, 0xaa, 0xaa, 0xaa, 0x00, 0x00, 0x00, 0x00,
4966 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4967 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4969 static const u8 cs33a[8 * 4] = {
4970 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4971 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4972 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
4973 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4975 static const u8 cs45a[8 * 2] = {
4976 0x00, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0x00, 0x00,
4977 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4979 static const u8 cs170[7 * 8] = {
4980 0x54, 0x32, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
4981 0x54, 0x43, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
4982 0x0a, 0x05, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
4983 0x44, 0x34, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
4984 0x10, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
4985 0x11, 0x0c, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
4986 0x05, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00
4988 static const u8 cs1a8[3 * 8] = {
4989 0xf0, 0xf0, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00,
4990 0x05, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
4991 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4993 static const u8 cs100[2 * 8] = {
4994 0xc4, 0x04, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00,
4995 0xc4, 0x04, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00
4999 reg = inSISREG(SISVGAENABLE) | 0x01;
5000 outSISREG(SISVGAENABLE, reg);
5003 reg = inSISREG(SISMISCR) | 0x01;
5004 outSISREG(SISMISCW, reg);
5007 outSISIDXREG(SISSR, 0x05, 0x86);
5008 inSISIDXREG(SISSR, 0x05, reg);
5012 /* Clear some regs */
5013 for(i = 0; i < 0x22; i++) {
5014 if(0x06 + i == 0x20) continue;
5015 outSISIDXREG(SISSR, 0x06 + i, 0x00);
5017 for(i = 0; i < 0x0b; i++) {
5018 outSISIDXREG(SISSR, 0x31 + i, 0x00);
5020 for(i = 0; i < 0x10; i++) {
5021 outSISIDXREG(SISCR, 0x30 + i, 0x00);
5025 if(ivideo->haveXGIROM) {
5026 ptr = (const u8 *)&bios[0x78];
5028 for(i = 0; i < 3; i++) {
5029 outSISIDXREG(SISSR, 0x23 + i, ptr[i]);
5033 if(ivideo->haveXGIROM) {
5034 ptr = (const u8 *)&bios[0x76];
5036 for(i = 0; i < 2; i++) {
5037 outSISIDXREG(SISSR, 0x21 + i, ptr[i]);
5040 v1 = 0x18; v2 = 0x00;
5041 if(ivideo->haveXGIROM) {
5045 outSISIDXREG(SISSR, 0x07, v1);
5046 outSISIDXREG(SISSR, 0x11, 0x0f);
5047 outSISIDXREG(SISSR, 0x1f, v2);
5048 /* PCI linear mode, RelIO enabled, A0000 decoding disabled */
5049 outSISIDXREG(SISSR, 0x20, 0x80 | 0x20 | 0x04);
5050 outSISIDXREG(SISSR, 0x27, 0x74);
5053 if(ivideo->haveXGIROM) {
5054 ptr = (const u8 *)&bios[0x7b];
5056 for(i = 0; i < 3; i++) {
5057 outSISIDXREG(SISSR, 0x31 + i, ptr[i]);
5060 if(ivideo->chip == XGI_40) {
5061 if(ivideo->revision_id == 2) {
5062 setSISIDXREG(SISSR, 0x3b, 0x3f, 0xc0);
5064 outSISIDXREG(SISCR, 0x7d, 0xfe);
5065 outSISIDXREG(SISCR, 0x7e, 0x0f);
5067 if(ivideo->revision_id == 0) { /* 40 *and* 20? */
5068 andSISIDXREG(SISCR, 0x58, 0xd7);
5069 inSISIDXREG(SISCR, 0xcb, reg);
5071 setSISIDXREG(SISCR, 0x58, 0xd7, (reg & 0x10) ? 0x08 : 0x20); /* =0x28 Z7 ? */
5075 reg = (ivideo->chip == XGI_40) ? 0x20 : 0x00;
5076 setSISIDXREG(SISCR, 0x38, 0x1f, reg);
5078 if(ivideo->chip == XGI_20) {
5079 outSISIDXREG(SISSR, 0x36, 0x70);
5081 outSISIDXREG(SISVID, 0x00, 0x86);
5082 outSISIDXREG(SISVID, 0x32, 0x00);
5083 outSISIDXREG(SISVID, 0x30, 0x00);
5084 outSISIDXREG(SISVID, 0x32, 0x01);
5085 outSISIDXREG(SISVID, 0x30, 0x00);
5086 andSISIDXREG(SISVID, 0x2f, 0xdf);
5087 andSISIDXREG(SISCAP, 0x00, 0x3f);
5089 outSISIDXREG(SISPART1, 0x2f, 0x01);
5090 outSISIDXREG(SISPART1, 0x00, 0x00);
5091 outSISIDXREG(SISPART1, 0x02, bios[0x7e]);
5092 outSISIDXREG(SISPART1, 0x2e, 0x08);
5093 andSISIDXREG(SISPART1, 0x35, 0x7f);
5094 andSISIDXREG(SISPART1, 0x50, 0xfe);
5096 inSISIDXREG(SISPART4, 0x00, reg);
5097 if(reg == 1 || reg == 2) {
5098 outSISIDXREG(SISPART2, 0x00, 0x1c);
5099 outSISIDXREG(SISPART4, 0x0d, bios[0x7f]);
5100 outSISIDXREG(SISPART4, 0x0e, bios[0x80]);
5101 outSISIDXREG(SISPART4, 0x10, bios[0x81]);
5102 andSISIDXREG(SISPART4, 0x0f, 0x3f);
5104 inSISIDXREG(SISPART4, 0x01, reg);
5105 if((reg & 0xf0) >= 0xb0) {
5106 inSISIDXREG(SISPART4, 0x23, reg);
5107 if(reg & 0x20) reg |= 0x40;
5108 outSISIDXREG(SISPART4, 0x23, reg);
5109 reg = (reg & 0x20) ? 0x02 : 0x00;
5110 setSISIDXREG(SISPART1, 0x1e, 0xfd, reg);
5116 inSISIDXREG(SISSR, 0x3b, reg);
5118 inSISIDXREG(SISSR, 0x3a, reg);
5119 v2 = (reg & 0x30) >> 3;
5120 if(!(v2 & 0x04)) v2 ^= 0x02;
5121 inSISIDXREG(SISSR, 0x39, reg);
5122 if(reg & 0x80) v2 |= 0x80;
5125 if((mypdev = pci_get_device(PCI_VENDOR_ID_SI, 0x0730, NULL))) {
5126 pci_dev_put(mypdev);
5127 if(((v2 & 0x06) == 2) || ((v2 & 0x06) == 4))
5132 mypdev = pci_get_device(PCI_VENDOR_ID_SI, 0x0735, NULL);
5134 mypdev = pci_get_device(PCI_VENDOR_ID_SI, 0x0645, NULL);
5136 mypdev = pci_get_device(PCI_VENDOR_ID_SI, 0x0650, NULL);
5138 pci_read_config_dword(mypdev, 0x94, ®d);
5140 pci_write_config_dword(mypdev, 0x94, regd);
5142 pci_dev_put(mypdev);
5143 } else if(sisfb_find_host_bridge(ivideo, pdev, PCI_VENDOR_ID_SI)) {
5145 } else if(sisfb_find_host_bridge(ivideo, pdev, 0x1106) ||
5146 sisfb_find_host_bridge(ivideo, pdev, 0x1022) ||
5147 sisfb_find_host_bridge(ivideo, pdev, 0x700e) ||
5148 sisfb_find_host_bridge(ivideo, pdev, 0x10de)) {
5149 if((v2 & 0x06) == 4)
5154 setSISIDXREG(SISCR, 0x5f, 0xf0, v2);
5156 outSISIDXREG(SISSR, 0x22, v1);
5158 if(ivideo->revision_id == 2) {
5159 inSISIDXREG(SISSR, 0x3b, v1);
5160 inSISIDXREG(SISSR, 0x3a, v2);
5161 regd = bios[0x90 + 3] | (bios[0x90 + 4] << 8);
5162 if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) )
5163 setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01);
5165 if((mypdev = pci_get_device(0x10de, 0x01e0, NULL))) {
5166 /* TODO: set CR5f &0xf1 | 0x01 for version 6570
5170 setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01);
5171 pci_dev_put(mypdev);
5176 inSISIDXREG(SISSR, 0x3b, reg);
5177 inSISIDXREG(SISCR, 0x5f, v2);
5178 if((!(reg & 0x02)) && (v2 & 0x0e))
5180 outSISIDXREG(SISSR, 0x27, v1);
5182 if(bios[0x64] & 0x01) {
5183 setSISIDXREG(SISCR, 0x5f, 0xf0, bios[0x64]);
5187 pci_read_config_dword(pdev, 0x50, ®d);
5188 regd = (regd >> 20) & 0x0f;
5191 orSISIDXREG(SISCR, 0x5f, 0x08);
5193 outSISIDXREG(SISCR, 0x48, v1);
5195 setSISIDXREG(SISCR, 0x47, 0x04, bios[0x4f6] & 0xfb);
5196 setSISIDXREG(SISCR, 0x49, 0xf0, bios[0x4f8] & 0x0f);
5197 setSISIDXREG(SISCR, 0x4a, 0x60, bios[0x4f9] & 0x9f);
5198 setSISIDXREG(SISCR, 0x4b, 0x08, bios[0x4fa] & 0xf7);
5199 setSISIDXREG(SISCR, 0x4c, 0x80, bios[0x4fb] & 0x7f);
5200 outSISIDXREG(SISCR, 0x70, bios[0x4fc]);
5201 setSISIDXREG(SISCR, 0x71, 0xf0, bios[0x4fd] & 0x0f);
5202 outSISIDXREG(SISCR, 0x74, 0xd0);
5203 setSISIDXREG(SISCR, 0x74, 0xcf, bios[0x4fe] & 0x30);
5204 setSISIDXREG(SISCR, 0x75, 0xe0, bios[0x4ff] & 0x1f);
5205 setSISIDXREG(SISCR, 0x76, 0xe0, bios[0x500] & 0x1f);
5207 if((mypdev = pci_get_device(0x8086, 0x2530, NULL))) {
5209 pci_dev_put(mypdev);
5211 outSISIDXREG(SISCR, 0x77, v1);
5219 if(ivideo->haveXGIROM) {
5220 v1 = bios[0x140 + regb];
5222 outSISIDXREG(SISCR, 0x6d, v1);
5225 if(ivideo->haveXGIROM) {
5226 ptr = (const u8 *)&bios[0x128];
5228 for(i = 0, j = 0; i < 3; i++, j += 8) {
5229 outSISIDXREG(SISCR, 0x68 + i, ptr[j + regb]);
5234 if(ivideo->haveXGIROM) {
5235 index = (ivideo->chip == XGI_20) ? 0x31a : 0x3a6;
5236 ptr = (const u8 *)&bios[index];
5237 ptr2 = (const u8 *)&bios[index + 0x20];
5239 for(i = 0; i < 2; i++) {
5241 regd = le32_to_cpu(((u32 *)ptr)[regb]);
5244 regd = le32_to_cpu(((u32 *)ptr2)[regb]);
5248 for(j = 0; j < 16; j++) {
5250 if(regd & 0x01) reg |= 0x04;
5251 if(regd & 0x02) reg |= 0x08;
5253 outSISIDXREG(SISCR, rega, reg);
5254 inSISIDXREG(SISCR, rega, reg);
5255 inSISIDXREG(SISCR, rega, reg);
5260 andSISIDXREG(SISCR, 0x6e, 0xfc);
5263 if(ivideo->haveXGIROM) {
5264 index = (ivideo->chip == XGI_20) ? 0x35a : 0x3e6;
5265 ptr = (const u8 *)&bios[index];
5267 for(i = 0; i < 4; i++) {
5268 setSISIDXREG(SISCR, 0x6e, 0xfc, i);
5270 for(j = 0; j < 2; j++) {
5273 regd = le32_to_cpu(((u32 *)ptr)[regb * 8]);
5277 for(k = 0; k < 16; k++) {
5279 if(regd & 0x01) reg |= 0x01;
5280 if(regd & 0x02) reg |= 0x02;
5282 outSISIDXREG(SISCR, 0x6f, reg);
5283 inSISIDXREG(SISCR, 0x6f, reg);
5284 inSISIDXREG(SISCR, 0x6f, reg);
5291 if(ivideo->haveXGIROM) {
5292 ptr = (const u8 *)&bios[0x148];
5294 for(i = 0, j = 0; i < 2; i++, j += 8) {
5295 outSISIDXREG(SISCR, 0x80 + i, ptr[j + regb]);
5298 andSISIDXREG(SISCR, 0x89, 0x8f);
5301 if(ivideo->haveXGIROM) {
5302 index = (ivideo->chip == XGI_20) ? 0x45a : 0x4e6;
5303 ptr = (const u8 *)&bios[index];
5305 regd = le16_to_cpu(((const u16 *)ptr)[regb]);
5307 for(i = 0; i < 5; i++) {
5309 if(regd & 0x01) reg |= 0x01;
5310 if(regd & 0x02) reg |= 0x02;
5312 outSISIDXREG(SISCR, 0x89, reg);
5313 inSISIDXREG(SISCR, 0x89, reg);
5314 inSISIDXREG(SISCR, 0x89, reg);
5318 v1 = 0xb5; v2 = 0x20; v3 = 0xf0; v4 = 0x13;
5319 if(ivideo->haveXGIROM) {
5320 v1 = bios[0x118 + regb];
5321 v2 = bios[0xf8 + regb];
5322 v3 = bios[0x120 + regb];
5325 outSISIDXREG(SISCR, 0x45, v1 & 0x0f);
5326 outSISIDXREG(SISCR, 0x99, (v1 >> 4) & 0x07);
5327 orSISIDXREG(SISCR, 0x40, v1 & 0x80);
5328 outSISIDXREG(SISCR, 0x41, v2);
5331 if(ivideo->haveXGIROM) {
5332 ptr = (const u8 *)&bios[0x170];
5334 for(i = 0, j = 0; i < 7; i++, j += 8) {
5335 outSISIDXREG(SISCR, 0x90 + i, ptr[j + regb]);
5338 outSISIDXREG(SISCR, 0x59, v3);
5341 if(ivideo->haveXGIROM) {
5342 ptr = (const u8 *)&bios[0x1a8];
5344 for(i = 0, j = 0; i < 3; i++, j += 8) {
5345 outSISIDXREG(SISCR, 0xc3 + i, ptr[j + regb]);
5349 if(ivideo->haveXGIROM) {
5350 ptr = (const u8 *)&bios[0x100];
5352 for(i = 0, j = 0; i < 2; i++, j += 8) {
5353 outSISIDXREG(SISCR, 0x8a + i, ptr[j + regb]);
5356 outSISIDXREG(SISCR, 0xcf, v4);
5358 outSISIDXREG(SISCR, 0x83, 0x09);
5359 outSISIDXREG(SISCR, 0x87, 0x00);
5361 if(ivideo->chip == XGI_40) {
5362 if( (ivideo->revision_id == 1) ||
5363 (ivideo->revision_id == 2) ) {
5364 outSISIDXREG(SISCR, 0x8c, 0x87);
5368 outSISIDXREG(SISSR, 0x17, 0x00);
5369 outSISIDXREG(SISSR, 0x1a, 0x87);
5371 if(ivideo->chip == XGI_20) {
5372 outSISIDXREG(SISSR, 0x15, 0x00);
5373 outSISIDXREG(SISSR, 0x1c, 0x00);
5376 ramtype = 0x00; v1 = 0x10;
5377 if(ivideo->haveXGIROM) {
5378 ramtype = bios[0x62];
5381 if(!(ramtype & 0x80)) {
5382 if(ivideo->chip == XGI_20) {
5383 outSISIDXREG(SISCR, 0x97, v1);
5384 inSISIDXREG(SISCR, 0x97, reg);
5386 ramtype = (reg & 0x01) << 1;
5389 inSISIDXREG(SISSR, 0x39, reg);
5390 ramtype = reg & 0x02;
5392 inSISIDXREG(SISSR, 0x3a, reg);
5393 ramtype = (reg >> 1) & 0x01;
5403 sisfb_post_xgi_setclocks(ivideo, regb);
5404 if((ivideo->chip == XGI_20) ||
5405 (ivideo->revision_id == 1) ||
5406 (ivideo->revision_id == 2)) {
5407 v1 = cs158[regb]; v2 = cs160[regb]; v3 = cs168[regb];
5408 if(ivideo->haveXGIROM) {
5409 v1 = bios[regb + 0x158];
5410 v2 = bios[regb + 0x160];
5411 v3 = bios[regb + 0x168];
5413 outSISIDXREG(SISCR, 0x82, v1);
5414 outSISIDXREG(SISCR, 0x85, v2);
5415 outSISIDXREG(SISCR, 0x86, v3);
5417 outSISIDXREG(SISCR, 0x82, 0x88);
5418 outSISIDXREG(SISCR, 0x86, 0x00);
5419 inSISIDXREG(SISCR, 0x86, reg);
5420 outSISIDXREG(SISCR, 0x86, 0x88);
5421 inSISIDXREG(SISCR, 0x86, reg);
5422 outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]);
5423 outSISIDXREG(SISCR, 0x82, 0x77);
5424 outSISIDXREG(SISCR, 0x85, 0x00);
5425 inSISIDXREG(SISCR, 0x85, reg);
5426 outSISIDXREG(SISCR, 0x85, 0x88);
5427 inSISIDXREG(SISCR, 0x85, reg);
5428 outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]);
5429 outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]);
5431 if(ivideo->chip == XGI_40) {
5432 outSISIDXREG(SISCR, 0x97, 0x00);
5434 outSISIDXREG(SISCR, 0x98, 0x01);
5435 outSISIDXREG(SISCR, 0x9a, 0x02);
5437 outSISIDXREG(SISSR, 0x18, 0x01);
5438 if((ivideo->chip == XGI_20) ||
5439 (ivideo->revision_id == 2)) {
5440 outSISIDXREG(SISSR, 0x19, 0x40);
5442 outSISIDXREG(SISSR, 0x19, 0x20);
5444 outSISIDXREG(SISSR, 0x16, 0x00);
5445 outSISIDXREG(SISSR, 0x16, 0x80);
5446 if((ivideo->chip == XGI_20) || (bios[0x1cb] != 0x0c)) {
5447 sisfb_post_xgi_delay(ivideo, 0x43);
5448 sisfb_post_xgi_delay(ivideo, 0x43);
5449 sisfb_post_xgi_delay(ivideo, 0x43);
5450 outSISIDXREG(SISSR, 0x18, 0x00);
5451 if((ivideo->chip == XGI_20) ||
5452 (ivideo->revision_id == 2)) {
5453 outSISIDXREG(SISSR, 0x19, 0x40);
5455 outSISIDXREG(SISSR, 0x19, 0x20);
5457 } else if((ivideo->chip == XGI_40) && (bios[0x1cb] == 0x0c)) {
5458 /* outSISIDXREG(SISSR, 0x16, 0x0c); */ /* ? */
5460 outSISIDXREG(SISSR, 0x16, 0x00);
5461 outSISIDXREG(SISSR, 0x16, 0x80);
5462 sisfb_post_xgi_delay(ivideo, 4);
5463 v1 = 0x31; v2 = 0x03; v3 = 0x83; v4 = 0x03; v5 = 0x83;
5464 if(ivideo->haveXGIROM) {
5466 index = (ivideo->chip == XGI_20) ? 0x4b2 : 0x53e;
5468 v3 = bios[index + 1];
5469 v4 = bios[index + 2];
5470 v5 = bios[index + 3];
5472 outSISIDXREG(SISSR, 0x18, v1);
5473 outSISIDXREG(SISSR, 0x19, ((ivideo->chip == XGI_20) ? 0x02 : 0x01));
5474 outSISIDXREG(SISSR, 0x16, v2);
5475 outSISIDXREG(SISSR, 0x16, v3);
5476 sisfb_post_xgi_delay(ivideo, 0x43);
5477 outSISIDXREG(SISSR, 0x1b, 0x03);
5478 sisfb_post_xgi_delay(ivideo, 0x22);
5479 outSISIDXREG(SISSR, 0x18, v1);
5480 outSISIDXREG(SISSR, 0x19, 0x00);
5481 outSISIDXREG(SISSR, 0x16, v4);
5482 outSISIDXREG(SISSR, 0x16, v5);
5483 outSISIDXREG(SISSR, 0x1b, 0x00);
5486 outSISIDXREG(SISCR, 0x82, 0x77);
5487 outSISIDXREG(SISCR, 0x86, 0x00);
5488 inSISIDXREG(SISCR, 0x86, reg);
5489 outSISIDXREG(SISCR, 0x86, 0x88);
5490 inSISIDXREG(SISCR, 0x86, reg);
5491 v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb];
5492 if(ivideo->haveXGIROM) {
5493 v1 = bios[regb + 0x168];
5494 v2 = bios[regb + 0x160];
5495 v3 = bios[regb + 0x158];
5497 outSISIDXREG(SISCR, 0x86, v1);
5498 outSISIDXREG(SISCR, 0x82, 0x77);
5499 outSISIDXREG(SISCR, 0x85, 0x00);
5500 inSISIDXREG(SISCR, 0x85, reg);
5501 outSISIDXREG(SISCR, 0x85, 0x88);
5502 inSISIDXREG(SISCR, 0x85, reg);
5503 outSISIDXREG(SISCR, 0x85, v2);
5504 outSISIDXREG(SISCR, 0x82, v3);
5505 outSISIDXREG(SISCR, 0x98, 0x01);
5506 outSISIDXREG(SISCR, 0x9a, 0x02);
5508 outSISIDXREG(SISSR, 0x28, 0x64);
5509 outSISIDXREG(SISSR, 0x29, 0x63);
5510 sisfb_post_xgi_delay(ivideo, 15);
5511 outSISIDXREG(SISSR, 0x18, 0x00);
5512 outSISIDXREG(SISSR, 0x19, 0x20);
5513 outSISIDXREG(SISSR, 0x16, 0x00);
5514 outSISIDXREG(SISSR, 0x16, 0x80);
5515 outSISIDXREG(SISSR, 0x18, 0xc5);
5516 outSISIDXREG(SISSR, 0x19, 0x23);
5517 outSISIDXREG(SISSR, 0x16, 0x00);
5518 outSISIDXREG(SISSR, 0x16, 0x80);
5519 sisfb_post_xgi_delay(ivideo, 1);
5520 outSISIDXREG(SISCR, 0x97,0x11);
5521 sisfb_post_xgi_setclocks(ivideo, regb);
5522 sisfb_post_xgi_delay(ivideo, 0x46);
5523 outSISIDXREG(SISSR, 0x18, 0xc5);
5524 outSISIDXREG(SISSR, 0x19, 0x23);
5525 outSISIDXREG(SISSR, 0x16, 0x00);
5526 outSISIDXREG(SISSR, 0x16, 0x80);
5527 sisfb_post_xgi_delay(ivideo, 1);
5528 outSISIDXREG(SISSR, 0x1b, 0x04);
5529 sisfb_post_xgi_delay(ivideo, 1);
5530 outSISIDXREG(SISSR, 0x1b, 0x00);
5531 sisfb_post_xgi_delay(ivideo, 1);
5533 if(ivideo->haveXGIROM) {
5536 outSISIDXREG(SISSR, 0x18, v1);
5537 outSISIDXREG(SISSR, 0x19, 0x06);
5538 outSISIDXREG(SISSR, 0x16, 0x04);
5539 outSISIDXREG(SISSR, 0x16, 0x84);
5540 sisfb_post_xgi_delay(ivideo, 1);
5543 sisfb_post_xgi_setclocks(ivideo, regb);
5544 if((ivideo->chip == XGI_40) &&
5545 ((ivideo->revision_id == 1) ||
5546 (ivideo->revision_id == 2))) {
5547 outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]);
5548 outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]);
5549 outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]);
5551 outSISIDXREG(SISCR, 0x82, 0x88);
5552 outSISIDXREG(SISCR, 0x86, 0x00);
5553 inSISIDXREG(SISCR, 0x86, reg);
5554 outSISIDXREG(SISCR, 0x86, 0x88);
5555 outSISIDXREG(SISCR, 0x82, 0x77);
5556 outSISIDXREG(SISCR, 0x85, 0x00);
5557 inSISIDXREG(SISCR, 0x85, reg);
5558 outSISIDXREG(SISCR, 0x85, 0x88);
5559 inSISIDXREG(SISCR, 0x85, reg);
5560 v1 = cs160[regb]; v2 = cs158[regb];
5561 if(ivideo->haveXGIROM) {
5562 v1 = bios[regb + 0x160];
5563 v2 = bios[regb + 0x158];
5565 outSISIDXREG(SISCR, 0x85, v1);
5566 outSISIDXREG(SISCR, 0x82, v2);
5568 if(ivideo->chip == XGI_40) {
5569 outSISIDXREG(SISCR, 0x97, 0x11);
5571 if((ivideo->chip == XGI_40) && (ivideo->revision_id == 2)) {
5572 outSISIDXREG(SISCR, 0x98, 0x01);
5574 outSISIDXREG(SISCR, 0x98, 0x03);
5576 outSISIDXREG(SISCR, 0x9a, 0x02);
5578 if(ivideo->chip == XGI_40) {
5579 outSISIDXREG(SISSR, 0x18, 0x01);
5581 outSISIDXREG(SISSR, 0x18, 0x00);
5583 outSISIDXREG(SISSR, 0x19, 0x40);
5584 outSISIDXREG(SISSR, 0x16, 0x00);
5585 outSISIDXREG(SISSR, 0x16, 0x80);
5586 if((ivideo->chip == XGI_40) && (bios[0x1cb] != 0x0c)) {
5587 sisfb_post_xgi_delay(ivideo, 0x43);
5588 sisfb_post_xgi_delay(ivideo, 0x43);
5589 sisfb_post_xgi_delay(ivideo, 0x43);
5590 outSISIDXREG(SISSR, 0x18, 0x00);
5591 outSISIDXREG(SISSR, 0x19, 0x40);
5592 outSISIDXREG(SISSR, 0x16, 0x00);
5593 outSISIDXREG(SISSR, 0x16, 0x80);
5595 sisfb_post_xgi_delay(ivideo, 4);
5597 if(ivideo->haveXGIROM) {
5600 outSISIDXREG(SISSR, 0x18, v1);
5601 outSISIDXREG(SISSR, 0x19, 0x01);
5602 if(ivideo->chip == XGI_40) {
5603 outSISIDXREG(SISSR, 0x16, bios[0x53e]);
5604 outSISIDXREG(SISSR, 0x16, bios[0x53f]);
5606 outSISIDXREG(SISSR, 0x16, 0x05);
5607 outSISIDXREG(SISSR, 0x16, 0x85);
5609 sisfb_post_xgi_delay(ivideo, 0x43);
5610 if(ivideo->chip == XGI_40) {
5611 outSISIDXREG(SISSR, 0x1b, 0x01);
5613 outSISIDXREG(SISSR, 0x1b, 0x03);
5615 sisfb_post_xgi_delay(ivideo, 0x22);
5616 outSISIDXREG(SISSR, 0x18, v1);
5617 outSISIDXREG(SISSR, 0x19, 0x00);
5618 if(ivideo->chip == XGI_40) {
5619 outSISIDXREG(SISSR, 0x16, bios[0x540]);
5620 outSISIDXREG(SISSR, 0x16, bios[0x541]);
5622 outSISIDXREG(SISSR, 0x16, 0x05);
5623 outSISIDXREG(SISSR, 0x16, 0x85);
5625 outSISIDXREG(SISSR, 0x1b, 0x00);
5630 if(ivideo->haveXGIROM) {
5631 v1 = bios[0x110 + regb];
5633 outSISIDXREG(SISSR, 0x1b, v1);
5636 v1 = 0x00; v2 = 0x00;
5637 if(ivideo->haveXGIROM) {
5643 if((v1 & 0x40) && (v2 & regd) && ivideo->haveXGIROM) {
5645 outSISIDXREG(SISSR, 0x13, bios[regb + 0xe0]);
5646 outSISIDXREG(SISSR, 0x14, bios[regb + 0xe0 + 8]);
5650 /* Set default mode, don't clear screen */
5651 ivideo->SiS_Pr.SiS_UseOEM = false;
5652 SiS_SetEnableDstn(&ivideo->SiS_Pr, false);
5653 SiS_SetEnableFstn(&ivideo->SiS_Pr, false);
5654 ivideo->curFSTN = ivideo->curDSTN = 0;
5655 ivideo->SiS_Pr.VideoMemorySize = 8 << 20;
5656 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
5658 outSISIDXREG(SISSR, 0x05, 0x86);
5660 /* Disable read-cache */
5661 andSISIDXREG(SISSR, 0x21, 0xdf);
5662 sisfb_post_xgi_ramsize(ivideo);
5663 /* Enable read-cache */
5664 orSISIDXREG(SISSR, 0x21, 0x20);
5669 printk(KERN_DEBUG "-----------------\n");
5670 for(i = 0; i < 0xff; i++) {
5671 inSISIDXREG(SISCR, i, reg);
5672 printk(KERN_DEBUG "CR%02x(%x) = 0x%02x\n", i, SISCR, reg);
5674 for(i = 0; i < 0x40; i++) {
5675 inSISIDXREG(SISSR, i, reg);
5676 printk(KERN_DEBUG "SR%02x(%x) = 0x%02x\n", i, SISSR, reg);
5678 printk(KERN_DEBUG "-----------------\n");
5682 if(ivideo->chip == XGI_20) {
5683 orSISIDXREG(SISCR, 0x32, 0x20);
5685 inSISIDXREG(SISPART4, 0x00, reg);
5686 if((reg == 1) || (reg == 2)) {
5687 sisfb_sense_crt1(ivideo);
5689 orSISIDXREG(SISCR, 0x32, 0x20);
5693 /* Set default mode, don't clear screen */
5694 ivideo->SiS_Pr.SiS_UseOEM = false;
5695 SiS_SetEnableDstn(&ivideo->SiS_Pr, false);
5696 SiS_SetEnableFstn(&ivideo->SiS_Pr, false);
5697 ivideo->curFSTN = ivideo->curDSTN = 0;
5698 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
5700 outSISIDXREG(SISSR, 0x05, 0x86);
5703 orSISIDXREG(SISSR, 0x01, 0x20);
5705 /* Save mode number in CR34 */
5706 outSISIDXREG(SISCR, 0x34, 0x2e);
5708 /* Let everyone know what the current mode is */
5709 ivideo->modeprechange = 0x2e;
5711 if(ivideo->chip == XGI_40) {
5712 inSISIDXREG(SISCR, 0xca, reg);
5713 inSISIDXREG(SISCR, 0xcc, v1);
5714 if((reg & 0x10) && (!(v1 & 0x04))) {
5716 "sisfb: Please connect power to the card.\n");
5725 static int __devinit
5726 sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
5728 struct sisfb_chip_info *chipinfo = &sisfb_chip_info[ent->driver_data];
5729 struct sis_video_info *ivideo = NULL;
5730 struct fb_info *sis_fb_info = NULL;
5738 sis_fb_info = framebuffer_alloc(sizeof(*ivideo), &pdev->dev);
5742 ivideo = (struct sis_video_info *)sis_fb_info->par;
5743 ivideo->memyselfandi = sis_fb_info;
5745 ivideo->sisfb_id = SISFB_ID;
5747 if(card_list == NULL) {
5748 ivideo->cardnumber = 0;
5750 struct sis_video_info *countvideo = card_list;
5751 ivideo->cardnumber = 1;
5752 while((countvideo = countvideo->next) != NULL)
5753 ivideo->cardnumber++;
5756 strncpy(ivideo->myid, chipinfo->chip_name, 30);
5758 ivideo->warncount = 0;
5759 ivideo->chip_id = pdev->device;
5760 ivideo->chip_vendor = pdev->vendor;
5761 ivideo->revision_id = pdev->revision;
5762 ivideo->SiS_Pr.ChipRevision = ivideo->revision_id;
5763 pci_read_config_word(pdev, PCI_COMMAND, ®16);
5764 ivideo->sisvga_enabled = reg16 & 0x01;
5765 ivideo->pcibus = pdev->bus->number;
5766 ivideo->pcislot = PCI_SLOT(pdev->devfn);
5767 ivideo->pcifunc = PCI_FUNC(pdev->devfn);
5768 ivideo->subsysvendor = pdev->subsystem_vendor;
5769 ivideo->subsysdevice = pdev->subsystem_device;
5772 if(sisfb_mode_idx == -1) {
5773 sisfb_get_vga_mode_from_kernel();
5777 ivideo->chip = chipinfo->chip;
5778 ivideo->sisvga_engine = chipinfo->vgaengine;
5779 ivideo->hwcursor_size = chipinfo->hwcursor_size;
5780 ivideo->CRT2_write_enable = chipinfo->CRT2_write_enable;
5781 ivideo->mni = chipinfo->mni;
5783 ivideo->detectedpdc = 0xff;
5784 ivideo->detectedpdca = 0xff;
5785 ivideo->detectedlcda = 0xff;
5787 ivideo->sisfb_thismonitor.datavalid = false;
5789 ivideo->current_base = 0;
5791 ivideo->engineok = 0;
5793 ivideo->sisfb_was_boot_device = 0;
5795 if(pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) {
5796 if(ivideo->sisvga_enabled)
5797 ivideo->sisfb_was_boot_device = 1;
5799 printk(KERN_DEBUG "sisfb: PCI device is disabled, "
5800 "but marked as boot video device ???\n");
5801 printk(KERN_DEBUG "sisfb: I will not accept this "
5802 "as the primary VGA device\n");
5806 ivideo->sisfb_parm_mem = sisfb_parm_mem;
5807 ivideo->sisfb_accel = sisfb_accel;
5808 ivideo->sisfb_ypan = sisfb_ypan;
5809 ivideo->sisfb_max = sisfb_max;
5810 ivideo->sisfb_userom = sisfb_userom;
5811 ivideo->sisfb_useoem = sisfb_useoem;
5812 ivideo->sisfb_mode_idx = sisfb_mode_idx;
5813 ivideo->sisfb_parm_rate = sisfb_parm_rate;
5814 ivideo->sisfb_crt1off = sisfb_crt1off;
5815 ivideo->sisfb_forcecrt1 = sisfb_forcecrt1;
5816 ivideo->sisfb_crt2type = sisfb_crt2type;
5817 ivideo->sisfb_crt2flags = sisfb_crt2flags;
5818 /* pdc(a), scalelcd, special timing, lvdshl handled below */
5819 ivideo->sisfb_dstn = sisfb_dstn;
5820 ivideo->sisfb_fstn = sisfb_fstn;
5821 ivideo->sisfb_tvplug = sisfb_tvplug;
5822 ivideo->sisfb_tvstd = sisfb_tvstd;
5823 ivideo->tvxpos = sisfb_tvxposoffset;
5824 ivideo->tvypos = sisfb_tvyposoffset;
5825 ivideo->sisfb_nocrt2rate = sisfb_nocrt2rate;
5826 ivideo->refresh_rate = 0;
5827 if(ivideo->sisfb_parm_rate != -1) {
5828 ivideo->refresh_rate = ivideo->sisfb_parm_rate;
5831 ivideo->SiS_Pr.UsePanelScaler = sisfb_scalelcd;
5832 ivideo->SiS_Pr.CenterScreen = -1;
5833 ivideo->SiS_Pr.SiS_CustomT = sisfb_specialtiming;
5834 ivideo->SiS_Pr.LVDSHL = sisfb_lvdshl;
5836 ivideo->SiS_Pr.SiS_Backup70xx = 0xff;
5837 ivideo->SiS_Pr.SiS_CHOverScan = -1;
5838 ivideo->SiS_Pr.SiS_ChSW = false;
5839 ivideo->SiS_Pr.SiS_UseLCDA = false;
5840 ivideo->SiS_Pr.HaveEMI = false;
5841 ivideo->SiS_Pr.HaveEMILCD = false;
5842 ivideo->SiS_Pr.OverruleEMI = false;
5843 ivideo->SiS_Pr.SiS_SensibleSR11 = false;
5844 ivideo->SiS_Pr.SiS_MyCR63 = 0x63;
5845 ivideo->SiS_Pr.PDC = -1;
5846 ivideo->SiS_Pr.PDCA = -1;
5847 ivideo->SiS_Pr.DDCPortMixup = false;
5848 #ifdef CONFIG_FB_SIS_315
5849 if(ivideo->chip >= SIS_330) {
5850 ivideo->SiS_Pr.SiS_MyCR63 = 0x53;
5851 if(ivideo->chip >= SIS_661) {
5852 ivideo->SiS_Pr.SiS_SensibleSR11 = true;
5857 memcpy(&ivideo->default_var, &my_default_var, sizeof(my_default_var));
5859 pci_set_drvdata(pdev, ivideo);
5861 /* Patch special cases */
5862 if((ivideo->nbridge = sisfb_get_northbridge(ivideo->chip))) {
5863 switch(ivideo->nbridge->device) {
5864 #ifdef CONFIG_FB_SIS_300
5865 case PCI_DEVICE_ID_SI_730:
5866 ivideo->chip = SIS_730;
5867 strcpy(ivideo->myid, "SiS 730");
5870 #ifdef CONFIG_FB_SIS_315
5871 case PCI_DEVICE_ID_SI_651:
5872 /* ivideo->chip is ok */
5873 strcpy(ivideo->myid, "SiS 651");
5875 case PCI_DEVICE_ID_SI_740:
5876 ivideo->chip = SIS_740;
5877 strcpy(ivideo->myid, "SiS 740");
5879 case PCI_DEVICE_ID_SI_661:
5880 ivideo->chip = SIS_661;
5881 strcpy(ivideo->myid, "SiS 661");
5883 case PCI_DEVICE_ID_SI_741:
5884 ivideo->chip = SIS_741;
5885 strcpy(ivideo->myid, "SiS 741");
5887 case PCI_DEVICE_ID_SI_760:
5888 ivideo->chip = SIS_760;
5889 strcpy(ivideo->myid, "SiS 760");
5891 case PCI_DEVICE_ID_SI_761:
5892 ivideo->chip = SIS_761;
5893 strcpy(ivideo->myid, "SiS 761");
5901 ivideo->SiS_Pr.ChipType = ivideo->chip;
5903 ivideo->SiS_Pr.ivideo = (void *)ivideo;
5905 #ifdef CONFIG_FB_SIS_315
5906 if((ivideo->SiS_Pr.ChipType == SIS_315PRO) ||
5907 (ivideo->SiS_Pr.ChipType == SIS_315)) {
5908 ivideo->SiS_Pr.ChipType = SIS_315H;
5912 if(!ivideo->sisvga_enabled) {
5913 if(pci_enable_device(pdev)) {
5914 if(ivideo->nbridge) pci_dev_put(ivideo->nbridge);
5915 pci_set_drvdata(pdev, NULL);
5916 framebuffer_release(sis_fb_info);
5921 ivideo->video_base = pci_resource_start(pdev, 0);
5922 ivideo->video_size = pci_resource_len(pdev, 0);
5923 ivideo->mmio_base = pci_resource_start(pdev, 1);
5924 ivideo->mmio_size = pci_resource_len(pdev, 1);
5925 ivideo->SiS_Pr.RelIO = pci_resource_start(pdev, 2) + 0x30;
5926 ivideo->SiS_Pr.IOAddress = ivideo->vga_base = ivideo->SiS_Pr.RelIO;
5928 SiSRegInit(&ivideo->SiS_Pr, ivideo->SiS_Pr.IOAddress);
5930 #ifdef CONFIG_FB_SIS_300
5931 /* Find PCI systems for Chrontel/GPIO communication setup */
5932 if(ivideo->chip == SIS_630) {
5935 if(mychswtable[i].subsysVendor == ivideo->subsysvendor &&
5936 mychswtable[i].subsysCard == ivideo->subsysdevice) {
5937 ivideo->SiS_Pr.SiS_ChSW = true;
5938 printk(KERN_DEBUG "sisfb: Identified [%s %s] "
5939 "requiring Chrontel/GPIO setup\n",
5940 mychswtable[i].vendorName,
5941 mychswtable[i].cardName);
5942 ivideo->lpcdev = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, NULL);
5946 } while(mychswtable[i].subsysVendor != 0);
5950 #ifdef CONFIG_FB_SIS_315
5951 if((ivideo->chip == SIS_760) && (ivideo->nbridge)) {
5952 ivideo->lpcdev = pci_get_slot(ivideo->nbridge->bus, (2 << 3));
5956 outSISIDXREG(SISSR, 0x05, 0x86);
5958 if( (!ivideo->sisvga_enabled)
5959 #if !defined(__i386__) && !defined(__x86_64__)
5960 || (sisfb_resetcard)
5963 for(i = 0x30; i <= 0x3f; i++) {
5964 outSISIDXREG(SISCR, i, 0x00);
5968 /* Find out about current video mode */
5969 ivideo->modeprechange = 0x03;
5970 inSISIDXREG(SISCR, 0x34, reg);
5972 ivideo->modeprechange = reg & 0x7f;
5973 } else if(ivideo->sisvga_enabled) {
5974 #if defined(__i386__) || defined(__x86_64__)
5975 unsigned char __iomem *tt = ioremap(0x400, 0x100);
5977 ivideo->modeprechange = readb(tt + 0x49);
5983 /* Search and copy ROM image */
5984 ivideo->bios_abase = NULL;
5985 ivideo->SiS_Pr.VirtualRomBase = NULL;
5986 ivideo->SiS_Pr.UseROM = false;
5987 ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = false;
5988 if(ivideo->sisfb_userom) {
5989 ivideo->SiS_Pr.VirtualRomBase = sisfb_find_rom(pdev);
5990 ivideo->bios_abase = ivideo->SiS_Pr.VirtualRomBase;
5991 ivideo->SiS_Pr.UseROM = (bool)(ivideo->SiS_Pr.VirtualRomBase);
5992 printk(KERN_INFO "sisfb: Video ROM %sfound\n",
5993 ivideo->SiS_Pr.UseROM ? "" : "not ");
5994 if((ivideo->SiS_Pr.UseROM) && (ivideo->chip >= XGI_20)) {
5995 ivideo->SiS_Pr.UseROM = false;
5996 ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = true;
5997 if( (ivideo->revision_id == 2) &&
5998 (!(ivideo->bios_abase[0x1d1] & 0x01)) ) {
5999 ivideo->SiS_Pr.DDCPortMixup = true;
6003 printk(KERN_INFO "sisfb: Video ROM usage disabled\n");
6006 /* Find systems for special custom timing */
6007 if(ivideo->SiS_Pr.SiS_CustomT == CUT_NONE) {
6008 sisfb_detect_custom_timing(ivideo);
6011 /* POST card in case this has not been done by the BIOS */
6012 if( (!ivideo->sisvga_enabled)
6013 #if !defined(__i386__) && !defined(__x86_64__)
6014 || (sisfb_resetcard)
6017 #ifdef CONFIG_FB_SIS_300
6018 if(ivideo->sisvga_engine == SIS_300_VGA) {
6019 if(ivideo->chip == SIS_300) {
6020 sisfb_post_sis300(pdev);
6021 ivideo->sisfb_can_post = 1;
6026 #ifdef CONFIG_FB_SIS_315
6027 if(ivideo->sisvga_engine == SIS_315_VGA) {
6029 /* if((ivideo->chip == SIS_315H) ||
6030 (ivideo->chip == SIS_315) ||
6031 (ivideo->chip == SIS_315PRO) ||
6032 (ivideo->chip == SIS_330)) {
6033 sisfb_post_sis315330(pdev);
6034 } else */ if(ivideo->chip == XGI_20) {
6035 result = sisfb_post_xgi(pdev);
6036 ivideo->sisfb_can_post = 1;
6037 } else if((ivideo->chip == XGI_40) && ivideo->haveXGIROM) {
6038 result = sisfb_post_xgi(pdev);
6039 ivideo->sisfb_can_post = 1;
6041 printk(KERN_INFO "sisfb: Card is not "
6042 "POSTed and sisfb can't do this either.\n");
6045 printk(KERN_ERR "sisfb: Failed to POST card\n");
6053 ivideo->sisfb_card_posted = 1;
6055 /* Find out about RAM size */
6056 if(sisfb_get_dram_size(ivideo)) {
6057 printk(KERN_INFO "sisfb: Fatal error: Unable to determine VRAM size.\n");
6063 /* Enable PCI addressing and MMIO */
6064 if((ivideo->sisfb_mode_idx < 0) ||
6065 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) {
6066 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */
6067 orSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
6068 /* Enable 2D accelerator engine */
6069 orSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
6072 if(sisfb_pdc != 0xff) {
6073 if(ivideo->sisvga_engine == SIS_300_VGA)
6077 ivideo->SiS_Pr.PDC = sisfb_pdc;
6079 #ifdef CONFIG_FB_SIS_315
6080 if(ivideo->sisvga_engine == SIS_315_VGA) {
6081 if(sisfb_pdca != 0xff)
6082 ivideo->SiS_Pr.PDCA = sisfb_pdca & 0x1f;
6086 if(!request_mem_region(ivideo->video_base, ivideo->video_size, "sisfb FB")) {
6087 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve %dMB framebuffer memory\n",
6088 (int)(ivideo->video_size >> 20));
6089 printk(KERN_ERR "sisfb: Is there another framebuffer driver active?\n");
6094 if(!request_mem_region(ivideo->mmio_base, ivideo->mmio_size, "sisfb MMIO")) {
6095 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve MMIO region\n");
6100 ivideo->video_vbase = ioremap(ivideo->video_base, ivideo->video_size);
6101 ivideo->SiS_Pr.VideoMemoryAddress = ivideo->video_vbase;
6102 if(!ivideo->video_vbase) {
6103 printk(KERN_ERR "sisfb: Fatal error: Unable to map framebuffer memory\n");
6108 ivideo->mmio_vbase = ioremap(ivideo->mmio_base, ivideo->mmio_size);
6109 if(!ivideo->mmio_vbase) {
6110 printk(KERN_ERR "sisfb: Fatal error: Unable to map MMIO region\n");
6112 error_0: iounmap(ivideo->video_vbase);
6113 error_1: release_mem_region(ivideo->video_base, ivideo->video_size);
6114 error_2: release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
6115 error_3: vfree(ivideo->bios_abase);
6117 pci_dev_put(ivideo->lpcdev);
6119 pci_dev_put(ivideo->nbridge);
6120 pci_set_drvdata(pdev, NULL);
6121 if(!ivideo->sisvga_enabled)
6122 pci_disable_device(pdev);
6123 framebuffer_release(sis_fb_info);
6127 printk(KERN_INFO "sisfb: Video RAM at 0x%lx, mapped to 0x%lx, size %ldk\n",
6128 ivideo->video_base, (unsigned long)ivideo->video_vbase, ivideo->video_size / 1024);
6130 if(ivideo->video_offset) {
6131 printk(KERN_INFO "sisfb: Viewport offset %ldk\n",
6132 ivideo->video_offset / 1024);
6135 printk(KERN_INFO "sisfb: MMIO at 0x%lx, mapped to 0x%lx, size %ldk\n",
6136 ivideo->mmio_base, (unsigned long)ivideo->mmio_vbase, ivideo->mmio_size / 1024);
6139 /* Determine the size of the command queue */
6140 if(ivideo->sisvga_engine == SIS_300_VGA) {
6141 ivideo->cmdQueueSize = TURBO_QUEUE_AREA_SIZE;
6143 if(ivideo->chip == XGI_20) {
6144 ivideo->cmdQueueSize = COMMAND_QUEUE_AREA_SIZE_Z7;
6146 ivideo->cmdQueueSize = COMMAND_QUEUE_AREA_SIZE;
6150 /* Engines are no longer initialized here; this is
6151 * now done after the first mode-switch (if the
6152 * submitted var has its acceleration flags set).
6155 /* Calculate the base of the (unused) hw cursor */
6156 ivideo->hwcursor_vbase = ivideo->video_vbase
6157 + ivideo->video_size
6158 - ivideo->cmdQueueSize
6159 - ivideo->hwcursor_size;
6160 ivideo->caps |= HW_CURSOR_CAP;
6162 /* Initialize offscreen memory manager */
6163 if((ivideo->havenoheap = sisfb_heap_init(ivideo))) {
6164 printk(KERN_WARNING "sisfb: Failed to initialize offscreen memory heap\n");
6167 /* Used for clearing the screen only, therefore respect our mem limit */
6168 ivideo->SiS_Pr.VideoMemoryAddress += ivideo->video_offset;
6169 ivideo->SiS_Pr.VideoMemorySize = ivideo->sisfb_mem;
6173 ivideo->vbflags = 0;
6174 ivideo->lcddefmodeidx = DEFAULT_LCDMODE;
6175 ivideo->tvdefmodeidx = DEFAULT_TVMODE;
6176 ivideo->defmodeidx = DEFAULT_MODE;
6179 if(ivideo->chip < XGI_20) {
6180 if(ivideo->bios_abase) {
6181 ivideo->newrom = SiSDetermineROMLayout661(&ivideo->SiS_Pr);
6185 if((ivideo->sisfb_mode_idx < 0) ||
6186 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) {
6188 sisfb_sense_crt1(ivideo);
6190 sisfb_get_VB_type(ivideo);
6192 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
6193 sisfb_detect_VB_connect(ivideo);
6196 ivideo->currentvbflags = ivideo->vbflags & (VB_VIDEOBRIDGE | TV_STANDARD);
6198 /* Decide on which CRT2 device to use */
6199 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
6200 if(ivideo->sisfb_crt2type != -1) {
6201 if((ivideo->sisfb_crt2type == CRT2_LCD) &&
6202 (ivideo->vbflags & CRT2_LCD)) {
6203 ivideo->currentvbflags |= CRT2_LCD;
6204 } else if(ivideo->sisfb_crt2type != CRT2_LCD) {
6205 ivideo->currentvbflags |= ivideo->sisfb_crt2type;
6208 /* Chrontel 700x TV detection often unreliable, therefore
6209 * use a different default order on such machines
6211 if((ivideo->sisvga_engine == SIS_300_VGA) &&
6212 (ivideo->vbflags2 & VB2_CHRONTEL)) {
6213 if(ivideo->vbflags & CRT2_LCD)
6214 ivideo->currentvbflags |= CRT2_LCD;
6215 else if(ivideo->vbflags & CRT2_TV)
6216 ivideo->currentvbflags |= CRT2_TV;
6217 else if(ivideo->vbflags & CRT2_VGA)
6218 ivideo->currentvbflags |= CRT2_VGA;
6220 if(ivideo->vbflags & CRT2_TV)
6221 ivideo->currentvbflags |= CRT2_TV;
6222 else if(ivideo->vbflags & CRT2_LCD)
6223 ivideo->currentvbflags |= CRT2_LCD;
6224 else if(ivideo->vbflags & CRT2_VGA)
6225 ivideo->currentvbflags |= CRT2_VGA;
6230 if(ivideo->vbflags & CRT2_LCD) {
6231 sisfb_detect_lcd_type(ivideo);
6234 sisfb_save_pdc_emi(ivideo);
6236 if(!ivideo->sisfb_crt1off) {
6237 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 0);
6239 if((ivideo->vbflags2 & VB2_SISTMDSBRIDGE) &&
6240 (ivideo->vbflags & (CRT2_VGA | CRT2_LCD))) {
6241 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 1);
6245 if(ivideo->sisfb_mode_idx >= 0) {
6246 int bu = ivideo->sisfb_mode_idx;
6247 ivideo->sisfb_mode_idx = sisfb_validate_mode(ivideo,
6248 ivideo->sisfb_mode_idx, ivideo->currentvbflags);
6249 if(bu != ivideo->sisfb_mode_idx) {
6250 printk(KERN_ERR "Mode %dx%dx%d failed validation\n",
6251 sisbios_mode[bu].xres,
6252 sisbios_mode[bu].yres,
6253 sisbios_mode[bu].bpp);
6257 if(ivideo->sisfb_mode_idx < 0) {
6258 switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
6260 ivideo->sisfb_mode_idx = ivideo->lcddefmodeidx;
6263 ivideo->sisfb_mode_idx = ivideo->tvdefmodeidx;
6266 ivideo->sisfb_mode_idx = ivideo->defmodeidx;
6271 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni];
6273 if(ivideo->refresh_rate != 0) {
6274 sisfb_search_refresh_rate(ivideo, ivideo->refresh_rate,
6275 ivideo->sisfb_mode_idx);
6278 if(ivideo->rate_idx == 0) {
6279 ivideo->rate_idx = sisbios_mode[ivideo->sisfb_mode_idx].rate_idx;
6280 ivideo->refresh_rate = 60;
6283 if(ivideo->sisfb_thismonitor.datavalid) {
6284 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor,
6285 ivideo->sisfb_mode_idx,
6287 ivideo->refresh_rate)) {
6288 printk(KERN_INFO "sisfb: WARNING: Refresh rate "
6289 "exceeds monitor specs!\n");
6293 ivideo->video_bpp = sisbios_mode[ivideo->sisfb_mode_idx].bpp;
6294 ivideo->video_width = sisbios_mode[ivideo->sisfb_mode_idx].xres;
6295 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres;
6297 sisfb_set_vparms(ivideo);
6299 printk(KERN_INFO "sisfb: Default mode is %dx%dx%d (%dHz)\n",
6300 ivideo->video_width, ivideo->video_height, ivideo->video_bpp,
6301 ivideo->refresh_rate);
6303 /* Set up the default var according to chosen default display mode */
6304 ivideo->default_var.xres = ivideo->default_var.xres_virtual = ivideo->video_width;
6305 ivideo->default_var.yres = ivideo->default_var.yres_virtual = ivideo->video_height;
6306 ivideo->default_var.bits_per_pixel = ivideo->video_bpp;
6308 sisfb_bpp_to_var(ivideo, &ivideo->default_var);
6310 ivideo->default_var.pixclock = (u32) (1000000000 /
6311 sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr, ivideo->mode_no, ivideo->rate_idx));
6313 if(sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr, ivideo->mode_no,
6314 ivideo->rate_idx, &ivideo->default_var)) {
6315 if((ivideo->default_var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
6316 ivideo->default_var.pixclock <<= 1;
6320 if(ivideo->sisfb_ypan) {
6321 /* Maximize regardless of sisfb_max at startup */
6322 ivideo->default_var.yres_virtual =
6323 sisfb_calc_maxyres(ivideo, &ivideo->default_var);
6324 if(ivideo->default_var.yres_virtual < ivideo->default_var.yres) {
6325 ivideo->default_var.yres_virtual = ivideo->default_var.yres;
6329 sisfb_calc_pitch(ivideo, &ivideo->default_var);
6332 if(ivideo->sisfb_accel) {
6334 #ifdef STUPID_ACCELF_TEXT_SHIT
6335 ivideo->default_var.accel_flags |= FB_ACCELF_TEXT;
6338 sisfb_initaccel(ivideo);
6340 #if defined(FBINFO_HWACCEL_DISABLED) && defined(FBINFO_HWACCEL_XPAN)
6341 sis_fb_info->flags = FBINFO_DEFAULT |
6342 FBINFO_HWACCEL_YPAN |
6343 FBINFO_HWACCEL_XPAN |
6344 FBINFO_HWACCEL_COPYAREA |
6345 FBINFO_HWACCEL_FILLRECT |
6346 ((ivideo->accel) ? 0 : FBINFO_HWACCEL_DISABLED);
6348 sis_fb_info->flags = FBINFO_FLAG_DEFAULT;
6350 sis_fb_info->var = ivideo->default_var;
6351 sis_fb_info->fix = ivideo->sisfb_fix;
6352 sis_fb_info->screen_base = ivideo->video_vbase + ivideo->video_offset;
6353 sis_fb_info->fbops = &sisfb_ops;
6354 sis_fb_info->pseudo_palette = ivideo->pseudo_palette;
6356 fb_alloc_cmap(&sis_fb_info->cmap, 256 , 0);
6358 printk(KERN_DEBUG "sisfb: Initial vbflags 0x%x\n", (int)ivideo->vbflags);
6361 ivideo->mtrr = mtrr_add(ivideo->video_base, ivideo->video_size,
6362 MTRR_TYPE_WRCOMB, 1);
6363 if(ivideo->mtrr < 0) {
6364 printk(KERN_DEBUG "sisfb: Failed to add MTRRs\n");
6368 if(register_framebuffer(sis_fb_info) < 0) {
6369 printk(KERN_ERR "sisfb: Fatal error: Failed to register framebuffer\n");
6371 iounmap(ivideo->mmio_vbase);
6375 ivideo->registered = 1;
6378 ivideo->next = card_list;
6381 printk(KERN_INFO "sisfb: 2D acceleration is %s, y-panning %s\n",
6382 ivideo->sisfb_accel ? "enabled" : "disabled",
6383 ivideo->sisfb_ypan ?
6384 (ivideo->sisfb_max ? "enabled (auto-max)" :
6385 "enabled (no auto-max)") :
6389 printk(KERN_INFO "fb%d: %s frame buffer device version %d.%d.%d\n",
6390 sis_fb_info->node, ivideo->myid, VER_MAJOR, VER_MINOR, VER_LEVEL);
6392 printk(KERN_INFO "sisfb: Copyright (C) 2001-2005 Thomas Winischhofer\n");
6394 } /* if mode = "none" */
6399 /*****************************************************/
6400 /* PCI DEVICE HANDLING */
6401 /*****************************************************/
6403 static void __devexit sisfb_remove(struct pci_dev *pdev)
6405 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
6406 struct fb_info *sis_fb_info = ivideo->memyselfandi;
6407 int registered = ivideo->registered;
6408 int modechanged = ivideo->modechanged;
6411 iounmap(ivideo->mmio_vbase);
6412 iounmap(ivideo->video_vbase);
6414 /* Release mem regions */
6415 release_mem_region(ivideo->video_base, ivideo->video_size);
6416 release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
6418 vfree(ivideo->bios_abase);
6421 pci_dev_put(ivideo->lpcdev);
6424 pci_dev_put(ivideo->nbridge);
6427 /* Release MTRR region */
6428 if(ivideo->mtrr >= 0)
6429 mtrr_del(ivideo->mtrr, ivideo->video_base, ivideo->video_size);
6432 pci_set_drvdata(pdev, NULL);
6434 /* If device was disabled when starting, disable
6437 if(!ivideo->sisvga_enabled)
6438 pci_disable_device(pdev);
6440 /* Unregister the framebuffer */
6441 if(ivideo->registered) {
6442 unregister_framebuffer(sis_fb_info);
6443 framebuffer_release(sis_fb_info);
6446 /* OK, our ivideo is gone for good from here. */
6448 /* TODO: Restore the initial mode
6449 * This sounds easy but is as good as impossible
6450 * on many machines with SiS chip and video bridge
6451 * since text modes are always set up differently
6452 * from machine to machine. Depends on the type
6453 * of integration between chipset and bridge.
6455 if(registered && modechanged)
6457 "sisfb: Restoring of text mode not supported yet\n");
6460 static struct pci_driver sisfb_driver = {
6462 .id_table = sisfb_pci_table,
6463 .probe = sisfb_probe,
6464 .remove = __devexit_p(sisfb_remove)
6467 static int __init sisfb_init(void)
6470 char *options = NULL;
6472 if(fb_get_options("sisfb", &options))
6475 sisfb_setup(options);
6477 return pci_register_driver(&sisfb_driver);
6481 module_init(sisfb_init);
6484 /*****************************************************/
6486 /*****************************************************/
6490 static char *mode = NULL;
6491 static int vesa = -1;
6492 static unsigned int rate = 0;
6493 static unsigned int crt1off = 1;
6494 static unsigned int mem = 0;
6495 static char *forcecrt2type = NULL;
6496 static int forcecrt1 = -1;
6497 static int pdc = -1;
6498 static int pdc1 = -1;
6499 static int noaccel = -1;
6500 static int noypan = -1;
6501 static int nomax = -1;
6502 static int userom = -1;
6503 static int useoem = -1;
6504 static char *tvstandard = NULL;
6505 static int nocrt2rate = 0;
6506 static int scalelcd = -1;
6507 static char *specialtiming = NULL;
6508 static int lvdshl = -1;
6509 static int tvxposoffset = 0, tvyposoffset = 0;
6510 #if !defined(__i386__) && !defined(__x86_64__)
6511 static int resetcard = 0;
6512 static int videoram = 0;
6515 static int __init sisfb_init_module(void)
6517 sisfb_setdefaultparms();
6520 sisfb_parm_rate = rate;
6522 if((scalelcd == 0) || (scalelcd == 1))
6523 sisfb_scalelcd = scalelcd ^ 1;
6525 /* Need to check crt2 type first for fstn/dstn */
6528 sisfb_search_crt2type(forcecrt2type);
6531 sisfb_search_tvstd(tvstandard);
6534 sisfb_search_mode(mode, false);
6536 sisfb_search_vesamode(vesa, false);
6538 sisfb_crt1off = (crt1off == 0) ? 1 : 0;
6540 sisfb_forcecrt1 = forcecrt1;
6543 else if(forcecrt1 == 0)
6548 else if(noaccel == 0)
6553 else if(noypan == 0)
6562 sisfb_parm_mem = mem;
6565 sisfb_userom = userom;
6568 sisfb_useoem = useoem;
6571 sisfb_pdc = (pdc & 0x7f);
6574 sisfb_pdca = (pdc1 & 0x1f);
6576 sisfb_nocrt2rate = nocrt2rate;
6579 sisfb_search_specialtiming(specialtiming);
6581 if((lvdshl >= 0) && (lvdshl <= 3))
6582 sisfb_lvdshl = lvdshl;
6584 sisfb_tvxposoffset = tvxposoffset;
6585 sisfb_tvyposoffset = tvyposoffset;
6587 #if !defined(__i386__) && !defined(__x86_64__)
6588 sisfb_resetcard = (resetcard) ? 1 : 0;
6590 sisfb_videoram = videoram;
6593 return sisfb_init();
6596 static void __exit sisfb_remove_module(void)
6598 pci_unregister_driver(&sisfb_driver);
6599 printk(KERN_DEBUG "sisfb: Module unloaded\n");
6602 module_init(sisfb_init_module);
6603 module_exit(sisfb_remove_module);
6605 MODULE_DESCRIPTION("SiS 300/540/630/730/315/55x/65x/661/74x/330/76x/34x, XGI V3XT/V5/V8/Z7 framebuffer device driver");
6606 MODULE_LICENSE("GPL");
6607 MODULE_AUTHOR("Thomas Winischhofer <thomas@winischhofer.net>, Others");
6609 module_param(mem, int, 0);
6610 module_param(noaccel, int, 0);
6611 module_param(noypan, int, 0);
6612 module_param(nomax, int, 0);
6613 module_param(userom, int, 0);
6614 module_param(useoem, int, 0);
6615 module_param(mode, charp, 0);
6616 module_param(vesa, int, 0);
6617 module_param(rate, int, 0);
6618 module_param(forcecrt1, int, 0);
6619 module_param(forcecrt2type, charp, 0);
6620 module_param(scalelcd, int, 0);
6621 module_param(pdc, int, 0);
6622 module_param(pdc1, int, 0);
6623 module_param(specialtiming, charp, 0);
6624 module_param(lvdshl, int, 0);
6625 module_param(tvstandard, charp, 0);
6626 module_param(tvxposoffset, int, 0);
6627 module_param(tvyposoffset, int, 0);
6628 module_param(nocrt2rate, int, 0);
6629 #if !defined(__i386__) && !defined(__x86_64__)
6630 module_param(resetcard, int, 0);
6631 module_param(videoram, int, 0);
6634 MODULE_PARM_DESC(mem,
6635 "\nDetermines the beginning of the video memory heap in KB. This heap is used\n"
6636 "for video RAM management for eg. DRM/DRI. On 300 series, the default depends\n"
6637 "on the amount of video RAM available. If 8MB of video RAM or less is available,\n"
6638 "the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB,\n"
6639 "otherwise at 12288KB. On 315/330/340 series, the heap size is 32KB by default.\n"
6640 "The value is to be specified without 'KB'.\n");
6642 MODULE_PARM_DESC(noaccel,
6643 "\nIf set to anything other than 0, 2D acceleration will be disabled.\n"
6646 MODULE_PARM_DESC(noypan,
6647 "\nIf set to anything other than 0, y-panning will be disabled and scrolling\n"
6648 "will be performed by redrawing the screen. (default: 0)\n");
6650 MODULE_PARM_DESC(nomax,
6651 "\nIf y-panning is enabled, sisfb will by default use the entire available video\n"
6652 "memory for the virtual screen in order to optimize scrolling performance. If\n"
6653 "this is set to anything other than 0, sisfb will not do this and thereby \n"
6654 "enable the user to positively specify a virtual Y size of the screen using\n"
6655 "fbset. (default: 0)\n");
6657 MODULE_PARM_DESC(mode,
6658 "\nSelects the desired default display mode in the format XxYxDepth,\n"
6659 "eg. 1024x768x16. Other formats supported include XxY-Depth and\n"
6660 "XxY-Depth@Rate. If the parameter is only one (decimal or hexadecimal)\n"
6661 "number, it will be interpreted as a VESA mode number. (default: 800x600x8)\n");
6663 MODULE_PARM_DESC(vesa,
6664 "\nSelects the desired default display mode by VESA defined mode number, eg.\n"
6665 "0x117 (default: 0x0103)\n");
6667 MODULE_PARM_DESC(rate,
6668 "\nSelects the desired vertical refresh rate for CRT1 (external VGA) in Hz.\n"
6669 "If the mode is specified in the format XxY-Depth@Rate, this parameter\n"
6670 "will be ignored (default: 60)\n");
6672 MODULE_PARM_DESC(forcecrt1,
6673 "\nNormally, the driver autodetects whether or not CRT1 (external VGA) is \n"
6674 "connected. With this option, the detection can be overridden (1=CRT1 ON,\n"
6675 "0=CRT1 OFF) (default: [autodetected])\n");
6677 MODULE_PARM_DESC(forcecrt2type,
6678 "\nIf this option is omitted, the driver autodetects CRT2 output devices, such as\n"
6679 "LCD, TV or secondary VGA. With this option, this autodetection can be\n"
6680 "overridden. Possible parameters are LCD, TV, VGA or NONE. NONE disables CRT2.\n"
6681 "On systems with a SiS video bridge, parameters SVIDEO, COMPOSITE or SCART can\n"
6682 "be used instead of TV to override the TV detection. Furthermore, on systems\n"
6683 "with a SiS video bridge, SVIDEO+COMPOSITE, HIVISION, YPBPR480I, YPBPR480P,\n"
6684 "YPBPR720P and YPBPR1080I are understood. However, whether or not these work\n"
6685 "depends on the very hardware in use. (default: [autodetected])\n");
6687 MODULE_PARM_DESC(scalelcd,
6688 "\nSetting this to 1 will force the driver to scale the LCD image to the panel's\n"
6689 "native resolution. Setting it to 0 will disable scaling; LVDS panels will\n"
6690 "show black bars around the image, TMDS panels will probably do the scaling\n"
6691 "themselves. Default: 1 on LVDS panels, 0 on TMDS panels\n");
6693 MODULE_PARM_DESC(pdc,
6694 "\nThis is for manually selecting the LCD panel delay compensation. The driver\n"
6695 "should detect this correctly in most cases; however, sometimes this is not\n"
6696 "possible. If you see 'small waves' on the LCD, try setting this to 4, 32 or 24\n"
6697 "on a 300 series chipset; 6 on other chipsets. If the problem persists, try\n"
6698 "other values (on 300 series: between 4 and 60 in steps of 4; otherwise: any\n"
6699 "value from 0 to 31). (default: autodetected, if LCD is active during start)\n");
6701 #ifdef CONFIG_FB_SIS_315
6702 MODULE_PARM_DESC(pdc1,
6703 "\nThis is same as pdc, but for LCD-via CRT1. Hence, this is for the 315/330/340\n"
6704 "series only. (default: autodetected if LCD is in LCD-via-CRT1 mode during\n"
6705 "startup) - Note: currently, this has no effect because LCD-via-CRT1 is not\n"
6706 "implemented yet.\n");
6709 MODULE_PARM_DESC(specialtiming,
6710 "\nPlease refer to documentation for more information on this option.\n");
6712 MODULE_PARM_DESC(lvdshl,
6713 "\nPlease refer to documentation for more information on this option.\n");
6715 MODULE_PARM_DESC(tvstandard,
6716 "\nThis allows overriding the BIOS default for the TV standard. Valid choices are\n"
6717 "pal, ntsc, palm and paln. (default: [auto; pal or ntsc only])\n");
6719 MODULE_PARM_DESC(tvxposoffset,
6720 "\nRelocate TV output horizontally. Possible parameters: -32 through 32.\n"
6723 MODULE_PARM_DESC(tvyposoffset,
6724 "\nRelocate TV output vertically. Possible parameters: -32 through 32.\n"
6727 MODULE_PARM_DESC(nocrt2rate,
6728 "\nSetting this to 1 will force the driver to use the default refresh rate for\n"
6729 "CRT2 if CRT2 type is VGA. (default: 0, use same rate as CRT1)\n");
6731 #if !defined(__i386__) && !defined(__x86_64__)
6732 #ifdef CONFIG_FB_SIS_300
6733 MODULE_PARM_DESC(resetcard,
6734 "\nSet this to 1 in order to reset (POST) the card on non-x86 machines where\n"
6735 "the BIOS did not POST the card (only supported for SiS 300/305 and XGI cards\n"
6736 "currently). Default: 0\n");
6738 MODULE_PARM_DESC(videoram,
6739 "\nSet this to the amount of video RAM (in kilobyte) the card has. Required on\n"
6740 "some non-x86 architectures where the memory auto detection fails. Only\n"
6741 "relevant if resetcard is set, too. SiS300/305 only. Default: [auto-detect]\n");
6745 #endif /* /MODULE */
6747 /* _GPL only for new symbols. */
6748 EXPORT_SYMBOL(sis_malloc);
6749 EXPORT_SYMBOL(sis_free);
6750 EXPORT_SYMBOL_GPL(sis_malloc_new);
6751 EXPORT_SYMBOL_GPL(sis_free_new);