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1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/init.h>
34
35 #include <net/mac80211.h>
36
37 #include "iwl-eeprom.h"
38 #include "iwl-dev.h"
39 #include "iwl-core.h"
40 #include "iwl-io.h"
41 #include "iwl-commands.h"
42 #include "iwl-debug.h"
43 #include "iwl-power.h"
44
45 /*
46  * Setting power level allows the card to go to sleep when not busy.
47  *
48  * We calculate a sleep command based on the required latency, which
49  * we get from mac80211. In order to handle thermal throttling, we can
50  * also use pre-defined power levels.
51  */
52
53 /*
54  * For now, keep using power level 1 instead of automatically
55  * adjusting ...
56  */
57 bool no_sleep_autoadjust = true;
58 module_param(no_sleep_autoadjust, bool, S_IRUGO);
59 MODULE_PARM_DESC(no_sleep_autoadjust,
60                  "don't automatically adjust sleep level "
61                  "according to maximum network latency");
62
63 /*
64  * This defines the old power levels. They are still used by default
65  * (level 1) and for thermal throttle (levels 3 through 5)
66  */
67
68 struct iwl_power_vec_entry {
69         struct iwl_powertable_cmd cmd;
70         u8 no_dtim;     /* number of skip dtim */
71 };
72
73 #define IWL_DTIM_RANGE_0_MAX    2
74 #define IWL_DTIM_RANGE_1_MAX    10
75
76 #define NOSLP cpu_to_le16(0), 0, 0
77 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
78 #define TU_TO_USEC 1024
79 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
80 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
81                                      cpu_to_le32(X1), \
82                                      cpu_to_le32(X2), \
83                                      cpu_to_le32(X3), \
84                                      cpu_to_le32(X4)}
85 /* default power management (not Tx power) table values */
86 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
87 /* DTIM 0 - 2 */
88 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
89         {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
90         {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
91         {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
92         {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
93         {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
94 };
95
96
97 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
98 /* DTIM 3 - 10 */
99 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
100         {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
101         {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
102         {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
103         {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
104         {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
105 };
106
107 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
108 /* DTIM 11 - */
109 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
110         {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
111         {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
112         {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
113         {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
114         {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
115 };
116
117 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
118                                  struct iwl_powertable_cmd *cmd,
119                                  enum iwl_power_level lvl, int period)
120 {
121         const struct iwl_power_vec_entry *table;
122         int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
123         int i;
124         u8 skip;
125         u32 slp_itrvl;
126
127         table = range_2;
128         if (period <= IWL_DTIM_RANGE_1_MAX)
129                 table = range_1;
130         if (period <= IWL_DTIM_RANGE_0_MAX)
131                 table = range_0;
132
133         BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM);
134
135         *cmd = table[lvl].cmd;
136
137         if (period == 0) {
138                 skip = 0;
139                 period = 1;
140                 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
141                         max_sleep[i] =  1;
142
143         } else {
144                 skip = table[lvl].no_dtim;
145                 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
146                         max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
147                 max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
148         }
149
150         slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
151         /* figure out the listen interval based on dtim period and skip */
152         if (slp_itrvl == 0xFF)
153                 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
154                         cpu_to_le32(period * (skip + 1));
155
156         slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
157         if (slp_itrvl > period)
158                 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
159                         cpu_to_le32((slp_itrvl / period) * period);
160
161         if (skip)
162                 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
163         else
164                 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
165
166         slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
167         if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
168                 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
169                         cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
170
171         /* enforce max sleep interval */
172         for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
173                 if (le32_to_cpu(cmd->sleep_interval[i]) >
174                     (max_sleep[i] * period))
175                         cmd->sleep_interval[i] =
176                                 cpu_to_le32(max_sleep[i] * period);
177                 if (i != (IWL_POWER_VEC_SIZE - 1)) {
178                         if (le32_to_cpu(cmd->sleep_interval[i]) >
179                             le32_to_cpu(cmd->sleep_interval[i+1]))
180                                 cmd->sleep_interval[i] =
181                                         cmd->sleep_interval[i+1];
182                 }
183         }
184
185         if (priv->power_data.pci_pm)
186                 cmd->flags |= IWL_POWER_PCI_PM_MSK;
187         else
188                 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
189
190         IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
191                         skip, period);
192         IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
193 }
194
195 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
196                                     struct iwl_powertable_cmd *cmd)
197 {
198         memset(cmd, 0, sizeof(*cmd));
199
200         if (priv->power_data.pci_pm)
201                 cmd->flags |= IWL_POWER_PCI_PM_MSK;
202
203         IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
204 }
205
206 static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv,
207                                      struct iwl_powertable_cmd *cmd,
208                                      int dynps_ms, int wakeup_period)
209 {
210         /*
211          * These are the original power level 3 sleep successions. The
212          * device may behave better with such succession and was also
213          * only tested with that. Just like the original sleep commands,
214          * also adjust the succession here to the wakeup_period below.
215          * The ranges are the same as for the sleep commands, 0-2, 3-9
216          * and >10, which is selected based on the DTIM interval for
217          * the sleep index but here we use the wakeup period since that
218          * is what we need to do for the latency requirements.
219          */
220         static const u8 slp_succ_r0[IWL_POWER_VEC_SIZE] = { 2, 2, 2, 2, 2 };
221         static const u8 slp_succ_r1[IWL_POWER_VEC_SIZE] = { 2, 4, 6, 7, 9 };
222         static const u8 slp_succ_r2[IWL_POWER_VEC_SIZE] = { 2, 7, 9, 9, 0xFF };
223         const u8 *slp_succ = slp_succ_r0;
224         int i;
225
226         if (wakeup_period > IWL_DTIM_RANGE_0_MAX)
227                 slp_succ = slp_succ_r1;
228         if (wakeup_period > IWL_DTIM_RANGE_1_MAX)
229                 slp_succ = slp_succ_r2;
230
231         memset(cmd, 0, sizeof(*cmd));
232
233         cmd->flags = IWL_POWER_DRIVER_ALLOW_SLEEP_MSK |
234                      IWL_POWER_FAST_PD; /* no use seeing frames for others */
235
236         if (priv->power_data.pci_pm)
237                 cmd->flags |= IWL_POWER_PCI_PM_MSK;
238
239         cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms);
240         cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms);
241
242         for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
243                 cmd->sleep_interval[i] =
244                         cpu_to_le32(min_t(int, slp_succ[i], wakeup_period));
245
246         IWL_DEBUG_POWER(priv, "Automatic sleep command\n");
247 }
248
249 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
250 {
251         IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
252         IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
253         IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
254         IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
255         IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
256                         le32_to_cpu(cmd->sleep_interval[0]),
257                         le32_to_cpu(cmd->sleep_interval[1]),
258                         le32_to_cpu(cmd->sleep_interval[2]),
259                         le32_to_cpu(cmd->sleep_interval[3]),
260                         le32_to_cpu(cmd->sleep_interval[4]));
261
262         return iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
263                                 sizeof(struct iwl_powertable_cmd), cmd);
264 }
265
266 /* priv->mutex must be held */
267 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
268 {
269         int ret = 0;
270         bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
271         bool update_chains;
272         struct iwl_powertable_cmd cmd;
273         int dtimper;
274
275         /* Don't update the RX chain when chain noise calibration is running */
276         update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
277                         priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
278
279         dtimper = priv->hw->conf.ps_dtim_period ?: 1;
280
281         if (priv->cfg->base_params->broken_powersave)
282                 iwl_power_sleep_cam_cmd(priv, &cmd);
283         else if (priv->cfg->base_params->supports_idle &&
284                  priv->hw->conf.flags & IEEE80211_CONF_IDLE)
285                 iwl_static_sleep_cmd(priv, &cmd, IWL_POWER_INDEX_5, 20);
286         else if (priv->cfg->ops->lib->tt_ops.lower_power_detection &&
287                  priv->cfg->ops->lib->tt_ops.tt_power_mode &&
288                  priv->cfg->ops->lib->tt_ops.lower_power_detection(priv)) {
289                 /* in thermal throttling low power state */
290                 iwl_static_sleep_cmd(priv, &cmd,
291                     priv->cfg->ops->lib->tt_ops.tt_power_mode(priv), dtimper);
292         } else if (!enabled)
293                 iwl_power_sleep_cam_cmd(priv, &cmd);
294         else if (priv->power_data.debug_sleep_level_override >= 0)
295                 iwl_static_sleep_cmd(priv, &cmd,
296                                      priv->power_data.debug_sleep_level_override,
297                                      dtimper);
298         else if (no_sleep_autoadjust)
299                 iwl_static_sleep_cmd(priv, &cmd, IWL_POWER_INDEX_1, dtimper);
300         else
301                 iwl_power_fill_sleep_cmd(priv, &cmd,
302                                          priv->hw->conf.dynamic_ps_timeout,
303                                          priv->hw->conf.max_sleep_period);
304
305         if (iwl_is_ready_rf(priv) &&
306             (memcmp(&priv->power_data.sleep_cmd, &cmd, sizeof(cmd)) || force)) {
307                 if (cmd.flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
308                         set_bit(STATUS_POWER_PMI, &priv->status);
309
310                 ret = iwl_set_power(priv, &cmd);
311                 if (!ret) {
312                         if (!(cmd.flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
313                                 clear_bit(STATUS_POWER_PMI, &priv->status);
314
315                         if (priv->cfg->ops->lib->update_chain_flags &&
316                             update_chains)
317                                 priv->cfg->ops->lib->update_chain_flags(priv);
318                         else if (priv->cfg->ops->lib->update_chain_flags)
319                                 IWL_DEBUG_POWER(priv,
320                                         "Cannot update the power, chain noise "
321                                         "calibration running: %d\n",
322                                         priv->chain_noise_data.state);
323                         memcpy(&priv->power_data.sleep_cmd, &cmd, sizeof(cmd));
324                 } else
325                         IWL_ERR(priv, "set power fail, ret = %d", ret);
326         }
327
328         return ret;
329 }
330 EXPORT_SYMBOL(iwl_power_update_mode);
331
332 /* initialize to default */
333 void iwl_power_initialize(struct iwl_priv *priv)
334 {
335         u16 lctl = iwl_pcie_link_ctl(priv);
336
337         priv->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
338
339         priv->power_data.debug_sleep_level_override = -1;
340
341         memset(&priv->power_data.sleep_cmd, 0,
342                 sizeof(priv->power_data.sleep_cmd));
343 }
344 EXPORT_SYMBOL(iwl_power_initialize);