drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  23                                                int mindelta, int main_rssi_avg,
  24                                                int alt_rssi_avg, int pkt_count)
  25 {
  26         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  27                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  28                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  29 }
  30
  31 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  32 {
  33         return sc->ps_enabled &&
  34                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  35 }
  36
  37 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  38                                              struct ieee80211_hdr *hdr)
  39 {
  40         struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  41         int i;
  42
  43         spin_lock_bh(&sc->wiphy_lock);
  44         for (i = 0; i < sc->num_sec_wiphy; i++) {
  45                 struct ath_wiphy *aphy = sc->sec_wiphy[i];
  46                 if (aphy == NULL)
  47                         continue;
  48                 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  49                     == 0) {
  50                         hw = aphy->hw;
  51                         break;
  52                 }
  53         }
  54         spin_unlock_bh(&sc->wiphy_lock);
  55         return hw;
  56 }
  57
  58 /*
  59  * Setup and link descriptors.
  60  *
  61  * 11N: we can no longer afford to self link the last descriptor.
  62  * MAC acknowledges BA status as long as it copies frames to host
  63  * buffer (or rx fifo). This can incorrectly acknowledge packets
  64  * to a sender if last desc is self-linked.
  65  */
  66 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  67 {
  68         struct ath_hw *ah = sc->sc_ah;
  69         struct ath_common *common = ath9k_hw_common(ah);
  70         struct ath_desc *ds;
  71         struct sk_buff *skb;
  72
  73         ATH_RXBUF_RESET(bf);
  74
  75         ds = bf->bf_desc;
  76         ds->ds_link = 0; /* link to null */
  77         ds->ds_data = bf->bf_buf_addr;
  78
  79         /* virtual addr of the beginning of the buffer. */
  80         skb = bf->bf_mpdu;
  81         BUG_ON(skb == NULL);
  82         ds->ds_vdata = skb->data;
  83
  84         /*
  85          * setup rx descriptors. The rx_bufsize here tells the hardware
  86          * how much data it can DMA to us and that we are prepared
  87          * to process
  88          */
  89         ath9k_hw_setuprxdesc(ah, ds,
  90                              common->rx_bufsize,
  91                              0);
  92
  93         if (sc->rx.rxlink == NULL)
  94                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  95         else
  96                 *sc->rx.rxlink = bf->bf_daddr;
  97
  98         sc->rx.rxlink = &ds->ds_link;
  99         ath9k_hw_rxena(ah);
 100 }
 101
 102 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 103 {
 104         /* XXX block beacon interrupts */
 105         ath9k_hw_setantenna(sc->sc_ah, antenna);
 106         sc->rx.defant = antenna;
 107         sc->rx.rxotherant = 0;
 108 }
 109
 110 static void ath_opmode_init(struct ath_softc *sc)
 111 {
 112         struct ath_hw *ah = sc->sc_ah;
 113         struct ath_common *common = ath9k_hw_common(ah);
 114
 115         u32 rfilt, mfilt[2];
 116
 117         /* configure rx filter */
 118         rfilt = ath_calcrxfilter(sc);
 119         ath9k_hw_setrxfilter(ah, rfilt);
 120
 121         /* configure bssid mask */
 122         ath_hw_setbssidmask(common);
 123
 124         /* configure operational mode */
 125         ath9k_hw_setopmode(ah);
 126
 127         /* calculate and install multicast filter */
 128         mfilt[0] = mfilt[1] = ~0;
 129         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 130 }
 131
 132 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 133                                  enum ath9k_rx_qtype qtype)
 134 {
 135         struct ath_hw *ah = sc->sc_ah;
 136         struct ath_rx_edma *rx_edma;
 137         struct sk_buff *skb;
 138         struct ath_buf *bf;
 139
 140         rx_edma = &sc->rx.rx_edma[qtype];
 141         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 142                 return false;
 143
 144         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 145         list_del_init(&bf->list);
 146
 147         skb = bf->bf_mpdu;
 148
 149         ATH_RXBUF_RESET(bf);
 150         memset(skb->data, 0, ah->caps.rx_status_len);
 151         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 152                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 153
 154         SKB_CB_ATHBUF(skb) = bf;
 155         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 156         skb_queue_tail(&rx_edma->rx_fifo, skb);
 157
 158         return true;
 159 }
 160
 161 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 162                                   enum ath9k_rx_qtype qtype, int size)
 163 {
 164         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 165         u32 nbuf = 0;
 166
 167         if (list_empty(&sc->rx.rxbuf)) {
 168                 ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 169                 return;
 170         }
 171
 172         while (!list_empty(&sc->rx.rxbuf)) {
 173                 nbuf++;
 174
 175                 if (!ath_rx_edma_buf_link(sc, qtype))
 176                         break;
 177
 178                 if (nbuf >= size)
 179                         break;
 180         }
 181 }
 182
 183 static void ath_rx_remove_buffer(struct ath_softc *sc,
 184                                  enum ath9k_rx_qtype qtype)
 185 {
 186         struct ath_buf *bf;
 187         struct ath_rx_edma *rx_edma;
 188         struct sk_buff *skb;
 189
 190         rx_edma = &sc->rx.rx_edma[qtype];
 191
 192         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 193                 bf = SKB_CB_ATHBUF(skb);
 194                 BUG_ON(!bf);
 195                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 196         }
 197 }
 198
 199 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 200 {
 201         struct ath_buf *bf;
 202
 203         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 204         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 205
 206         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 207                 if (bf->bf_mpdu)
 208                         dev_kfree_skb_any(bf->bf_mpdu);
 209         }
 210
 211         INIT_LIST_HEAD(&sc->rx.rxbuf);
 212
 213         kfree(sc->rx.rx_bufptr);
 214         sc->rx.rx_bufptr = NULL;
 215 }
 216
 217 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 218 {
 219         skb_queue_head_init(&rx_edma->rx_fifo);
 220         skb_queue_head_init(&rx_edma->rx_buffers);
 221         rx_edma->rx_fifo_hwsize = size;
 222 }
 223
 224 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 225 {
 226         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 227         struct ath_hw *ah = sc->sc_ah;
 228         struct sk_buff *skb;
 229         struct ath_buf *bf;
 230         int error = 0, i;
 231         u32 size;
 232
 233
 234         common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN +
 235                                      ah->caps.rx_status_len,
 236                                      min(common->cachelsz, (u16)64));
 237
 238         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 239                                     ah->caps.rx_status_len);
 240
 241         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 242                                ah->caps.rx_lp_qdepth);
 243         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 244                                ah->caps.rx_hp_qdepth);
 245
 246         size = sizeof(struct ath_buf) * nbufs;
 247         bf = kzalloc(size, GFP_KERNEL);
 248         if (!bf)
 249                 return -ENOMEM;
 250
 251         INIT_LIST_HEAD(&sc->rx.rxbuf);
 252         sc->rx.rx_bufptr = bf;
 253
 254         for (i = 0; i < nbufs; i++, bf++) {
 255                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 256                 if (!skb) {
 257                         error = -ENOMEM;
 258                         goto rx_init_fail;
 259                 }
 260
 261                 memset(skb->data, 0, common->rx_bufsize);
 262                 bf->bf_mpdu = skb;
 263
 264                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 265                                                  common->rx_bufsize,
 266                                                  DMA_BIDIRECTIONAL);
 267                 if (unlikely(dma_mapping_error(sc->dev,
 268                                                 bf->bf_buf_addr))) {
 269                                 dev_kfree_skb_any(skb);
 270                                 bf->bf_mpdu = NULL;
 271                                 bf->bf_buf_addr = 0;
 272                                 ath_print(common, ATH_DBG_FATAL,
 273                                         "dma_mapping_error() on RX init\n");
 274                                 error = -ENOMEM;
 275                                 goto rx_init_fail;
 276                 }
 277
 278                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 279         }
 280
 281         return 0;
 282
 283 rx_init_fail:
 284         ath_rx_edma_cleanup(sc);
 285         return error;
 286 }
 287
 288 static void ath_edma_start_recv(struct ath_softc *sc)
 289 {
 290         spin_lock_bh(&sc->rx.rxbuflock);
 291
 292         ath9k_hw_rxena(sc->sc_ah);
 293
 294         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 295                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 296
 297         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 298                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 299
 300         ath_opmode_init(sc);
 301
 302         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 303
 304         spin_unlock_bh(&sc->rx.rxbuflock);
 305 }
 306
 307 static void ath_edma_stop_recv(struct ath_softc *sc)
 308 {
 309         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 311 }
 312
 313 int ath_rx_init(struct ath_softc *sc, int nbufs)
 314 {
 315         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 316         struct sk_buff *skb;
 317         struct ath_buf *bf;
 318         int error = 0;
 319
 320         spin_lock_init(&sc->rx.pcu_lock);
 321         sc->sc_flags &= ~SC_OP_RXFLUSH;
 322         spin_lock_init(&sc->rx.rxbuflock);
 323
 324         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 325                 return ath_rx_edma_init(sc, nbufs);
 326         } else {
 327                 common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
 328                                 min(common->cachelsz, (u16)64));
 329
 330                 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 331                                 common->cachelsz, common->rx_bufsize);
 332
 333                 /* Initialize rx descriptors */
 334
 335                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 336                                 "rx", nbufs, 1, 0);
 337                 if (error != 0) {
 338                         ath_print(common, ATH_DBG_FATAL,
 339                                   "failed to allocate rx descriptors: %d\n",
 340                                   error);
 341                         goto err;
 342                 }
 343
 344                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 345                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 346                                               GFP_KERNEL);
 347                         if (skb == NULL) {
 348                                 error = -ENOMEM;
 349                                 goto err;
 350                         }
 351
 352                         bf->bf_mpdu = skb;
 353                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 354                                         common->rx_bufsize,
 355                                         DMA_FROM_DEVICE);
 356                         if (unlikely(dma_mapping_error(sc->dev,
 357                                                         bf->bf_buf_addr))) {
 358                                 dev_kfree_skb_any(skb);
 359                                 bf->bf_mpdu = NULL;
 360                                 bf->bf_buf_addr = 0;
 361                                 ath_print(common, ATH_DBG_FATAL,
 362                                           "dma_mapping_error() on RX init\n");
 363                                 error = -ENOMEM;
 364                                 goto err;
 365                         }
 366                 }
 367                 sc->rx.rxlink = NULL;
 368         }
 369
 370 err:
 371         if (error)
 372                 ath_rx_cleanup(sc);
 373
 374         return error;
 375 }
 376
 377 void ath_rx_cleanup(struct ath_softc *sc)
 378 {
 379         struct ath_hw *ah = sc->sc_ah;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         struct sk_buff *skb;
 382         struct ath_buf *bf;
 383
 384         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 385                 ath_rx_edma_cleanup(sc);
 386                 return;
 387         } else {
 388                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 389                         skb = bf->bf_mpdu;
 390                         if (skb) {
 391                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 392                                                 common->rx_bufsize,
 393                                                 DMA_FROM_DEVICE);
 394                                 dev_kfree_skb(skb);
 395                                 bf->bf_buf_addr = 0;
 396                                 bf->bf_mpdu = NULL;
 397                         }
 398                 }
 399
 400                 if (sc->rx.rxdma.dd_desc_len != 0)
 401                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 402         }
 403 }
 404
 405 /*
 406  * Calculate the receive filter according to the
 407  * operating mode and state:
 408  *
 409  * o always accept unicast, broadcast, and multicast traffic
 410  * o maintain current state of phy error reception (the hal
 411  *   may enable phy error frames for noise immunity work)
 412  * o probe request frames are accepted only when operating in
 413  *   hostap, adhoc, or monitor modes
 414  * o enable promiscuous mode according to the interface state
 415  * o accept beacons:
 416  *   - when operating in adhoc mode so the 802.11 layer creates
 417  *     node table entries for peers,
 418  *   - when operating in station mode for collecting rssi data when
 419  *     the station is otherwise quiet, or
 420  *   - when operating as a repeater so we see repeater-sta beacons
 421  *   - when scanning
 422  */
 423
 424 u32 ath_calcrxfilter(struct ath_softc *sc)
 425 {
 426 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 427
 428         u32 rfilt;
 429
 430         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
 431                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 432                 | ATH9K_RX_FILTER_MCAST;
 433
 434         if (sc->rx.rxfilter & FIF_PROBE_REQ)
 435                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 436
 437         /*
 438          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 439          * mode interface or when in monitor mode. AP mode does not need this
 440          * since it receives all in-BSS frames anyway.
 441          */
 442         if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
 443              (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
 444             (sc->sc_ah->is_monitoring))
 445                 rfilt |= ATH9K_RX_FILTER_PROM;
 446
 447         if (sc->rx.rxfilter & FIF_CONTROL)
 448                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 449
 450         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 451             (sc->nvifs <= 1) &&
 452             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 453                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 454         else
 455                 rfilt |= ATH9K_RX_FILTER_BEACON;
 456
 457         if ((AR_SREV_9280_20_OR_LATER(sc->sc_ah) ||
 458             AR_SREV_9285_12_OR_LATER(sc->sc_ah)) &&
 459             (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
 460             (sc->rx.rxfilter & FIF_PSPOLL))
 461                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 462
 463         if (conf_is_ht(&sc->hw->conf))
 464                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 465
 466         if (sc->sec_wiphy || (sc->nvifs > 1) ||
 467             (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 468                 /* The following may also be needed for other older chips */
 469                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 470                         rfilt |= ATH9K_RX_FILTER_PROM;
 471                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 472         }
 473
 474         return rfilt;
 475
 476 #undef RX_FILTER_PRESERVE
 477 }
 478
 479 int ath_startrecv(struct ath_softc *sc)
 480 {
 481         struct ath_hw *ah = sc->sc_ah;
 482         struct ath_buf *bf, *tbf;
 483
 484         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 485                 ath_edma_start_recv(sc);
 486                 return 0;
 487         }
 488
 489         spin_lock_bh(&sc->rx.rxbuflock);
 490         if (list_empty(&sc->rx.rxbuf))
 491                 goto start_recv;
 492
 493         sc->rx.rxlink = NULL;
 494         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 495                 ath_rx_buf_link(sc, bf);
 496         }
 497
 498         /* We could have deleted elements so the list may be empty now */
 499         if (list_empty(&sc->rx.rxbuf))
 500                 goto start_recv;
 501
 502         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 503         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 504         ath9k_hw_rxena(ah);
 505
 506 start_recv:
 507         ath_opmode_init(sc);
 508         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 509
 510         spin_unlock_bh(&sc->rx.rxbuflock);
 511
 512         return 0;
 513 }
 514
 515 bool ath_stoprecv(struct ath_softc *sc)
 516 {
 517         struct ath_hw *ah = sc->sc_ah;
 518         bool stopped;
 519
 520         spin_lock_bh(&sc->rx.rxbuflock);
 521         ath9k_hw_abortpcurecv(ah);
 522         ath9k_hw_setrxfilter(ah, 0);
 523         stopped = ath9k_hw_stopdmarecv(ah);
 524
 525         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 526                 ath_edma_stop_recv(sc);
 527         else
 528                 sc->rx.rxlink = NULL;
 529         spin_unlock_bh(&sc->rx.rxbuflock);
 530
 531         return stopped;
 532 }
 533
 534 void ath_flushrecv(struct ath_softc *sc)
 535 {
 536         sc->sc_flags |= SC_OP_RXFLUSH;
 537         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 538                 ath_rx_tasklet(sc, 1, true);
 539         ath_rx_tasklet(sc, 1, false);
 540         sc->sc_flags &= ~SC_OP_RXFLUSH;
 541 }
 542
 543 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 544 {
 545         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 546         struct ieee80211_mgmt *mgmt;
 547         u8 *pos, *end, id, elen;
 548         struct ieee80211_tim_ie *tim;
 549
 550         mgmt = (struct ieee80211_mgmt *)skb->data;
 551         pos = mgmt->u.beacon.variable;
 552         end = skb->data + skb->len;
 553
 554         while (pos + 2 < end) {
 555                 id = *pos++;
 556                 elen = *pos++;
 557                 if (pos + elen > end)
 558                         break;
 559
 560                 if (id == WLAN_EID_TIM) {
 561                         if (elen < sizeof(*tim))
 562                                 break;
 563                         tim = (struct ieee80211_tim_ie *) pos;
 564                         if (tim->dtim_count != 0)
 565                                 break;
 566                         return tim->bitmap_ctrl & 0x01;
 567                 }
 568
 569                 pos += elen;
 570         }
 571
 572         return false;
 573 }
 574
 575 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 576 {
 577         struct ieee80211_mgmt *mgmt;
 578         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 579
 580         if (skb->len < 24 + 8 + 2 + 2)
 581                 return;
 582
 583         mgmt = (struct ieee80211_mgmt *)skb->data;
 584         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
 585                 return; /* not from our current AP */
 586
 587         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 588
 589         if (sc->ps_flags & PS_BEACON_SYNC) {
 590                 sc->ps_flags &= ~PS_BEACON_SYNC;
 591                 ath_print(common, ATH_DBG_PS,
 592                           "Reconfigure Beacon timers based on "
 593                           "timestamp from the AP\n");
 594                 ath_beacon_config(sc, NULL);
 595         }
 596
 597         if (ath_beacon_dtim_pending_cab(skb)) {
 598                 /*
 599                  * Remain awake waiting for buffered broadcast/multicast
 600                  * frames. If the last broadcast/multicast frame is not
 601                  * received properly, the next beacon frame will work as
 602                  * a backup trigger for returning into NETWORK SLEEP state,
 603                  * so we are waiting for it as well.
 604                  */
 605                 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
 606                           "buffered broadcast/multicast frame(s)\n");
 607                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 608                 return;
 609         }
 610
 611         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 612                 /*
 613                  * This can happen if a broadcast frame is dropped or the AP
 614                  * fails to send a frame indicating that all CAB frames have
 615                  * been delivered.
 616                  */
 617                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 618                 ath_print(common, ATH_DBG_PS,
 619                           "PS wait for CAB frames timed out\n");
 620         }
 621 }
 622
 623 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 624 {
 625         struct ieee80211_hdr *hdr;
 626         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 627
 628         hdr = (struct ieee80211_hdr *)skb->data;
 629
 630         /* Process Beacon and CAB receive in PS state */
 631         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 632             && ieee80211_is_beacon(hdr->frame_control))
 633                 ath_rx_ps_beacon(sc, skb);
 634         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 635                  (ieee80211_is_data(hdr->frame_control) ||
 636                   ieee80211_is_action(hdr->frame_control)) &&
 637                  is_multicast_ether_addr(hdr->addr1) &&
 638                  !ieee80211_has_moredata(hdr->frame_control)) {
 639                 /*
 640                  * No more broadcast/multicast frames to be received at this
 641                  * point.
 642                  */
 643                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
 644                 ath_print(common, ATH_DBG_PS,
 645                           "All PS CAB frames received, back to sleep\n");
 646         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 647                    !is_multicast_ether_addr(hdr->addr1) &&
 648                    !ieee80211_has_morefrags(hdr->frame_control)) {
 649                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 650                 ath_print(common, ATH_DBG_PS,
 651                           "Going back to sleep after having received "
 652                           "PS-Poll data (0x%lx)\n",
 653                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 654                                         PS_WAIT_FOR_CAB |
 655                                         PS_WAIT_FOR_PSPOLL_DATA |
 656                                         PS_WAIT_FOR_TX_ACK));
 657         }
 658 }
 659
 660 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
 661                                     struct ath_softc *sc, struct sk_buff *skb,
 662                                     struct ieee80211_rx_status *rxs)
 663 {
 664         struct ieee80211_hdr *hdr;
 665
 666         hdr = (struct ieee80211_hdr *)skb->data;
 667
 668         /* Send the frame to mac80211 */
 669         if (is_multicast_ether_addr(hdr->addr1)) {
 670                 int i;
 671                 /*
 672                  * Deliver broadcast/multicast frames to all suitable
 673                  * virtual wiphys.
 674                  */
 675                 /* TODO: filter based on channel configuration */
 676                 for (i = 0; i < sc->num_sec_wiphy; i++) {
 677                         struct ath_wiphy *aphy = sc->sec_wiphy[i];
 678                         struct sk_buff *nskb;
 679                         if (aphy == NULL)
 680                                 continue;
 681                         nskb = skb_copy(skb, GFP_ATOMIC);
 682                         if (!nskb)
 683                                 continue;
 684                         ieee80211_rx(aphy->hw, nskb);
 685                 }
 686                 ieee80211_rx(sc->hw, skb);
 687         } else
 688                 /* Deliver unicast frames based on receiver address */
 689                 ieee80211_rx(hw, skb);
 690 }
 691
 692 static bool ath_edma_get_buffers(struct ath_softc *sc,
 693                                  enum ath9k_rx_qtype qtype)
 694 {
 695         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 696         struct ath_hw *ah = sc->sc_ah;
 697         struct ath_common *common = ath9k_hw_common(ah);
 698         struct sk_buff *skb;
 699         struct ath_buf *bf;
 700         int ret;
 701
 702         skb = skb_peek(&rx_edma->rx_fifo);
 703         if (!skb)
 704                 return false;
 705
 706         bf = SKB_CB_ATHBUF(skb);
 707         BUG_ON(!bf);
 708
 709         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 710                                 common->rx_bufsize, DMA_FROM_DEVICE);
 711
 712         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 713         if (ret == -EINPROGRESS) {
 714                 /*let device gain the buffer again*/
 715                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 716                                 common->rx_bufsize, DMA_FROM_DEVICE);
 717                 return false;
 718         }
 719
 720         __skb_unlink(skb, &rx_edma->rx_fifo);
 721         if (ret == -EINVAL) {
 722                 /* corrupt descriptor, skip this one and the following one */
 723                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 724                 ath_rx_edma_buf_link(sc, qtype);
 725                 skb = skb_peek(&rx_edma->rx_fifo);
 726                 if (!skb)
 727                         return true;
 728
 729                 bf = SKB_CB_ATHBUF(skb);
 730                 BUG_ON(!bf);
 731
 732                 __skb_unlink(skb, &rx_edma->rx_fifo);
 733                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 734                 ath_rx_edma_buf_link(sc, qtype);
 735                 return true;
 736         }
 737         skb_queue_tail(&rx_edma->rx_buffers, skb);
 738
 739         return true;
 740 }
 741
 742 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 743                                                 struct ath_rx_status *rs,
 744                                                 enum ath9k_rx_qtype qtype)
 745 {
 746         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 747         struct sk_buff *skb;
 748         struct ath_buf *bf;
 749
 750         while (ath_edma_get_buffers(sc, qtype));
 751         skb = __skb_dequeue(&rx_edma->rx_buffers);
 752         if (!skb)
 753                 return NULL;
 754
 755         bf = SKB_CB_ATHBUF(skb);
 756         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 757         return bf;
 758 }
 759
 760 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 761                                            struct ath_rx_status *rs)
 762 {
 763         struct ath_hw *ah = sc->sc_ah;
 764         struct ath_common *common = ath9k_hw_common(ah);
 765         struct ath_desc *ds;
 766         struct ath_buf *bf;
 767         int ret;
 768
 769         if (list_empty(&sc->rx.rxbuf)) {
 770                 sc->rx.rxlink = NULL;
 771                 return NULL;
 772         }
 773
 774         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 775         ds = bf->bf_desc;
 776
 777         /*
 778          * Must provide the virtual address of the current
 779          * descriptor, the physical address, and the virtual
 780          * address of the next descriptor in the h/w chain.
 781          * This allows the HAL to look ahead to see if the
 782          * hardware is done with a descriptor by checking the
 783          * done bit in the following descriptor and the address
 784          * of the current descriptor the DMA engine is working
 785          * on.  All this is necessary because of our use of
 786          * a self-linked list to avoid rx overruns.
 787          */
 788         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 789         if (ret == -EINPROGRESS) {
 790                 struct ath_rx_status trs;
 791                 struct ath_buf *tbf;
 792                 struct ath_desc *tds;
 793
 794                 memset(&trs, 0, sizeof(trs));
 795                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 796                         sc->rx.rxlink = NULL;
 797                         return NULL;
 798                 }
 799
 800                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 801
 802                 /*
 803                  * On some hardware the descriptor status words could
 804                  * get corrupted, including the done bit. Because of
 805                  * this, check if the next descriptor's done bit is
 806                  * set or not.
 807                  *
 808                  * If the next descriptor's done bit is set, the current
 809                  * descriptor has been corrupted. Force s/w to discard
 810                  * this descriptor and continue...
 811                  */
 812
 813                 tds = tbf->bf_desc;
 814                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 815                 if (ret == -EINPROGRESS)
 816                         return NULL;
 817         }
 818
 819         if (!bf->bf_mpdu)
 820                 return bf;
 821
 822         /*
 823          * Synchronize the DMA transfer with CPU before
 824          * 1. accessing the frame
 825          * 2. requeueing the same buffer to h/w
 826          */
 827         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 828                         common->rx_bufsize,
 829                         DMA_FROM_DEVICE);
 830
 831         return bf;
 832 }
 833
 834 /* Assumes you've already done the endian to CPU conversion */
 835 static bool ath9k_rx_accept(struct ath_common *common,
 836                             struct ieee80211_hdr *hdr,
 837                             struct ieee80211_rx_status *rxs,
 838                             struct ath_rx_status *rx_stats,
 839                             bool *decrypt_error)
 840 {
 841 #define is_mc_or_valid_tkip_keyix ((is_mc ||                    \
 842                 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
 843                 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
 844
 845         struct ath_hw *ah = common->ah;
 846         __le16 fc;
 847         u8 rx_status_len = ah->caps.rx_status_len;
 848
 849         fc = hdr->frame_control;
 850
 851         if (!rx_stats->rs_datalen)
 852                 return false;
 853         /*
 854          * rs_status follows rs_datalen so if rs_datalen is too large
 855          * we can take a hint that hardware corrupted it, so ignore
 856          * those frames.
 857          */
 858         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 859                 return false;
 860
 861         /*
 862          * rs_more indicates chained descriptors which can be used
 863          * to link buffers together for a sort of scatter-gather
 864          * operation.
 865          * reject the frame, we don't support scatter-gather yet and
 866          * the frame is probably corrupt anyway
 867          */
 868         if (rx_stats->rs_more)
 869                 return false;
 870
 871         /*
 872          * The rx_stats->rs_status will not be set until the end of the
 873          * chained descriptors so it can be ignored if rs_more is set. The
 874          * rs_more will be false at the last element of the chained
 875          * descriptors.
 876          */
 877         if (rx_stats->rs_status != 0) {
 878                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
 879                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 880                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 881                         return false;
 882
 883                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
 884                         *decrypt_error = true;
 885                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
 886                         bool is_mc;
 887                         /*
 888                          * The MIC error bit is only valid if the frame
 889                          * is not a control frame or fragment, and it was
 890                          * decrypted using a valid TKIP key.
 891                          */
 892                         is_mc = !!is_multicast_ether_addr(hdr->addr1);
 893
 894                         if (!ieee80211_is_ctl(fc) &&
 895                             !ieee80211_has_morefrags(fc) &&
 896                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 897                             is_mc_or_valid_tkip_keyix)
 898                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 899                         else
 900                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
 901                 }
 902                 /*
 903                  * Reject error frames with the exception of
 904                  * decryption and MIC failures. For monitor mode,
 905                  * we also ignore the CRC error.
 906                  */
 907                 if (ah->is_monitoring) {
 908                         if (rx_stats->rs_status &
 909                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 910                               ATH9K_RXERR_CRC))
 911                                 return false;
 912                 } else {
 913                         if (rx_stats->rs_status &
 914                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
 915                                 return false;
 916                         }
 917                 }
 918         }
 919         return true;
 920 }
 921
 922 static int ath9k_process_rate(struct ath_common *common,
 923                               struct ieee80211_hw *hw,
 924                               struct ath_rx_status *rx_stats,
 925                               struct ieee80211_rx_status *rxs)
 926 {
 927         struct ieee80211_supported_band *sband;
 928         enum ieee80211_band band;
 929         unsigned int i = 0;
 930
 931         band = hw->conf.channel->band;
 932         sband = hw->wiphy->bands[band];
 933
 934         if (rx_stats->rs_rate & 0x80) {
 935                 /* HT rate */
 936                 rxs->flag |= RX_FLAG_HT;
 937                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 938                         rxs->flag |= RX_FLAG_40MHZ;
 939                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 940                         rxs->flag |= RX_FLAG_SHORT_GI;
 941                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 942                 return 0;
 943         }
 944
 945         for (i = 0; i < sband->n_bitrates; i++) {
 946                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 947                         rxs->rate_idx = i;
 948                         return 0;
 949                 }
 950                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 951                         rxs->flag |= RX_FLAG_SHORTPRE;
 952                         rxs->rate_idx = i;
 953                         return 0;
 954                 }
 955         }
 956
 957         /*
 958          * No valid hardware bitrate found -- we should not get here
 959          * because hardware has already validated this frame as OK.
 960          */
 961         ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
 962                   "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
 963
 964         return -EINVAL;
 965 }
 966
 967 static void ath9k_process_rssi(struct ath_common *common,
 968                                struct ieee80211_hw *hw,
 969                                struct ieee80211_hdr *hdr,
 970                                struct ath_rx_status *rx_stats)
 971 {
 972         struct ath_hw *ah = common->ah;
 973         struct ieee80211_sta *sta;
 974         struct ath_node *an;
 975         int last_rssi = ATH_RSSI_DUMMY_MARKER;
 976         __le16 fc;
 977
 978         fc = hdr->frame_control;
 979
 980         rcu_read_lock();
 981         /*
 982          * XXX: use ieee80211_find_sta! This requires quite a bit of work
 983          * under the current ath9k virtual wiphy implementation as we have
 984          * no way of tying a vif to wiphy. Typically vifs are attached to
 985          * at least one sdata of a wiphy on mac80211 but with ath9k virtual
 986          * wiphy you'd have to iterate over every wiphy and each sdata.
 987          */
 988         if (is_multicast_ether_addr(hdr->addr1))
 989                 sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr2, NULL);
 990         else
 991                 sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr2, hdr->addr1);
 992
 993         if (sta) {
 994                 an = (struct ath_node *) sta->drv_priv;
 995                 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
 996                    !rx_stats->rs_moreaggr)
 997                         ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
 998                 last_rssi = an->last_rssi;
 999         }
1000         rcu_read_unlock();
1001
1002         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
1003                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
1004                                               ATH_RSSI_EP_MULTIPLIER);
1005         if (rx_stats->rs_rssi < 0)
1006                 rx_stats->rs_rssi = 0;
1007
1008         /* Update Beacon RSSI, this is used by ANI. */
1009         if (ieee80211_is_beacon(fc))
1010                 ah->stats.avgbrssi = rx_stats->rs_rssi;
1011 }
1012
1013 /*
1014  * For Decrypt or Demic errors, we only mark packet status here and always push
1015  * up the frame up to let mac80211 handle the actual error case, be it no
1016  * decryption key or real decryption error. This let us keep statistics there.
1017  */
1018 static int ath9k_rx_skb_preprocess(struct ath_common *common,
1019                                    struct ieee80211_hw *hw,
1020                                    struct ieee80211_hdr *hdr,
1021                                    struct ath_rx_status *rx_stats,
1022                                    struct ieee80211_rx_status *rx_status,
1023                                    bool *decrypt_error)
1024 {
1025         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
1026
1027         /*
1028          * everything but the rate is checked here, the rate check is done
1029          * separately to avoid doing two lookups for a rate for each frame.
1030          */
1031         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1032                 return -EINVAL;
1033
1034         ath9k_process_rssi(common, hw, hdr, rx_stats);
1035
1036         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1037                 return -EINVAL;
1038
1039         rx_status->band = hw->conf.channel->band;
1040         rx_status->freq = hw->conf.channel->center_freq;
1041         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1042         rx_status->antenna = rx_stats->rs_antenna;
1043         rx_status->flag |= RX_FLAG_TSFT;
1044
1045         return 0;
1046 }
1047
1048 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1049                                      struct sk_buff *skb,
1050                                      struct ath_rx_status *rx_stats,
1051                                      struct ieee80211_rx_status *rxs,
1052                                      bool decrypt_error)
1053 {
1054         struct ath_hw *ah = common->ah;
1055         struct ieee80211_hdr *hdr;
1056         int hdrlen, padpos, padsize;
1057         u8 keyix;
1058         __le16 fc;
1059
1060         /* see if any padding is done by the hw and remove it */
1061         hdr = (struct ieee80211_hdr *) skb->data;
1062         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1063         fc = hdr->frame_control;
1064         padpos = ath9k_cmn_padpos(hdr->frame_control);
1065
1066         /* The MAC header is padded to have 32-bit boundary if the
1067          * packet payload is non-zero. The general calculation for
1068          * padsize would take into account odd header lengths:
1069          * padsize = (4 - padpos % 4) % 4; However, since only
1070          * even-length headers are used, padding can only be 0 or 2
1071          * bytes and we can optimize this a bit. In addition, we must
1072          * not try to remove padding from short control frames that do
1073          * not have payload. */
1074         padsize = padpos & 3;
1075         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1076                 memmove(skb->data + padsize, skb->data, padpos);
1077                 skb_pull(skb, padsize);
1078         }
1079
1080         keyix = rx_stats->rs_keyix;
1081
1082         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1083             ieee80211_has_protected(fc)) {
1084                 rxs->flag |= RX_FLAG_DECRYPTED;
1085         } else if (ieee80211_has_protected(fc)
1086                    && !decrypt_error && skb->len >= hdrlen + 4) {
1087                 keyix = skb->data[hdrlen + 3] >> 6;
1088
1089                 if (test_bit(keyix, common->keymap))
1090                         rxs->flag |= RX_FLAG_DECRYPTED;
1091         }
1092         if (ah->sw_mgmt_crypto &&
1093             (rxs->flag & RX_FLAG_DECRYPTED) &&
1094             ieee80211_is_mgmt(fc))
1095                 /* Use software decrypt for management frames. */
1096                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1097 }
1098
1099 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1100                                       struct ath_hw_antcomb_conf ant_conf,
1101                                       int main_rssi_avg)
1102 {
1103         antcomb->quick_scan_cnt = 0;
1104
1105         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1106                 antcomb->rssi_lna2 = main_rssi_avg;
1107         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1108                 antcomb->rssi_lna1 = main_rssi_avg;
1109
1110         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1111         case (0x10): /* LNA2 A-B */
1112                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1113                 antcomb->first_quick_scan_conf =
1114                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1115                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1116                 break;
1117         case (0x20): /* LNA1 A-B */
1118                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1119                 antcomb->first_quick_scan_conf =
1120                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1121                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1122                 break;
1123         case (0x21): /* LNA1 LNA2 */
1124                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1125                 antcomb->first_quick_scan_conf =
1126                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1127                 antcomb->second_quick_scan_conf =
1128                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1129                 break;
1130         case (0x12): /* LNA2 LNA1 */
1131                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1132                 antcomb->first_quick_scan_conf =
1133                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1134                 antcomb->second_quick_scan_conf =
1135                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1136                 break;
1137         case (0x13): /* LNA2 A+B */
1138                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1139                 antcomb->first_quick_scan_conf =
1140                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1141                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1142                 break;
1143         case (0x23): /* LNA1 A+B */
1144                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1145                 antcomb->first_quick_scan_conf =
1146                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1147                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1148                 break;
1149         default:
1150                 break;
1151         }
1152 }
1153
1154 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1155                                 struct ath_hw_antcomb_conf *div_ant_conf,
1156                                 int main_rssi_avg, int alt_rssi_avg,
1157                                 int alt_ratio)
1158 {
1159         /* alt_good */
1160         switch (antcomb->quick_scan_cnt) {
1161         case 0:
1162                 /* set alt to main, and alt to first conf */
1163                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1164                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1165                 break;
1166         case 1:
1167                 /* set alt to main, and alt to first conf */
1168                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1169                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1170                 antcomb->rssi_first = main_rssi_avg;
1171                 antcomb->rssi_second = alt_rssi_avg;
1172
1173                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1174                         /* main is LNA1 */
1175                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1176                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1177                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1178                                                 main_rssi_avg, alt_rssi_avg,
1179                                                 antcomb->total_pkt_count))
1180                                 antcomb->first_ratio = true;
1181                         else
1182                                 antcomb->first_ratio = false;
1183                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1184                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1185                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1186                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1187                                                 main_rssi_avg, alt_rssi_avg,
1188                                                 antcomb->total_pkt_count))
1189                                 antcomb->first_ratio = true;
1190                         else
1191                                 antcomb->first_ratio = false;
1192                 } else {
1193                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1194                             (alt_rssi_avg > main_rssi_avg +
1195                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1196                             (alt_rssi_avg > main_rssi_avg)) &&
1197                             (antcomb->total_pkt_count > 50))
1198                                 antcomb->first_ratio = true;
1199                         else
1200                                 antcomb->first_ratio = false;
1201                 }
1202                 break;
1203         case 2:
1204                 antcomb->alt_good = false;
1205                 antcomb->scan_not_start = false;
1206                 antcomb->scan = false;
1207                 antcomb->rssi_first = main_rssi_avg;
1208                 antcomb->rssi_third = alt_rssi_avg;
1209
1210                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1211                         antcomb->rssi_lna1 = alt_rssi_avg;
1212                 else if (antcomb->second_quick_scan_conf ==
1213                          ATH_ANT_DIV_COMB_LNA2)
1214                         antcomb->rssi_lna2 = alt_rssi_avg;
1215                 else if (antcomb->second_quick_scan_conf ==
1216                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1217                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1218                                 antcomb->rssi_lna2 = main_rssi_avg;
1219                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1220                                 antcomb->rssi_lna1 = main_rssi_avg;
1221                 }
1222
1223                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1224                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1225                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1226                 else
1227                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1228
1229                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1230                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1231                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1232                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1233                                                 main_rssi_avg, alt_rssi_avg,
1234                                                 antcomb->total_pkt_count))
1235                                 antcomb->second_ratio = true;
1236                         else
1237                                 antcomb->second_ratio = false;
1238                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1239                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1240                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1241                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1242                                                 main_rssi_avg, alt_rssi_avg,
1243                                                 antcomb->total_pkt_count))
1244                                 antcomb->second_ratio = true;
1245                         else
1246                                 antcomb->second_ratio = false;
1247                 } else {
1248                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1249                             (alt_rssi_avg > main_rssi_avg +
1250                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1251                             (alt_rssi_avg > main_rssi_avg)) &&
1252                             (antcomb->total_pkt_count > 50))
1253                                 antcomb->second_ratio = true;
1254                         else
1255                                 antcomb->second_ratio = false;
1256                 }
1257
1258                 /* set alt to the conf with maximun ratio */
1259                 if (antcomb->first_ratio && antcomb->second_ratio) {
1260                         if (antcomb->rssi_second > antcomb->rssi_third) {
1261                                 /* first alt*/
1262                                 if ((antcomb->first_quick_scan_conf ==
1263                                     ATH_ANT_DIV_COMB_LNA1) ||
1264                                     (antcomb->first_quick_scan_conf ==
1265                                     ATH_ANT_DIV_COMB_LNA2))
1266                                         /* Set alt LNA1 or LNA2*/
1267                                         if (div_ant_conf->main_lna_conf ==
1268                                             ATH_ANT_DIV_COMB_LNA2)
1269                                                 div_ant_conf->alt_lna_conf =
1270                                                         ATH_ANT_DIV_COMB_LNA1;
1271                                         else
1272                                                 div_ant_conf->alt_lna_conf =
1273                                                         ATH_ANT_DIV_COMB_LNA2;
1274                                 else
1275                                         /* Set alt to A+B or A-B */
1276                                         div_ant_conf->alt_lna_conf =
1277                                                 antcomb->first_quick_scan_conf;
1278                         } else if ((antcomb->second_quick_scan_conf ==
1279                                    ATH_ANT_DIV_COMB_LNA1) ||
1280                                    (antcomb->second_quick_scan_conf ==
1281                                    ATH_ANT_DIV_COMB_LNA2)) {
1282                                 /* Set alt LNA1 or LNA2 */
1283                                 if (div_ant_conf->main_lna_conf ==
1284                                     ATH_ANT_DIV_COMB_LNA2)
1285                                         div_ant_conf->alt_lna_conf =
1286                                                 ATH_ANT_DIV_COMB_LNA1;
1287                                 else
1288                                         div_ant_conf->alt_lna_conf =
1289                                                 ATH_ANT_DIV_COMB_LNA2;
1290                         } else {
1291                                 /* Set alt to A+B or A-B */
1292                                 div_ant_conf->alt_lna_conf =
1293                                         antcomb->second_quick_scan_conf;
1294                         }
1295                 } else if (antcomb->first_ratio) {
1296                         /* first alt */
1297                         if ((antcomb->first_quick_scan_conf ==
1298                             ATH_ANT_DIV_COMB_LNA1) ||
1299                             (antcomb->first_quick_scan_conf ==
1300                             ATH_ANT_DIV_COMB_LNA2))
1301                                         /* Set alt LNA1 or LNA2 */
1302                                 if (div_ant_conf->main_lna_conf ==
1303                                     ATH_ANT_DIV_COMB_LNA2)
1304                                         div_ant_conf->alt_lna_conf =
1305                                                         ATH_ANT_DIV_COMB_LNA1;
1306                                 else
1307                                         div_ant_conf->alt_lna_conf =
1308                                                         ATH_ANT_DIV_COMB_LNA2;
1309                         else
1310                                 /* Set alt to A+B or A-B */
1311                                 div_ant_conf->alt_lna_conf =
1312                                                 antcomb->first_quick_scan_conf;
1313                 } else if (antcomb->second_ratio) {
1314                                 /* second alt */
1315                         if ((antcomb->second_quick_scan_conf ==
1316                             ATH_ANT_DIV_COMB_LNA1) ||
1317                             (antcomb->second_quick_scan_conf ==
1318                             ATH_ANT_DIV_COMB_LNA2))
1319                                 /* Set alt LNA1 or LNA2 */
1320                                 if (div_ant_conf->main_lna_conf ==
1321                                     ATH_ANT_DIV_COMB_LNA2)
1322                                         div_ant_conf->alt_lna_conf =
1323                                                 ATH_ANT_DIV_COMB_LNA1;
1324                                 else
1325                                         div_ant_conf->alt_lna_conf =
1326                                                 ATH_ANT_DIV_COMB_LNA2;
1327                         else
1328                                 /* Set alt to A+B or A-B */
1329                                 div_ant_conf->alt_lna_conf =
1330                                                 antcomb->second_quick_scan_conf;
1331                 } else {
1332                         /* main is largest */
1333                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1334                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1335                                 /* Set alt LNA1 or LNA2 */
1336                                 if (div_ant_conf->main_lna_conf ==
1337                                     ATH_ANT_DIV_COMB_LNA2)
1338                                         div_ant_conf->alt_lna_conf =
1339                                                         ATH_ANT_DIV_COMB_LNA1;
1340                                 else
1341                                         div_ant_conf->alt_lna_conf =
1342                                                         ATH_ANT_DIV_COMB_LNA2;
1343                         else
1344                                 /* Set alt to A+B or A-B */
1345                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1346                 }
1347                 break;
1348         default:
1349                 break;
1350         }
1351 }
1352
1353 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf)
1354 {
1355         /* Adjust the fast_div_bias based on main and alt lna conf */
1356         switch ((ant_conf->main_lna_conf << 4) | ant_conf->alt_lna_conf) {
1357         case (0x01): /* A-B LNA2 */
1358                 ant_conf->fast_div_bias = 0x3b;
1359                 break;
1360         case (0x02): /* A-B LNA1 */
1361                 ant_conf->fast_div_bias = 0x3d;
1362                 break;
1363         case (0x03): /* A-B A+B */
1364                 ant_conf->fast_div_bias = 0x1;
1365                 break;
1366         case (0x10): /* LNA2 A-B */
1367                 ant_conf->fast_div_bias = 0x7;
1368                 break;
1369         case (0x12): /* LNA2 LNA1 */
1370                 ant_conf->fast_div_bias = 0x2;
1371                 break;
1372         case (0x13): /* LNA2 A+B */
1373                 ant_conf->fast_div_bias = 0x7;
1374                 break;
1375         case (0x20): /* LNA1 A-B */
1376                 ant_conf->fast_div_bias = 0x6;
1377                 break;
1378         case (0x21): /* LNA1 LNA2 */
1379                 ant_conf->fast_div_bias = 0x0;
1380                 break;
1381         case (0x23): /* LNA1 A+B */
1382                 ant_conf->fast_div_bias = 0x6;
1383                 break;
1384         case (0x30): /* A+B A-B */
1385                 ant_conf->fast_div_bias = 0x1;
1386                 break;
1387         case (0x31): /* A+B LNA2 */
1388                 ant_conf->fast_div_bias = 0x3b;
1389                 break;
1390         case (0x32): /* A+B LNA1 */
1391                 ant_conf->fast_div_bias = 0x3d;
1392                 break;
1393         default:
1394                 break;
1395         }
1396 }
1397
1398 /* Antenna diversity and combining */
1399 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1400 {
1401         struct ath_hw_antcomb_conf div_ant_conf;
1402         struct ath_ant_comb *antcomb = &sc->ant_comb;
1403         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1404         int curr_main_set, curr_bias;
1405         int main_rssi = rs->rs_rssi_ctl0;
1406         int alt_rssi = rs->rs_rssi_ctl1;
1407         int rx_ant_conf,  main_ant_conf;
1408         bool short_scan = false;
1409
1410         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1411                        ATH_ANT_RX_MASK;
1412         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1413                          ATH_ANT_RX_MASK;
1414
1415         /* Record packet only when alt_rssi is positive */
1416         if (alt_rssi > 0) {
1417                 antcomb->total_pkt_count++;
1418                 antcomb->main_total_rssi += main_rssi;
1419                 antcomb->alt_total_rssi  += alt_rssi;
1420                 if (main_ant_conf == rx_ant_conf)
1421                         antcomb->main_recv_cnt++;
1422                 else
1423                         antcomb->alt_recv_cnt++;
1424         }
1425
1426         /* Short scan check */
1427         if (antcomb->scan && antcomb->alt_good) {
1428                 if (time_after(jiffies, antcomb->scan_start_time +
1429                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1430                         short_scan = true;
1431                 else
1432                         if (antcomb->total_pkt_count ==
1433                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1434                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1435                                             antcomb->total_pkt_count);
1436                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1437                                         short_scan = true;
1438                         }
1439         }
1440
1441         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1442             rs->rs_moreaggr) && !short_scan)
1443                 return;
1444
1445         if (antcomb->total_pkt_count) {
1446                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1447                              antcomb->total_pkt_count);
1448                 main_rssi_avg = (antcomb->main_total_rssi /
1449                                  antcomb->total_pkt_count);
1450                 alt_rssi_avg = (antcomb->alt_total_rssi /
1451                                  antcomb->total_pkt_count);
1452         }
1453
1454
1455         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1456         curr_alt_set = div_ant_conf.alt_lna_conf;
1457         curr_main_set = div_ant_conf.main_lna_conf;
1458         curr_bias = div_ant_conf.fast_div_bias;
1459
1460         antcomb->count++;
1461
1462         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1463                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1464                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1465                                                   main_rssi_avg);
1466                         antcomb->alt_good = true;
1467                 } else {
1468                         antcomb->alt_good = false;
1469                 }
1470
1471                 antcomb->count = 0;
1472                 antcomb->scan = true;
1473                 antcomb->scan_not_start = true;
1474         }
1475
1476         if (!antcomb->scan) {
1477                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1478                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1479                                 /* Switch main and alt LNA */
1480                                 div_ant_conf.main_lna_conf =
1481                                                 ATH_ANT_DIV_COMB_LNA2;
1482                                 div_ant_conf.alt_lna_conf  =
1483                                                 ATH_ANT_DIV_COMB_LNA1;
1484                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1485                                 div_ant_conf.main_lna_conf =
1486                                                 ATH_ANT_DIV_COMB_LNA1;
1487                                 div_ant_conf.alt_lna_conf  =
1488                                                 ATH_ANT_DIV_COMB_LNA2;
1489                         }
1490
1491                         goto div_comb_done;
1492                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1493                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1494                         /* Set alt to another LNA */
1495                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1496                                 div_ant_conf.alt_lna_conf =
1497                                                 ATH_ANT_DIV_COMB_LNA1;
1498                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1499                                 div_ant_conf.alt_lna_conf =
1500                                                 ATH_ANT_DIV_COMB_LNA2;
1501
1502                         goto div_comb_done;
1503                 }
1504
1505                 if ((alt_rssi_avg < (main_rssi_avg +
1506                     ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA)))
1507                         goto div_comb_done;
1508         }
1509
1510         if (!antcomb->scan_not_start) {
1511                 switch (curr_alt_set) {
1512                 case ATH_ANT_DIV_COMB_LNA2:
1513                         antcomb->rssi_lna2 = alt_rssi_avg;
1514                         antcomb->rssi_lna1 = main_rssi_avg;
1515                         antcomb->scan = true;
1516                         /* set to A+B */
1517                         div_ant_conf.main_lna_conf =
1518                                 ATH_ANT_DIV_COMB_LNA1;
1519                         div_ant_conf.alt_lna_conf  =
1520                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1521                         break;
1522                 case ATH_ANT_DIV_COMB_LNA1:
1523                         antcomb->rssi_lna1 = alt_rssi_avg;
1524                         antcomb->rssi_lna2 = main_rssi_avg;
1525                         antcomb->scan = true;
1526                         /* set to A+B */
1527                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1528                         div_ant_conf.alt_lna_conf  =
1529                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1530                         break;
1531                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1532                         antcomb->rssi_add = alt_rssi_avg;
1533                         antcomb->scan = true;
1534                         /* set to A-B */
1535                         div_ant_conf.alt_lna_conf =
1536                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1537                         break;
1538                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1539                         antcomb->rssi_sub = alt_rssi_avg;
1540                         antcomb->scan = false;
1541                         if (antcomb->rssi_lna2 >
1542                             (antcomb->rssi_lna1 +
1543                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1544                                 /* use LNA2 as main LNA */
1545                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1546                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1547                                         /* set to A+B */
1548                                         div_ant_conf.main_lna_conf =
1549                                                 ATH_ANT_DIV_COMB_LNA2;
1550                                         div_ant_conf.alt_lna_conf  =
1551                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1552                                 } else if (antcomb->rssi_sub >
1553                                            antcomb->rssi_lna1) {
1554                                         /* set to A-B */
1555                                         div_ant_conf.main_lna_conf =
1556                                                 ATH_ANT_DIV_COMB_LNA2;
1557                                         div_ant_conf.alt_lna_conf =
1558                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1559                                 } else {
1560                                         /* set to LNA1 */
1561                                         div_ant_conf.main_lna_conf =
1562                                                 ATH_ANT_DIV_COMB_LNA2;
1563                                         div_ant_conf.alt_lna_conf =
1564                                                 ATH_ANT_DIV_COMB_LNA1;
1565                                 }
1566                         } else {
1567                                 /* use LNA1 as main LNA */
1568                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1569                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1570                                         /* set to A+B */
1571                                         div_ant_conf.main_lna_conf =
1572                                                 ATH_ANT_DIV_COMB_LNA1;
1573                                         div_ant_conf.alt_lna_conf  =
1574                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1575                                 } else if (antcomb->rssi_sub >
1576                                            antcomb->rssi_lna1) {
1577                                         /* set to A-B */
1578                                         div_ant_conf.main_lna_conf =
1579                                                 ATH_ANT_DIV_COMB_LNA1;
1580                                         div_ant_conf.alt_lna_conf =
1581                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1582                                 } else {
1583                                         /* set to LNA2 */
1584                                         div_ant_conf.main_lna_conf =
1585                                                 ATH_ANT_DIV_COMB_LNA1;
1586                                         div_ant_conf.alt_lna_conf =
1587                                                 ATH_ANT_DIV_COMB_LNA2;
1588                                 }
1589                         }
1590                         break;
1591                 default:
1592                         break;
1593                 }
1594         } else {
1595                 if (!antcomb->alt_good) {
1596                         antcomb->scan_not_start = false;
1597                         /* Set alt to another LNA */
1598                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1599                                 div_ant_conf.main_lna_conf =
1600                                                 ATH_ANT_DIV_COMB_LNA2;
1601                                 div_ant_conf.alt_lna_conf =
1602                                                 ATH_ANT_DIV_COMB_LNA1;
1603                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1604                                 div_ant_conf.main_lna_conf =
1605                                                 ATH_ANT_DIV_COMB_LNA1;
1606                                 div_ant_conf.alt_lna_conf =
1607                                                 ATH_ANT_DIV_COMB_LNA2;
1608                         }
1609                         goto div_comb_done;
1610                 }
1611         }
1612
1613         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1614                                            main_rssi_avg, alt_rssi_avg,
1615                                            alt_ratio);
1616
1617         antcomb->quick_scan_cnt++;
1618
1619 div_comb_done:
1620         ath_ant_div_conf_fast_divbias(&div_ant_conf);
1621
1622         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1623
1624         antcomb->scan_start_time = jiffies;
1625         antcomb->total_pkt_count = 0;
1626         antcomb->main_total_rssi = 0;
1627         antcomb->alt_total_rssi = 0;
1628         antcomb->main_recv_cnt = 0;
1629         antcomb->alt_recv_cnt = 0;
1630 }
1631
1632 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1633 {
1634         struct ath_buf *bf;
1635         struct sk_buff *skb = NULL, *requeue_skb;
1636         struct ieee80211_rx_status *rxs;
1637         struct ath_hw *ah = sc->sc_ah;
1638         struct ath_common *common = ath9k_hw_common(ah);
1639         /*
1640          * The hw can techncically differ from common->hw when using ath9k
1641          * virtual wiphy so to account for that we iterate over the active
1642          * wiphys and find the appropriate wiphy and therefore hw.
1643          */
1644         struct ieee80211_hw *hw = NULL;
1645         struct ieee80211_hdr *hdr;
1646         int retval;
1647         bool decrypt_error = false;
1648         struct ath_rx_status rs;
1649         enum ath9k_rx_qtype qtype;
1650         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1651         int dma_type;
1652         u8 rx_status_len = ah->caps.rx_status_len;
1653         u64 tsf = 0;
1654         u32 tsf_lower = 0;
1655         unsigned long flags;
1656
1657         if (edma)
1658                 dma_type = DMA_BIDIRECTIONAL;
1659         else
1660                 dma_type = DMA_FROM_DEVICE;
1661
1662         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1663         spin_lock_bh(&sc->rx.rxbuflock);
1664
1665         tsf = ath9k_hw_gettsf64(ah);
1666         tsf_lower = tsf & 0xffffffff;
1667
1668         do {
1669                 /* If handling rx interrupt and flush is in progress => exit */
1670                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1671                         break;
1672
1673                 memset(&rs, 0, sizeof(rs));
1674                 if (edma)
1675                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1676                 else
1677                         bf = ath_get_next_rx_buf(sc, &rs);
1678
1679                 if (!bf)
1680                         break;
1681
1682                 skb = bf->bf_mpdu;
1683                 if (!skb)
1684                         continue;
1685
1686                 hdr = (struct ieee80211_hdr *) (skb->data + rx_status_len);
1687                 rxs =  IEEE80211_SKB_RXCB(skb);
1688
1689                 hw = ath_get_virt_hw(sc, hdr);
1690
1691                 ath_debug_stat_rx(sc, &rs);
1692
1693                 /*
1694                  * If we're asked to flush receive queue, directly
1695                  * chain it back at the queue without processing it.
1696                  */
1697                 if (flush)
1698                         goto requeue;
1699
1700                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1701                                                  rxs, &decrypt_error);
1702                 if (retval)
1703                         goto requeue;
1704
1705                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1706                 if (rs.rs_tstamp > tsf_lower &&
1707                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1708                         rxs->mactime -= 0x100000000ULL;
1709
1710                 if (rs.rs_tstamp < tsf_lower &&
1711                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1712                         rxs->mactime += 0x100000000ULL;
1713
1714                 /* Ensure we always have an skb to requeue once we are done
1715                  * processing the current buffer's skb */
1716                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1717
1718                 /* If there is no memory we ignore the current RX'd frame,
1719                  * tell hardware it can give us a new frame using the old
1720                  * skb and put it at the tail of the sc->rx.rxbuf list for
1721                  * processing. */
1722                 if (!requeue_skb)
1723                         goto requeue;
1724
1725                 /* Unmap the frame */
1726                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1727                                  common->rx_bufsize,
1728                                  dma_type);
1729
1730                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1731                 if (ah->caps.rx_status_len)
1732                         skb_pull(skb, ah->caps.rx_status_len);
1733
1734                 ath9k_rx_skb_postprocess(common, skb, &rs,
1735                                          rxs, decrypt_error);
1736
1737                 /* We will now give hardware our shiny new allocated skb */
1738                 bf->bf_mpdu = requeue_skb;
1739                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1740                                                  common->rx_bufsize,
1741                                                  dma_type);
1742                 if (unlikely(dma_mapping_error(sc->dev,
1743                           bf->bf_buf_addr))) {
1744                         dev_kfree_skb_any(requeue_skb);
1745                         bf->bf_mpdu = NULL;
1746                         bf->bf_buf_addr = 0;
1747                         ath_print(common, ATH_DBG_FATAL,
1748                                   "dma_mapping_error() on RX\n");
1749                         ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1750                         break;
1751                 }
1752
1753                 /*
1754                  * change the default rx antenna if rx diversity chooses the
1755                  * other antenna 3 times in a row.
1756                  */
1757                 if (sc->rx.defant != rs.rs_antenna) {
1758                         if (++sc->rx.rxotherant >= 3)
1759                                 ath_setdefantenna(sc, rs.rs_antenna);
1760                 } else {
1761                         sc->rx.rxotherant = 0;
1762                 }
1763
1764                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1765                 if (unlikely(ath9k_check_auto_sleep(sc) ||
1766                              (sc->ps_flags & (PS_WAIT_FOR_BEACON |
1767                                               PS_WAIT_FOR_CAB |
1768                                               PS_WAIT_FOR_PSPOLL_DATA))))
1769                         ath_rx_ps(sc, skb);
1770                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1771
1772                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1773                         ath_ant_comb_scan(sc, &rs);
1774
1775                 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1776
1777 requeue:
1778                 if (edma) {
1779                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1780                         ath_rx_edma_buf_link(sc, qtype);
1781                 } else {
1782                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1783                         ath_rx_buf_link(sc, bf);
1784                 }
1785         } while (1);
1786
1787         spin_unlock_bh(&sc->rx.rxbuflock);
1788
1789         return 0;
1790 }