]> rtime.felk.cvut.cz Git - lisovros/linux_canprio.git/commitdiff
ath9k_hw: Enable TX IQ calibration on AR9003
authorLuis R. Rodriguez <lrodriguez@atheros.com>
Wed, 19 May 2010 20:45:50 +0000 (16:45 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 2 Jun 2010 20:13:28 +0000 (16:13 -0400)
To enable it we now disable and re-enable the PHY chips
after TX IQ calibration.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_calib.c
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

index 56a9e5fa6d66f727055dcaaa2f5dc3da431bd156..5a06503991368f1f73bef5ed8df588970f68000f 100644 (file)
@@ -739,6 +739,12 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
         */
        ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
 
+       /* Do Tx IQ Calibration */
+       ar9003_hw_tx_iq_cal(ah);
+       REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+       udelay(5);
+       REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+
        /* Calibrate the AGC */
        REG_WRITE(ah, AR_PHY_AGC_CONTROL,
                  REG_READ(ah, AR_PHY_AGC_CONTROL) |
@@ -753,10 +759,6 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
                return false;
        }
 
-       /* Do Tx IQ Calibration */
-       if (ah->config.tx_iq_calibration)
-               ar9003_hw_tx_iq_cal(ah);
-
        /* Revert chainmasks to their original values before NF cal */
        ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
 
index 3b55c7f6bb7937aa182c47933f7914152810c5aa..d902878faeedcfcf0a9b58da0ae116786391dc78 100644 (file)
@@ -391,12 +391,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
 
        ah->config.rx_intr_mitigation = true;
 
-       /*
-        * Tx IQ Calibration (ah->config.tx_iq_calibration) is only
-        * used by AR9003, but it is showing reliability issues.
-        * It will take a while to fix so this is currently disabled.
-        */
-
        /*
         * We need this for PCI devices only (Cardbus, PCI, miniPCI)
         * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
index ffc9249b02c5b9d2ac488f19871163f93d7fa489..116d1c80aa21ee2a8a3f7e5637e063ad08992af9 100644 (file)
@@ -263,7 +263,6 @@ struct ath9k_ops_config {
 #define AR_BASE_FREQ_5GHZ      4900
 #define AR_SPUR_FEEQ_BOUND_HT40 19
 #define AR_SPUR_FEEQ_BOUND_HT20 10
-       bool tx_iq_calibration; /* Only available for >= AR9003 */
        int spurmode;
        u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
        u8 max_txtrig_level;