]> rtime.felk.cvut.cz Git - lisovros/linux_canprio.git/commitdiff
omap: i2c: Fix muxing for command line enabled bus
authorJarkko Nikula <jhnikula@gmail.com>
Mon, 22 Feb 2010 20:29:36 +0000 (20:29 +0000)
committerTony Lindgren <tony@atomide.com>
Thu, 25 Feb 2010 22:45:08 +0000 (14:45 -0800)
The commit b63128e81214cc2db2995d690438055c26d213a5 broke the pin muxing
for I2C busses that are enabled from the kernel command line.

Fix this by defining the board registration function omap_register_i2c_bus
in common platform code as it was before but keep the muxing in architecture
dependent files.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/i2c.c
arch/arm/mach-omap2/i2c.c
arch/arm/plat-omap/i2c.c
arch/arm/plat-omap/include/plat/i2c.h

index 1bf4735e27a636285ad512f26b5cff0b7b519748..5446c9912641fa502416ba6e9ce01f8215a67bee 100644 (file)
@@ -23,9 +23,7 @@
 #include <plat/mux.h>
 #include <plat/cpu.h>
 
-int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
-                         struct i2c_board_info const *info,
-                         unsigned len)
+void __init omap1_i2c_mux_pins(int bus_id)
 {
        if (cpu_is_omap7xx()) {
                omap_cfg_reg(I2C_7XX_SDA);
@@ -34,6 +32,4 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                omap_cfg_reg(I2C_SDA);
                omap_cfg_reg(I2C_SCL);
        }
-
-       return omap_plat_register_i2c_bus(bus_id, clkrate, info, len);
 }
index 789ca8c02f0c9bf00b2baf54b439881641b7f511..7951ae1447ee3c0ad64930f81ff577701d2f2b15 100644 (file)
@@ -25,9 +25,7 @@
 
 #include "mux.h"
 
-int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
-                         struct i2c_board_info const *info,
-                         unsigned len)
+void __init omap2_i2c_mux_pins(int bus_id)
 {
        if (cpu_is_omap24xx()) {
                const int omap24xx_pins[][2] = {
@@ -51,6 +49,4 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
                omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
        }
-
-       return omap_plat_register_i2c_bus(bus_id, clkrate, info, len);
 }
index 96d2781ac4f5d435afd70c084723be8b5ab4b935..624e26298faadf89269fd65497e5709b5b47f07c 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/i2c.h>
 #include <mach/irqs.h>
 #include <plat/mux.h>
+#include <plat/i2c.h>
 
 #define OMAP_I2C_SIZE          0x3f
 #define OMAP1_I2C_BASE         0xfffb3800
@@ -117,6 +118,11 @@ static int __init omap_i2c_add_bus(int bus_id)
                res[1].start = irq;
        }
 
+       if (cpu_class_is_omap1())
+               omap1_i2c_mux_pins(bus_id);
+       if (cpu_class_is_omap2())
+               omap2_i2c_mux_pins(bus_id);
+
        return platform_device_register(pdev);
 }
 
@@ -169,7 +175,7 @@ out:
 subsys_initcall(omap_register_i2c_bus_cmdline);
 
 /**
- * omap_plat_register_i2c_bus - register I2C bus with device descriptors
+ * omap_register_i2c_bus - register I2C bus with device descriptors
  * @bus_id: bus id counting from number 1
  * @clkrate: clock rate of the bus in kHz
  * @info: pointer into I2C device descriptor table or NULL
@@ -177,7 +183,7 @@ subsys_initcall(omap_register_i2c_bus_cmdline);
  *
  * Returns 0 on success or an error code.
  */
-int __init omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
+int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                          struct i2c_board_info const *info,
                          unsigned len)
 {
index 585d9ca68b974c38a4c9ea0abb318f40c65bf9a9..87f6bf2ea4fafbf2864a9f72f630cc5ec56da9a9 100644 (file)
@@ -34,6 +34,5 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
 }
 #endif
 
-int omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
-                                struct i2c_board_info const *info,
-                                unsigned len);
+void __init omap1_i2c_mux_pins(int bus_id);
+void __init omap2_i2c_mux_pins(int bus_id);