4 * i82527.h - Intel I82527 network device driver
6 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
9 * Original version Written by Arnaud Westenberg email:arnaud@wanadoo.nl
10 * This software is released under the GPL-License.
12 * Major Refactoring and Integration into can4linux version 3.1 by
13 * Henrik W Maier of FOCUS Software Engineering Pty Ltd <www.focus-sw.com>
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. Neither the name of Volkswagen nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * Alternatively, provided that this notice is retained in full, this
28 * software may be distributed under the terms of the GNU General
29 * Public License ("GPL") version 2, in which case the provisions of the
30 * GPL apply INSTEAD OF those given above.
32 * The provided data structures and external interfaces from this code
33 * are not restricted to be used by modules with a GPL compatible license.
35 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
48 * Send feedback to <socketcan-users@lists.berlios.de>
55 #define I82527_IO_SIZE 0x100
57 #define CHIP_NAME "i82527"
59 #define DRV_NAME_LEN 30 /* for "<chip_name>-<hal_name>" */
61 #define PROCBASE "driver" /* /proc/ ... */
63 #define DEFAULT_HW_CLK 16000000
64 #define DEFAULT_SPEED 500 /* kBit/s */
65 #define DEFAULT_FORCE_DMC 0 /* for critical register access, e.g. ser1274 */
67 #define IRQ_MODE_SHARED 1 /* enable shared interrupts */
68 #define IRQ_MODE_DISABLE_LOCAL_IRQS 2 /* when processing the irq handler */
69 #define DEFAULT_IRQ_MODE IRQ_MODE_SHARED
71 /* The message object 15 has a shadow register for reliable data receiption */
72 /* under heavy bus load. Therefore it makes sense to use this message object */
73 /* (mo15) for the needed use case. The frame type (EFF/SFF) for the mo15 can */
74 /* be defined on the module command line. The default is 11 bit SFF format. */
80 #define MO15_DEFLT MO15_SFF /* the default */
82 #define CAN_NETDEV_NAME "can%d"
84 #define TX_TIMEOUT (50*HZ/1000) /* 50ms */
85 #define RESTART_MS 100 /* restart chip on persistent errors in 100ms */
86 #define MAX_BUS_ERRORS 200 /* prevent from flooding bus error interrupts */
91 #define SAMPLE_POINT 62
92 #define JUMPWIDTH 0x40
94 typedef struct canmessage {
98 uint8_t messageConfigReg;
100 } canmessage_t; // __attribute__ ((packed));
102 typedef struct canregs {
107 canmessage_t messageReg;
108 uint8_t someOtherReg; // padding
112 uint8_t controlReg; // Control Register
113 uint8_t statusReg; // Status Register
114 uint8_t cpuInterfaceReg; // CPU Interface Register
115 uint8_t reserved1Reg;
116 uint8_t highSpeedReadReg[2]; // High Speed Read
117 uint8_t globalMaskStandardReg[2]; // Standard Global Mask byte 0
118 uint8_t globalMaskExtendedReg[4]; // Extended Global Mask bytes
119 uint8_t message15MaskReg[4]; // Message 15 Mask bytes
120 canmessage_t message1Reg;
121 uint8_t clkOutReg; // Clock Out Register
122 canmessage_t message2Reg;
123 uint8_t busConfigReg; // Bus Configuration Register
124 canmessage_t message3Reg;
125 uint8_t bitTiming0Reg; // Bit Timing Register byte 0
126 canmessage_t message4Reg;
127 uint8_t bitTiming1Reg; // Bit Timing Register byte 1
128 canmessage_t message5Reg;
129 uint8_t interruptReg; // Interrupt Register
130 canmessage_t message6Reg;
131 uint8_t reserved2Reg;
132 canmessage_t message7Reg;
133 uint8_t reserved3Reg;
134 canmessage_t message8Reg;
135 uint8_t reserved4Reg;
136 canmessage_t message9Reg;
138 canmessage_t message10Reg;
140 canmessage_t message11Reg;
142 canmessage_t message12Reg;
144 canmessage_t message13Reg;
146 canmessage_t message14Reg;
148 canmessage_t message15Reg;
149 uint8_t serialResetAddressReg;
152 } canregs_t; // __attribute__ ((packed));
154 /* Control Register (0x00) */
156 iCTL_INI = 1, // Initialization
157 iCTL_IE = 1<<1, // Interrupt Enable
158 iCTL_SIE = 1<<2, // Status Interrupt Enable
159 iCTL_EIE = 1<<3, // Error Interrupt Enable
160 iCTL_CCE = 1<<6 // Change Configuration Enable
163 /* Status Register (0x01) */
165 iSTAT_TXOK = 1<<3, // Transmit Message Successfully
166 iSTAT_RXOK = 1<<4, // Receive Message Successfully
167 iSTAT_WAKE = 1<<5, // Wake Up Status
168 iSTAT_WARN = 1<<6, // Warning Status
169 iSTAT_BOFF = 1<<7 // Bus Off Status
172 /* CPU Interface Register (0x02) */
174 iCPU_CEN = 1, // Clock Out Enable
175 iCPU_MUX = 1<<2, // Multiplex
176 iCPU_SLP = 1<<3, // Sleep
177 iCPU_PWD = 1<<4, // Power Down Mode
178 iCPU_DMC = 1<<5, // Divide Memory Clock
179 iCPU_DSC = 1<<6, // Divide System Clock
180 iCPU_RST = 1<<7, // Hardware Reset Status
183 /* Clock Out Register (0x1f) */
185 iCLK_CD0 = 1, // Clock Divider bit 0
189 iCLK_SL0 = 1<<4, // Slew Rate bit 0
193 /* Bus Configuration Register (0x2f) */
195 iBUS_DR0 = 1, // Disconnect RX0 Input
196 iBUS_DR1 = 1<<1, // Disconnect RX1 Input
197 iBUS_DT1 = 1<<3, // Disconnect TX1 Output
198 iBUS_POL = 1<<5, // Polarity
199 iBUS_CBY = 1<<6 // Comparator Bypass
202 #define RESET 1 // Bit Pair Reset Status
203 #define SET 2 // Bit Pair Set Status
204 #define UNCHANGED 3 // Bit Pair Unchanged
206 /* Message Control Register 0 (Base Address + 0x0) */
207 enum i82527_iMSGCTL0 {
208 INTPD_SET = SET, // Interrupt pending
209 INTPD_RES = RESET, // No Interrupt pending
210 INTPD_UNC = UNCHANGED,
211 RXIE_SET = SET<<2, // Receive Interrupt Enable
212 RXIE_RES = RESET<<2, // Receive Interrupt Disable
213 RXIE_UNC = UNCHANGED<<2,
214 TXIE_SET = SET<<4, // Transmit Interrupt Enable
215 TXIE_RES = RESET<<4, // Transmit Interrupt Disable
216 TXIE_UNC = UNCHANGED<<4,
217 MVAL_SET = SET<<6, // Message Valid
218 MVAL_RES = RESET<<6, // Message Invalid
219 MVAL_UNC = UNCHANGED<<6
222 /* Message Control Register 1 (Base Address + 0x01) */
223 enum i82527_iMSGCTL1 {
224 NEWD_SET = SET, // New Data
225 NEWD_RES = RESET, // No New Data
226 NEWD_UNC = UNCHANGED,
227 MLST_SET = SET<<2, // Message Lost
228 MLST_RES = RESET<<2, // No Message Lost
229 MLST_UNC = UNCHANGED<<2,
230 CPUU_SET = SET<<2, // CPU Updating
231 CPUU_RES = RESET<<2, // No CPU Updating
232 CPUU_UNC = UNCHANGED<<2,
233 TXRQ_SET = SET<<4, // Transmission Request
234 TXRQ_RES = RESET<<4, // No Transmission Request
235 TXRQ_UNC = UNCHANGED<<4,
236 RMPD_SET = SET<<6, // Remote Request Pending
237 RMPD_RES = RESET<<6, // No Remote Request Pending
238 RMPD_UNC = UNCHANGED<<6
241 /* Message Configuration Register (Base Address + 0x06) */
242 enum i82527_iMSGCFG {
243 MCFG_XTD = 1<<2, // Extended Identifier
244 MCFG_DIR = 1<<3 // Direction is Transmit
251 #define CANout(base,adr,v) \
252 printk("CANout: (%lx+%x)=%x\n", base,\
253 (int)(long)&((canregs_t *)0)->adr,v)
255 #define CANin(base,adr) \
256 printk("CANin: (%lx+%x)\n", base, (int)(long)&((canregs_t *)0)->adr)
261 #define CANout(base,adr,v) \
262 (printk("CANout: (%lx+%x)=%x\n", base,\
263 (int)(long)&((canregs_t *)0)->adr,v),\
264 hw_writereg(base, (int)(long)&((canregs_t *)0)->adr, v))
266 #define CANout(base,adr,v) hw_writereg(base,\
267 (int)(long)&((canregs_t *)0)->adr, v)
270 #define CANin(base,adr) hw_readreg(base, (int)(long)&((canregs_t *)0)->adr)
274 /* CAN private data structure */
277 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
278 struct net_device_stats stats;
280 struct can_device_stats can_stats;
290 struct timer_list timer;
294 #define STATE_UNINITIALIZED 0
295 #define STATE_PROBE 1
296 #define STATE_ACTIVE 2
297 #define STATE_ERROR_ACTIVE 3
298 #define STATE_ERROR_PASSIVE 4
299 #define STATE_BUS_OFF 5
300 #define STATE_RESET_MODE 6
302 void can_proc_create(const char *drv_name);
303 void can_proc_remove(const char *drv_name);
305 #endif /* I82527_H */