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drm/i915: add aux_ch_ctl_reg to struct intel_dp
2013-02-20 Paulo Zanonidrm/i915: add aux_ch_ctl_reg to struct intel_dp
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Paulo Zanonidrm/i915: wait_event_timeout's timeout is in jiffies
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Paulo Zanonidrm/i915: use HAS_DDI on intel_hdmi.c and intel_display.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Mika Kuoppaladrm/i915: remove obsolete obj assignment in page flip
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Jani Nikuladrm/i915: add \n to the end of sysfs attributes
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Ville Syrjälädrm/i915: Finish page flips and update primary planes...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Ville Syrjälädrm/i915: Really wait for pending flips when panning
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Damien Lespiaudrm/i915: Remove platforms in the preliminary_hw_support...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Jesse Barnesfb: add support for drivers not needing VT switch at...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-20 Jesse BarnesPM: make VT switching to the suspend console optional v3
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Daniel Vetterintel/iommu: force writebuffer-flush quirk on Gen 4...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Chris Wilsondrm/i915: Disable WC PTE updates to w/a buggy IOMMU...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm/i915: Implement pipe CSC based limited range RGB...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Daniel Vetterdrm/i915: inverted brightness quirk for Acer Aspire...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ben Widawskydrm/i915: Print the hw context status is debugfs
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Daniel Vetterdrm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remap
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm/i915: Fix PIPE_CONTROL DW/QW write through global...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Patrik Jakobssondrm/i915: Set i9xx sdvo clock limits according to specifications
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Patrik Jakobssondrm/i915: Set i9xx lvds clock limits according to specifications
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Damien Lespiaudrm/i915: Preserve the DDI link reversal configuration
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Damien Lespiaudrm/i915: Preserve the FDI line reversal override bit...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Jani Nikuladrm/i915: add missing \n to UTS_RELEASE in the error_state
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm: Use C8 instead of RGB332 when determining the...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm: Fill depth/bits_per_pixel for C8 format
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Imre Deakdrm/i915: don't clflush gem objects in stolen memory
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm/i915: Don't wait for page flips if there was GPU...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm/i915: Kill obj->pending_flip
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Damien Lespiaudrm/i915: Fix a typo in a intel_modeset_stage_output_state...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Daniel Vetterdrm/i915: remove bogus mutex_unlock from error-path
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Ville Syrjälädrm/i915: Print the pipe control page GTT address
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Mika Kuoppaladrm/i915: clean up panel fitter handling in lvds
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Mika Kuoppaladrm/i915: disable shared panel fitter for pipe
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-19 Daniel Vetterdrm/i915: detect wrong MCH watermark values
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Ben Widawskydrm/i915/ctx: Remove bad invariant
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Ben Widawskydrm/i915: Extract ring init from hw_init
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Ben Widawskydrm/i915: Fix gen2 mappable calculations
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Paulo Zanonidrm/i915: add ibx_irq_postinstall
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Ville Syrjälädrm/i915: Fix sprite_scaling_enabled for multiple sprites
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Daniel Vetterdrm/i915: unify HDMI/DP hpd definitions
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Ben Widawskydrm/i915: Clarify HW context size logic
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-15 Daniel Vetterdrm/i915: write backlight harder
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-13 Zhang Ruii915: ignore lid open event when resuming
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-13 Ben Widawskydrm/i915: Fix RC6VIDS encode/decode
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-02-01 Yasuaki IshimatsuGPU/i915: Fix acpi_bus_get_device() check in drivers...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ville Syrjälädrm/i915: Set the SR01 "screen off" bit in i915_redisable_vg...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ville Syrjälädrm/i915: Kill IS_DISPLAYREG()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ville Syrjälädrm/i915: Introduce i915_vgacntrl_reg()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Changlong Xiedrm/i915: gen6_gmch_remove can be static
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: dynamic Haswell display power well support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Paulo Zanonidrm/i915: check the power down well on assert_pipe()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Paulo Zanonidrm/i915: don't send DP "idle" pattern before "normal...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: don't run hsw power well code on !hsw
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: kill cargo-culted locking from power well...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Chris Wilsondrm/i915: Only run idle processing from i915_gem_retire_requ...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ben Widawskydrm/i915: Fix CAGF for HSW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ben Widawskydrm/i915: Reclaim GTT space for failed PPGTT
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ben Widawskydrm/i915: remove intel_gtt structure
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ben Widawskydrm/i915: Add probe and remove to the gtt ops
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: extract hw ppgtt setup/cleanup code
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: pte_encode is gen6+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: vfuncs for ppgtt
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: vfuncs for gtt_clear_range/insert_entries
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Ben Widawskydrm/i915: Error state should print /sys/kernel/debug
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: move DP save/restore into i915_ums.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: dont save/restore VGA state for kms
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-31 Daniel Vetterdrm/i915: extract ums suspend/resume into i915_ums.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-28 Daniel Vetterdrm/i915: move modeset checks out of save/restore_modeset_reg
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-28 Ben Widawskydrm/i915: Implement WaVSRefCountFullforceMissDisable
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-27 Paulo Zanonidrm/i915: turn on the power well before suspending
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-27 Paulo Zanonidrm/i915: set TRANSCODER_EDP even earlier
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Paulo Zanonidrm/i915: only disable enabled planes on intel_fb_restore_mode
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Paulo Zanonidrm/i915: fix intel_init_power_wells
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: SWF screatch registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: Include display_mmio_offset in sequencer...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: Pass VLV_DISPLAY_BASE + reg to intel_{hdmi...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: VLV doesn't have SDVO
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: Always use adpa_reg
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-26 Ville Syrjälädrm/i915: PLL registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Set display_mmio_offset for VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: GPIO/GMBUS registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: DPIO registers are VLV only and need an offset
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Spell out VLV_DISPLAY_BASE for interrupt...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Make VLV_GUNIT_CLOCK_GATE register value...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: FB_BLC_SELF_VLV is VLV only and needs an...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Pipe palette registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Pipe timing registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: PORT_HOTPLUG registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Panel fitter registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: DPFLIPSTAT and DPINVGTT registers are VLV...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: DSPFW registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: VLV_DDL is VLV only and needs an offset
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Cursor registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Pipe registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Primary plane registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: PIPE M/N registers need an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: VLV_VIDEO_DIP_CTL is for VLV only
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Per-pipe PP registers are for VLV only
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: AUD_VID_DID needs an offset on VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Add display_display_mmio_offset to intel_device_info
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2013-01-24 Ville Syrjälädrm/i915: Convert intel_dp to enum port
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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