Don't try and enable clockgating if the asic doesn't have
UVD. Use rdev->has_uvd rather than using local checks.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
static void si_init_cg(struct radeon_device *rdev)
{
static void si_init_cg(struct radeon_device *rdev)
{
si_enable_mgcg(rdev, true);
si_enable_cgcg(rdev, true);
/* disable MC LS on Tahiti */
if (rdev->family == CHIP_TAHITI)
si_enable_mc_ls(rdev, false);
si_enable_mgcg(rdev, true);
si_enable_cgcg(rdev, true);
/* disable MC LS on Tahiti */
if (rdev->family == CHIP_TAHITI)
si_enable_mc_ls(rdev, false);
si_enable_uvd_mgcg(rdev, true);
si_init_uvd_internal_cg(rdev);
}
si_enable_uvd_mgcg(rdev, true);
si_init_uvd_internal_cg(rdev);
}
static void si_fini_cg(struct radeon_device *rdev)
{
static void si_fini_cg(struct radeon_device *rdev)
{
- bool has_uvd = true;
-
- if (has_uvd)
si_enable_uvd_mgcg(rdev, false);
si_enable_cgcg(rdev, false);
si_enable_mgcg(rdev, false);
si_enable_uvd_mgcg(rdev, false);
si_enable_cgcg(rdev, false);
si_enable_mgcg(rdev, false);