voipac mx53: dt043btft display

diff --git a/arch/arm/boot/dts/imx53-voipac.dts b/arch/arm/boot/dts/imx53-voipac.dts
index 56e8f2dd956cd56a29212cc93de683682ce57b8b..6fb1073aa25845a007d09d9395d7a53c97299e61 100644 (file)
--- a/arch/arm/boot/dts/imx53-voipac.dts
+++ b/arch/arm/boot/dts/imx53-voipac.dts
@@ -46,25 +46,26 @@
                compatible = "fsl,imx-parallel-display";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_ipu_disp0_1>;
-               edid = [ 00 ff ff ff ff ff ff 00
-               31 d8 00 00 00 00 00 00
-               05 16 01 03 6d 0c 07 78
-               ea 5e c0 a4 59 4a 98 25
-               20 50 54 00 00 00 1d c0
-               01 01 01 01 01 01 01 01
-               01 01 01 01 01 01 dc 05
-               e0 80 10 10 2d 10 0a 22
-               16 00 7d 46 00 00 00 18
-               00 00 00 ff 00 4c 69 6e
-               75 78 20 23 30 0a 20 20
-               20 20 00 00 00 fd 00 3b
-               3d 17 19 02 00 0a 20 20
-               20 20 20 20 00 00 00 fc
-               00 4c 69 6e 75 78 20 46
-               48 44 0a 20 20 20 00 8b ];
                crtcs = <&ipu 0>;
                interface-pix-fmt = "rgb24";
                status = "okay";
+
+               display-timings {
+                       dt043btft {
+                               /* native-mode; */
+                               clock-frequency = <10000000>;
+                               hactive = <480>;
+                               vactive = <272>;
+                               hback-porch = <2>;
+                               hfront-porch = <2>;
+                               hsync-len = <40>;
+                               vback-porch = <2>;
+                               vfront-porch = <2>;
+                               vsync-len = <10>;
+                               hsync-active = <0>;
+                               vsync-active = <0>;
+                       };
+               };
        };
 };
 
@@ -84,50 +85,12 @@
                                /* FEC RST */
                                MX53_PAD_GPIO_12__GPIO4_2       0x80000000
 
-                       >;
-               };
-       };
-
-       disp0 {
-               pinctrl_ipu_disp0_1: ipudisp0grp1 {
-                       fsl,pins = <
-                               MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK  0x80000000
-                               MX53_PAD_DI0_PIN15__IPU_DI0_PIN15        0x80000000
-                               MX53_PAD_DI0_PIN2__IPU_DI0_PIN2          0x80000000
-                               MX53_PAD_DI0_PIN3__IPU_DI0_PIN3          0x80000000
-                               MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0     0x80000000
-                               MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1     0x80000000
-                               MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2     0x80000000
-                               MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3     0x80000000
-                               MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4     0x80000000
-                               MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5     0x80000000
-                               MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6     0x80000000
-                               MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7     0x80000000
-                               MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8     0x80000000
-                               MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9     0x80000000
-                               MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10   0x80000000
-                               MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11   0x80000000
-                               MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12   0x80000000
-                               MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13   0x80000000
-                               MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14   0x80000000
-                               MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15   0x80000000
-                               MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16   0x80000000
-                               MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17   0x80000000
-                               MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18   0x80000000
-                               MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19   0x80000000
-                               MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20   0x80000000
-                               MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21   0x80000000
-                               MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22   0x80000000
-                               MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23   0x80000000
-                       >;
-               };
-       };
-
-       i2c1 {
-               pinctrl_i2c1_2: i2c1grp2 {
-                       fsl,pins = <
-                               MX53_PAD_EIM_D21__I2C1_SCL              0xc0000000
-                               MX53_PAD_EIM_D28__I2C1_SDA              0xc0000000
+                               /* SPI */
+                               MX53_PAD_EIM_EB2__GPIO2_30      0x80000000
+                               MX53_PAD_EIM_D19__GPIO3_19      0x80000000
+                               MX53_PAD_EIM_A22__GPIO2_16      0x80000000
+                               MX53_PAD_EIM_A21__GPIO2_17      0x80000000
+                               MX53_PAD_EIM_A18__GPIO2_20      0x80000000
                        >;
                };
        };