]> rtime.felk.cvut.cz Git - linux-imx.git/commitdiff
ARM: dts: fix highbank cpu mpidr values
authorRob Herring <rob.herring@calxeda.com>
Sun, 30 Dec 2012 16:15:03 +0000 (10:15 -0600)
committerOlof Johansson <olof@lixom.net>
Tue, 8 Jan 2013 05:08:23 +0000 (21:08 -0800)
With the addition of commit a0ae0240 (ARM: kernel: add device tree init
map function), the cpu reg values must match the cpu mpidr register or we'll
get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg
value needs to be 0x90n to quiet the warnings.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/highbank.dts

index 81e0bfa6c1754c8beaa1a1b11863bc1415310b26..5927a8df562536550b101669f45978f33907e0ac 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu@900 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
-                       reg = <0>;
+                       reg = <0x900>;
                        next-level-cache = <&L2>;
                        clocks = <&a9pll>;
                        clock-names = "cpu";
                };
 
-               cpu@1 {
+               cpu@901 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
-                       reg = <1>;
+                       reg = <0x901>;
                        next-level-cache = <&L2>;
                        clocks = <&a9pll>;
                        clock-names = "cpu";
                };
 
-               cpu@2 {
+               cpu@902 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
-                       reg = <2>;
+                       reg = <0x902>;
                        next-level-cache = <&L2>;
                        clocks = <&a9pll>;
                        clock-names = "cpu";
                };
 
-               cpu@3 {
+               cpu@903 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
-                       reg = <3>;
+                       reg = <0x903>;
                        next-level-cache = <&L2>;
                        clocks = <&a9pll>;
                        clock-names = "cpu";