]> rtime.felk.cvut.cz Git - linux-imx.git/commitdiff
drm/i915: add intel_using_power_well
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 22 Mar 2013 17:14:13 +0000 (14:14 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 18 Apr 2013 07:43:22 +0000 (09:43 +0200)
It returns true if we've requested to turn the power well on and it's
really on. It also returns true for all the previous gens.

For now there's just one caller, but I'm going to add more.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c

index 457a0a03c0634c12942597ebabc36d6770543b35..236d268d809c4b4386a28925266bd4939e67ae40 100644 (file)
@@ -1227,8 +1227,8 @@ void assert_pipe(struct drm_i915_private *dev_priv,
        if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
                state = true;
 
-       if (IS_HASWELL(dev_priv->dev) && cpu_transcoder != TRANSCODER_EDP &&
-           !(I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_ENABLE)) {
+       if (!intel_using_power_well(dev_priv->dev) &&
+           cpu_transcoder != TRANSCODER_EDP) {
                cur_state = false;
        } else {
                reg = PIPECONF(cpu_transcoder);
index d7bd031dd64279d9adac2c58cca95ad465cc902c..a124e05fb5810749a38c9054051f1f76a1b1d42c 100644 (file)
@@ -693,6 +693,7 @@ extern void intel_update_fbc(struct drm_device *dev);
 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 extern void intel_gpu_ips_teardown(void);
 
+extern bool intel_using_power_well(struct drm_device *dev);
 extern void intel_init_power_well(struct drm_device *dev);
 extern void intel_set_power_well(struct drm_device *dev, bool enable);
 extern void intel_enable_gt_powersave(struct drm_device *dev);
index baea4fce5a3488c4fc72334bab035b4930fb973e..4dc06a1bd43d77d446101c1e5f670646b32692c0 100644 (file)
@@ -4085,6 +4085,22 @@ void intel_init_clock_gating(struct drm_device *dev)
        dev_priv->display.init_clock_gating(dev);
 }
 
+/**
+ * We should only use the power well if we explicitly asked the hardware to
+ * enable it, so check if it's enabled and also check if we've requested it to
+ * be enabled.
+ */
+bool intel_using_power_well(struct drm_device *dev)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+
+       if (IS_HASWELL(dev))
+               return I915_READ(HSW_PWR_WELL_DRIVER) ==
+                      (HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);
+       else
+               return true;
+}
+
 void intel_set_power_well(struct drm_device *dev, bool enable)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;