2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
24 # define save_i387_xstate_ia32 save_i387_xstate
25 # define restore_i387_xstate_ia32 restore_i387_xstate
26 # define _fpstate_ia32 _fpstate
27 # define _xstate_ia32 _xstate
28 # define sig_xstate_ia32_size sig_xstate_size
29 # define fx_sw_reserved_ia32 fx_sw_reserved
30 # define user_i387_ia32_struct user_i387_struct
31 # define user32_fxsr_struct user_fxsr_struct
34 #ifdef CONFIG_MATH_EMULATION
35 # define HAVE_HWFP (boot_cpu_data.hard_math)
40 static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
41 unsigned int xstate_size;
42 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
43 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
45 void __cpuinit mxcsr_feature_mask_init(void)
47 unsigned long mask = 0;
51 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
52 asm volatile("fxsave %0" : : "m" (fx_scratch));
53 mask = fx_scratch.mxcsr_mask;
57 mxcsr_feature_mask &= mask;
61 void __cpuinit init_thread_xstate(void)
64 xstate_size = sizeof(struct i387_soft_struct);
74 xstate_size = sizeof(struct i387_fxsave_struct);
77 xstate_size = sizeof(struct i387_fsave_struct);
83 * Called at bootup to set up the initial FPU state that is later cloned
86 void __cpuinit fpu_init(void)
88 unsigned long oldcr0 = read_cr0();
90 set_in_cr4(X86_CR4_OSFXSR);
91 set_in_cr4(X86_CR4_OSXMMEXCPT);
93 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
96 * Boot processor to setup the FP and extended state context info.
98 if (!smp_processor_id())
102 mxcsr_feature_mask_init();
103 /* clean state in init */
105 current_thread_info()->status = TS_XSAVE;
107 current_thread_info()->status = 0;
110 #endif /* CONFIG_X86_64 */
113 * The _current_ task is using the FPU for the first time
114 * so initialize it and set the mxcsr to its default
115 * value at reset if we support XMM instructions and then
116 * remeber the current task has used the FPU.
118 int init_fpu(struct task_struct *tsk)
120 if (tsk_used_math(tsk)) {
121 if (HAVE_HWFP && tsk == current)
127 * Memory allocation at the first usage of the FPU and other state.
129 if (!tsk->thread.xstate) {
130 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
132 if (!tsk->thread.xstate)
138 memset(tsk->thread.xstate, 0, xstate_size);
140 set_stopped_child_used_math(tsk);
146 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
148 memset(fx, 0, xstate_size);
151 fx->mxcsr = MXCSR_DEFAULT;
153 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
154 memset(fp, 0, xstate_size);
155 fp->cwd = 0xffff037fu;
156 fp->swd = 0xffff0000u;
157 fp->twd = 0xffffffffu;
158 fp->fos = 0xffff0000u;
161 * Only the device not available exception or ptrace can call init_fpu.
163 set_stopped_child_used_math(tsk);
168 * The xstateregs_active() routine is the same as the fpregs_active() routine,
169 * as the "regset->n" for the xstate regset will be updated based on the feature
170 * capabilites supported by the xsave.
172 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
174 return tsk_used_math(target) ? regset->n : 0;
177 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
179 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
182 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
183 unsigned int pos, unsigned int count,
184 void *kbuf, void __user *ubuf)
191 ret = init_fpu(target);
195 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
196 &target->thread.xstate->fxsave, 0, -1);
199 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
200 unsigned int pos, unsigned int count,
201 const void *kbuf, const void __user *ubuf)
208 ret = init_fpu(target);
212 set_stopped_child_used_math(target);
214 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
215 &target->thread.xstate->fxsave, 0, -1);
218 * mxcsr reserved bits must be masked to zero for security reasons.
220 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
223 * update the header bits in the xsave header, indicating the
224 * presence of FP and SSE state.
227 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
232 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
233 unsigned int pos, unsigned int count,
234 void *kbuf, void __user *ubuf)
241 ret = init_fpu(target);
246 * Copy the 48bytes defined by the software first into the xstate
247 * memory layout in the thread struct, so that we can copy the entire
248 * xstateregs to the user using one user_regset_copyout().
250 memcpy(&target->thread.xstate->fxsave.sw_reserved,
251 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
254 * Copy the xstate memory layout.
256 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
257 &target->thread.xstate->xsave, 0, -1);
261 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
262 unsigned int pos, unsigned int count,
263 const void *kbuf, const void __user *ubuf)
266 struct xsave_hdr_struct *xsave_hdr;
271 ret = init_fpu(target);
275 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
276 &target->thread.xstate->xsave, 0, -1);
279 * mxcsr reserved bits must be masked to zero for security reasons.
281 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
283 xsave_hdr = &target->thread.xstate->xsave.xsave_hdr;
285 xsave_hdr->xstate_bv &= pcntxt_mask;
287 * These bits must be zero.
289 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
294 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
297 * FPU tag word conversions.
300 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
302 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
304 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
306 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
307 /* and move the valid bits to the lower byte. */
308 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
309 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
310 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
315 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
316 #define FP_EXP_TAG_VALID 0
317 #define FP_EXP_TAG_ZERO 1
318 #define FP_EXP_TAG_SPECIAL 2
319 #define FP_EXP_TAG_EMPTY 3
321 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
324 u32 tos = (fxsave->swd >> 11) & 7;
325 u32 twd = (unsigned long) fxsave->twd;
327 u32 ret = 0xffff0000u;
330 for (i = 0; i < 8; i++, twd >>= 1) {
332 st = FPREG_ADDR(fxsave, (i - tos) & 7);
334 switch (st->exponent & 0x7fff) {
336 tag = FP_EXP_TAG_SPECIAL;
339 if (!st->significand[0] &&
340 !st->significand[1] &&
341 !st->significand[2] &&
343 tag = FP_EXP_TAG_ZERO;
345 tag = FP_EXP_TAG_SPECIAL;
348 if (st->significand[3] & 0x8000)
349 tag = FP_EXP_TAG_VALID;
351 tag = FP_EXP_TAG_SPECIAL;
355 tag = FP_EXP_TAG_EMPTY;
357 ret |= tag << (2 * i);
363 * FXSR floating point environment conversions.
367 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
369 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
370 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
371 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
374 env->cwd = fxsave->cwd | 0xffff0000u;
375 env->swd = fxsave->swd | 0xffff0000u;
376 env->twd = twd_fxsr_to_i387(fxsave);
379 env->fip = fxsave->rip;
380 env->foo = fxsave->rdp;
381 if (tsk == current) {
383 * should be actually ds/cs at fpu exception time, but
384 * that information is not available in 64bit mode.
386 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
387 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
389 struct pt_regs *regs = task_pt_regs(tsk);
391 env->fos = 0xffff0000 | tsk->thread.ds;
395 env->fip = fxsave->fip;
396 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
397 env->foo = fxsave->foo;
398 env->fos = fxsave->fos;
401 for (i = 0; i < 8; ++i)
402 memcpy(&to[i], &from[i], sizeof(to[0]));
405 static void convert_to_fxsr(struct task_struct *tsk,
406 const struct user_i387_ia32_struct *env)
409 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
410 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
411 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
414 fxsave->cwd = env->cwd;
415 fxsave->swd = env->swd;
416 fxsave->twd = twd_i387_to_fxsr(env->twd);
417 fxsave->fop = (u16) ((u32) env->fcs >> 16);
419 fxsave->rip = env->fip;
420 fxsave->rdp = env->foo;
421 /* cs and ds ignored */
423 fxsave->fip = env->fip;
424 fxsave->fcs = (env->fcs & 0xffff);
425 fxsave->foo = env->foo;
426 fxsave->fos = env->fos;
429 for (i = 0; i < 8; ++i)
430 memcpy(&to[i], &from[i], sizeof(from[0]));
433 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
434 unsigned int pos, unsigned int count,
435 void *kbuf, void __user *ubuf)
437 struct user_i387_ia32_struct env;
440 ret = init_fpu(target);
445 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
448 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
449 &target->thread.xstate->fsave, 0,
453 if (kbuf && pos == 0 && count == sizeof(env)) {
454 convert_from_fxsr(kbuf, target);
458 convert_from_fxsr(&env, target);
460 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
463 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
464 unsigned int pos, unsigned int count,
465 const void *kbuf, const void __user *ubuf)
467 struct user_i387_ia32_struct env;
470 ret = init_fpu(target);
474 set_stopped_child_used_math(target);
477 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
480 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
481 &target->thread.xstate->fsave, 0, -1);
484 if (pos > 0 || count < sizeof(env))
485 convert_from_fxsr(&env, target);
487 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
489 convert_to_fxsr(target, &env);
492 * update the header bit in the xsave header, indicating the
496 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
501 * Signal frame handlers.
504 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
506 struct task_struct *tsk = current;
507 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
509 fp->status = fp->swd;
510 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
515 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
517 struct task_struct *tsk = current;
518 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
519 struct user_i387_ia32_struct env;
522 convert_from_fxsr(&env, tsk);
523 if (__copy_to_user(buf, &env, sizeof(env)))
526 err |= __put_user(fx->swd, &buf->status);
527 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
531 if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
536 static int save_i387_xsave(void __user *buf)
538 struct task_struct *tsk = current;
539 struct _fpstate_ia32 __user *fx = buf;
543 * For legacy compatible, we always set FP/SSE bits in the bit
544 * vector while saving the state to the user context.
545 * This will enable us capturing any changes(during sigreturn) to
546 * the FP/SSE bits by the legacy applications which don't touch
547 * xstate_bv in the xsave header.
549 * xsave aware applications can change the xstate_bv in the xsave
550 * header as well as change any contents in the memory layout.
551 * xrestore as part of sigreturn will capture all the changes.
553 tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
555 if (save_i387_fxsave(fx) < 0)
558 err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
559 sizeof(struct _fpx_sw_bytes));
560 err |= __put_user(FP_XSTATE_MAGIC2,
561 (__u32 __user *) (buf + sig_xstate_ia32_size
562 - FP_XSTATE_MAGIC2_SIZE));
569 int save_i387_xstate_ia32(void __user *buf)
571 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
572 struct task_struct *tsk = current;
577 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
580 * This will cause a "finit" to be triggered by the next
581 * attempted FPU operation by the 'current' process.
586 return fpregs_soft_get(current, NULL,
587 0, sizeof(struct user_i387_ia32_struct),
594 return save_i387_xsave(fp);
596 return save_i387_fxsave(fp);
598 return save_i387_fsave(fp);
601 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
603 struct task_struct *tsk = current;
605 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
606 sizeof(struct i387_fsave_struct));
609 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
612 struct task_struct *tsk = current;
613 struct user_i387_ia32_struct env;
616 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
618 /* mxcsr reserved bits must be masked to zero for security reasons */
619 tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
620 if (err || __copy_from_user(&env, buf, sizeof(env)))
622 convert_to_fxsr(tsk, &env);
627 static int restore_i387_xsave(void __user *buf)
629 struct _fpx_sw_bytes fx_sw_user;
630 struct _fpstate_ia32 __user *fx_user =
631 ((struct _fpstate_ia32 __user *) buf);
632 struct i387_fxsave_struct __user *fx =
633 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
634 struct xsave_hdr_struct *xsave_hdr =
635 ¤t->thread.xstate->xsave.xsave_hdr;
639 if (check_for_xstate(fx, buf, &fx_sw_user))
642 mask = fx_sw_user.xstate_bv;
644 err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
646 xsave_hdr->xstate_bv &= pcntxt_mask;
648 * These bits must be zero.
650 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
653 * Init the state that is not present in the memory layout
654 * and enabled by the OS.
656 mask = ~(pcntxt_mask & ~mask);
657 xsave_hdr->xstate_bv &= mask;
662 * Couldn't find the extended state information in the memory
663 * layout. Restore the FP/SSE and init the other extended state
666 xsave_hdr->xstate_bv = XSTATE_FPSSE;
667 return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
670 int restore_i387_xstate_ia32(void __user *buf)
673 struct task_struct *tsk = current;
674 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
687 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
698 err = restore_i387_xsave(buf);
699 else if (cpu_has_fxsr)
700 err = restore_i387_fxsave(fp, sizeof(struct
701 i387_fxsave_struct));
703 err = restore_i387_fsave(fp);
705 err = fpregs_soft_set(current, NULL,
706 0, sizeof(struct user_i387_ia32_struct),
715 * FPU state for core dumps.
716 * This is only used for a.out dumps now.
717 * It is declared generically using elf_fpregset_t (which is
718 * struct user_i387_struct) but is in fact only used for 32-bit
719 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
721 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
723 struct task_struct *tsk = current;
726 fpvalid = !!used_math();
728 fpvalid = !fpregs_get(tsk, NULL,
729 0, sizeof(struct user_i387_ia32_struct),
734 EXPORT_SYMBOL(dump_fpu);
736 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */