2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2011 by Kevin Cernekee (cernekee@gmail.com)
8 * Reset/NMI/re-entry vectors for BMIPS processors
11 #include <linux/init.h>
14 #include <asm/asmmacro.h>
15 #include <asm/cacheops.h>
16 #include <asm/regdef.h>
17 #include <asm/mipsregs.h>
18 #include <asm/stackframe.h>
19 #include <asm/addrspace.h>
20 #include <asm/hazards.h>
21 #include <asm/bmips.h>
31 /***********************************************************************
32 * Alternate CPU1 startup vector for BMIPS4350
34 * On some systems the bootloader has already started CPU1 and configured
35 * it to resume execution at 0x8000_0200 (!BEV IV vector) when it is
36 * triggered by the SW1 interrupt. If that is the case we try to move
37 * it to a more convenient place: BMIPS_WARM_RESTART_VEC @ 0x8000_0380.
38 ***********************************************************************/
40 LEAF(bmips_smp_movevec)
47 /* clear IV, pending IPIs */
50 /* re-enable IRQs to wait for SW1 */
51 li k0, ST0_IE | ST0_BEV | STATUSF_IP1
54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */
57 li k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1
62 /* wait here for SW1 interrupt from bmips_boot_secondary() */
65 la k0, bmips_reset_nmi_vec
69 END(bmips_smp_movevec)
71 /***********************************************************************
73 * For BMIPS processors that can relocate their exception vectors, this
74 * entire function gets copied to 0x8000_0000.
75 ***********************************************************************/
77 NESTED(bmips_reset_nmi_vec, PT_SIZE, sp)
83 /* if the NMI bit is clear, assume this is a CPU1 reset instead */
87 beqz k0, bmips_smp_entry
89 #if defined(CONFIG_CPU_BMIPS5000)
90 /* if we're not on core 0, this must be the SMP boot signal */
94 bnez k0, bmips_smp_entry
96 #endif /* CONFIG_SMP */
98 /* nope, it's just a regular NMI */
102 /* clear EXL, ERL, BEV so that TLB refills still work */
104 li k1, ST0_ERL | ST0_EXL | ST0_BEV | ST0_IE
110 /* jump to the NMI handler function */
118 /***********************************************************************
119 * CPU1 reset vector (used for the initial boot only)
120 * This is still part of bmips_reset_nmi_vec().
121 ***********************************************************************/
127 /* set up CP0 STATUS; enable FPU */
132 /* set local CP0 CONFIG to make kseg0 cacheable, write-back */
138 #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
139 /* initialize CPU1's local I-cache */
146 1: cache Index_Store_Tag_I, 0(k0)
149 #elif defined(CONFIG_CPU_BMIPS5000)
150 /* set exception vector base */
157 /* jump back to kseg0 in case we need to remap the kseg1 area */
161 la k0, bmips_enable_xks01
164 /* use temporary stack to set up upper memory TLB */
165 li sp, BMIPS_WARM_RESTART_VEC
166 la k0, plat_wired_tlb_setup
169 /* switch to permanent stack and continue booting */
171 .global bmips_secondary_reentry
172 bmips_secondary_reentry:
173 la k0, bmips_smp_boot_sp
175 la k0, bmips_smp_boot_gp
177 la k0, start_secondary
180 #endif /* CONFIG_SMP */
183 .global bmips_reset_nmi_vec_end
184 bmips_reset_nmi_vec_end:
186 END(bmips_reset_nmi_vec)
191 /***********************************************************************
192 * CPU1 warm restart vector (used for second and subsequent boots).
193 * Also used for S2 standby recovery (PM).
194 * This entire function gets copied to (BMIPS_WARM_RESTART_VEC)
195 ***********************************************************************/
197 LEAF(bmips_smp_int_vec)
207 .global bmips_smp_int_vec_end
208 bmips_smp_int_vec_end:
210 END(bmips_smp_int_vec)
212 /***********************************************************************
214 * Certain CPUs support extending kseg0 to 1024MB.
215 ***********************************************************************/
217 LEAF(bmips_enable_xks01)
219 #if defined(CONFIG_XKS01)
221 #if defined(CONFIG_CPU_BMIPS4380)
224 li t2, (1 << 12) | (1 << 9)
230 #elif defined(CONFIG_CPU_BMIPS5000)
233 li t2, (1 << 8) | (1 << 5)
241 #error Missing XKS01 setup
245 #endif /* defined(CONFIG_XKS01) */
249 END(bmips_enable_xks01)