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[IA64] Add mapping table between irq and vector
[linux-imx.git] / arch / ia64 / kernel / irq_ia64.c
1 /*
2  * linux/arch/ia64/kernel/irq_ia64.c
3  *
4  * Copyright (C) 1998-2001 Hewlett-Packard Co
5  *      Stephane Eranian <eranian@hpl.hp.com>
6  *      David Mosberger-Tang <davidm@hpl.hp.com>
7  *
8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
9  *           support for SMP and different interrupt controllers.
10  *
11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
12  *                      PCI to vector allocation routine.
13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
14  *                                              Added CPU Hotplug handling for IPF.
15  */
16
17 #include <linux/module.h>
18
19 #include <linux/jiffies.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel_stat.h>
25 #include <linux/slab.h>
26 #include <linux/ptrace.h>
27 #include <linux/random.h>       /* for rand_initialize_irq() */
28 #include <linux/signal.h>
29 #include <linux/smp.h>
30 #include <linux/threads.h>
31 #include <linux/bitops.h>
32 #include <linux/irq.h>
33
34 #include <asm/delay.h>
35 #include <asm/intrinsics.h>
36 #include <asm/io.h>
37 #include <asm/hw_irq.h>
38 #include <asm/machvec.h>
39 #include <asm/pgtable.h>
40 #include <asm/system.h>
41 #include <asm/tlbflush.h>
42
43 #ifdef CONFIG_PERFMON
44 # include <asm/perfmon.h>
45 #endif
46
47 #define IRQ_DEBUG       0
48
49 #define IRQ_VECTOR_UNASSIGNED   (0)
50
51 #define IRQ_UNUSED              (0)
52 #define IRQ_USED                (1)
53 #define IRQ_RSVD                (2)
54
55 /* These can be overridden in platform_irq_init */
56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
58
59 /* default base addr of IPI table */
60 void __iomem *ipi_base_addr = ((void __iomem *)
61                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
62
63 /*
64  * Legacy IRQ to IA-64 vector translation table.
65  */
66 __u8 isa_irq_to_vector_map[16] = {
67         /* 8259 IRQ translation, first 16 entries */
68         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
69         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
70 };
71 EXPORT_SYMBOL(isa_irq_to_vector_map);
72
73 DEFINE_SPINLOCK(vector_lock);
74
75 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
76         [0 ... NR_IRQS - 1] = { .vector = IRQ_VECTOR_UNASSIGNED }
77 };
78
79 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
80         [0 ... IA64_NUM_VECTORS - 1] = IA64_SPURIOUS_INT_VECTOR
81 };
82
83 static int irq_status[NR_IRQS] = {
84         [0 ... NR_IRQS -1] = IRQ_UNUSED
85 };
86
87 int check_irq_used(int irq)
88 {
89         if (irq_status[irq] == IRQ_USED)
90                 return 1;
91
92         return -1;
93 }
94
95 static void reserve_irq(unsigned int irq)
96 {
97         unsigned long flags;
98
99         spin_lock_irqsave(&vector_lock, flags);
100         irq_status[irq] = IRQ_RSVD;
101         spin_unlock_irqrestore(&vector_lock, flags);
102 }
103
104 static inline int find_unassigned_irq(void)
105 {
106         int irq;
107
108         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
109                 if (irq_status[irq] == IRQ_UNUSED)
110                         return irq;
111         return -ENOSPC;
112 }
113
114 static inline int find_unassigned_vector(void)
115 {
116         int vector;
117
118         for (vector = IA64_FIRST_DEVICE_VECTOR;
119              vector <= IA64_LAST_DEVICE_VECTOR; vector++)
120                 if (__get_cpu_var(vector_irq[vector]) == IA64_SPURIOUS_INT_VECTOR)
121                         return vector;
122         return -ENOSPC;
123 }
124
125 static int __bind_irq_vector(int irq, int vector)
126 {
127         int cpu;
128
129         if (irq_to_vector(irq) == vector)
130                 return 0;
131         if (irq_to_vector(irq) != IRQ_VECTOR_UNASSIGNED)
132                 return -EBUSY;
133         for_each_online_cpu(cpu)
134                 per_cpu(vector_irq, cpu)[vector] = irq;
135         irq_cfg[irq].vector = vector;
136         irq_status[irq] = IRQ_USED;
137         return 0;
138 }
139
140 int bind_irq_vector(int irq, int vector)
141 {
142         unsigned long flags;
143         int ret;
144
145         spin_lock_irqsave(&vector_lock, flags);
146         ret = __bind_irq_vector(irq, vector);
147         spin_unlock_irqrestore(&vector_lock, flags);
148         return ret;
149 }
150
151 static void clear_irq_vector(int irq)
152 {
153         unsigned long flags;
154         int vector, cpu;
155
156         spin_lock_irqsave(&vector_lock, flags);
157         BUG_ON((unsigned)irq >= NR_IRQS);
158         BUG_ON(irq_cfg[irq].vector == IRQ_VECTOR_UNASSIGNED);
159         vector = irq_cfg[irq].vector;
160         for_each_online_cpu(cpu)
161                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
162         irq_cfg[irq].vector = IRQ_VECTOR_UNASSIGNED;
163         irq_status[irq] = IRQ_UNUSED;
164         spin_unlock_irqrestore(&vector_lock, flags);
165 }
166
167 int
168 assign_irq_vector (int irq)
169 {
170         unsigned long flags;
171         int vector = -ENOSPC;
172
173         if (irq < 0) {
174                 goto out;
175         }
176         spin_lock_irqsave(&vector_lock, flags);
177         vector = find_unassigned_vector();
178         if (vector < 0)
179                 goto out;
180         BUG_ON(__bind_irq_vector(irq, vector));
181         spin_unlock_irqrestore(&vector_lock, flags);
182  out:
183         return vector;
184 }
185
186 void
187 free_irq_vector (int vector)
188 {
189         if (vector < IA64_FIRST_DEVICE_VECTOR ||
190             vector > IA64_LAST_DEVICE_VECTOR)
191                 return;
192         clear_irq_vector(vector);
193 }
194
195 int
196 reserve_irq_vector (int vector)
197 {
198         if (vector < IA64_FIRST_DEVICE_VECTOR ||
199             vector > IA64_LAST_DEVICE_VECTOR)
200                 return -EINVAL;
201         return !!bind_irq_vector(vector, vector);
202 }
203
204 /*
205  * Initialize vector_irq on a new cpu. This function must be called
206  * with vector_lock held.
207  */
208 void __setup_vector_irq(int cpu)
209 {
210         int irq, vector;
211
212         /* Clear vector_irq */
213         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
214                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
215         /* Mark the inuse vectors */
216         for (irq = 0; irq < NR_IRQS; ++irq) {
217                 if ((vector = irq_to_vector(irq)) != IRQ_VECTOR_UNASSIGNED)
218                         per_cpu(vector_irq, cpu)[vector] = irq;
219         }
220 }
221
222 void destroy_and_reserve_irq(unsigned int irq)
223 {
224         dynamic_irq_cleanup(irq);
225
226         clear_irq_vector(irq);
227         reserve_irq(irq);
228 }
229
230 /*
231  * Dynamic irq allocate and deallocation for MSI
232  */
233 int create_irq(void)
234 {
235         unsigned long flags;
236         int irq, vector;
237
238         irq = -ENOSPC;
239         spin_lock_irqsave(&vector_lock, flags);
240         vector = find_unassigned_vector();
241         if (vector < 0)
242                 goto out;
243         irq = find_unassigned_irq();
244         if (irq < 0)
245                 goto out;
246         BUG_ON(__bind_irq_vector(irq, vector));
247  out:
248         spin_unlock_irqrestore(&vector_lock, flags);
249         if (irq >= 0)
250                 dynamic_irq_init(irq);
251         return irq;
252 }
253
254 void destroy_irq(unsigned int irq)
255 {
256         dynamic_irq_cleanup(irq);
257         clear_irq_vector(irq);
258 }
259
260 #ifdef CONFIG_SMP
261 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
262 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
263 #else
264 #       define IS_RESCHEDULE(vec)       (0)
265 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
266 #endif
267 /*
268  * That's where the IVT branches when we get an external
269  * interrupt. This branches to the correct hardware IRQ handler via
270  * function ptr.
271  */
272 void
273 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
274 {
275         struct pt_regs *old_regs = set_irq_regs(regs);
276         unsigned long saved_tpr;
277
278 #if IRQ_DEBUG
279         {
280                 unsigned long bsp, sp;
281
282                 /*
283                  * Note: if the interrupt happened while executing in
284                  * the context switch routine (ia64_switch_to), we may
285                  * get a spurious stack overflow here.  This is
286                  * because the register and the memory stack are not
287                  * switched atomically.
288                  */
289                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
290                 sp = ia64_getreg(_IA64_REG_SP);
291
292                 if ((sp - bsp) < 1024) {
293                         static unsigned char count;
294                         static long last_time;
295
296                         if (jiffies - last_time > 5*HZ)
297                                 count = 0;
298                         if (++count < 5) {
299                                 last_time = jiffies;
300                                 printk("ia64_handle_irq: DANGER: less than "
301                                        "1KB of free stack space!!\n"
302                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
303                         }
304                 }
305         }
306 #endif /* IRQ_DEBUG */
307
308         /*
309          * Always set TPR to limit maximum interrupt nesting depth to
310          * 16 (without this, it would be ~240, which could easily lead
311          * to kernel stack overflows).
312          */
313         irq_enter();
314         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
315         ia64_srlz_d();
316         while (vector != IA64_SPURIOUS_INT_VECTOR) {
317                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
318                         smp_local_flush_tlb();
319                         kstat_this_cpu.irqs[vector]++;
320                 } else if (unlikely(IS_RESCHEDULE(vector)))
321                         kstat_this_cpu.irqs[vector]++;
322                 else {
323                         ia64_setreg(_IA64_REG_CR_TPR, vector);
324                         ia64_srlz_d();
325
326                         generic_handle_irq(local_vector_to_irq(vector));
327
328                         /*
329                          * Disable interrupts and send EOI:
330                          */
331                         local_irq_disable();
332                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
333                 }
334                 ia64_eoi();
335                 vector = ia64_get_ivr();
336         }
337         /*
338          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
339          * handler needs to be able to wait for further keyboard interrupts, which can't
340          * come through until ia64_eoi() has been done.
341          */
342         irq_exit();
343         set_irq_regs(old_regs);
344 }
345
346 #ifdef CONFIG_HOTPLUG_CPU
347 /*
348  * This function emulates a interrupt processing when a cpu is about to be
349  * brought down.
350  */
351 void ia64_process_pending_intr(void)
352 {
353         ia64_vector vector;
354         unsigned long saved_tpr;
355         extern unsigned int vectors_in_migration[NR_IRQS];
356
357         vector = ia64_get_ivr();
358
359          irq_enter();
360          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
361          ia64_srlz_d();
362
363          /*
364           * Perform normal interrupt style processing
365           */
366         while (vector != IA64_SPURIOUS_INT_VECTOR) {
367                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
368                         smp_local_flush_tlb();
369                         kstat_this_cpu.irqs[vector]++;
370                 } else if (unlikely(IS_RESCHEDULE(vector)))
371                         kstat_this_cpu.irqs[vector]++;
372                 else {
373                         struct pt_regs *old_regs = set_irq_regs(NULL);
374
375                         ia64_setreg(_IA64_REG_CR_TPR, vector);
376                         ia64_srlz_d();
377
378                         /*
379                          * Now try calling normal ia64_handle_irq as it would have got called
380                          * from a real intr handler. Try passing null for pt_regs, hopefully
381                          * it will work. I hope it works!.
382                          * Probably could shared code.
383                          */
384                         vectors_in_migration[local_vector_to_irq(vector)]=0;
385                         generic_handle_irq(local_vector_to_irq(vector));
386                         set_irq_regs(old_regs);
387
388                         /*
389                          * Disable interrupts and send EOI
390                          */
391                         local_irq_disable();
392                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
393                 }
394                 ia64_eoi();
395                 vector = ia64_get_ivr();
396         }
397         irq_exit();
398 }
399 #endif
400
401
402 #ifdef CONFIG_SMP
403
404 static irqreturn_t dummy_handler (int irq, void *dev_id)
405 {
406         BUG();
407 }
408 extern irqreturn_t handle_IPI (int irq, void *dev_id);
409
410 static struct irqaction ipi_irqaction = {
411         .handler =      handle_IPI,
412         .flags =        IRQF_DISABLED,
413         .name =         "IPI"
414 };
415
416 static struct irqaction resched_irqaction = {
417         .handler =      dummy_handler,
418         .flags =        IRQF_DISABLED,
419         .name =         "resched"
420 };
421
422 static struct irqaction tlb_irqaction = {
423         .handler =      dummy_handler,
424         .flags =        IRQF_DISABLED,
425         .name =         "tlb_flush"
426 };
427
428 #endif
429
430 void
431 register_percpu_irq (ia64_vector vec, struct irqaction *action)
432 {
433         irq_desc_t *desc;
434         unsigned int irq;
435
436         irq = vec;
437         BUG_ON(bind_irq_vector(irq, vec));
438         desc = irq_desc + irq;
439         desc->status |= IRQ_PER_CPU;
440         desc->chip = &irq_type_ia64_lsapic;
441         if (action)
442                 setup_irq(irq, action);
443 }
444
445 void __init
446 init_IRQ (void)
447 {
448         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
449 #ifdef CONFIG_SMP
450         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
451         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
452         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
453 #endif
454 #ifdef CONFIG_PERFMON
455         pfm_init_percpu();
456 #endif
457         platform_irq_init();
458 }
459
460 void
461 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
462 {
463         void __iomem *ipi_addr;
464         unsigned long ipi_data;
465         unsigned long phys_cpu_id;
466
467 #ifdef CONFIG_SMP
468         phys_cpu_id = cpu_physical_id(cpu);
469 #else
470         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
471 #endif
472
473         /*
474          * cpu number is in 8bit ID and 8bit EID
475          */
476
477         ipi_data = (delivery_mode << 8) | (vector & 0xff);
478         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
479
480         writeq(ipi_data, ipi_addr);
481 }