arch/alpha/kernel/traps.c

   1 /*
   2  * arch/alpha/kernel/traps.c
   3  *
   4  * (C) Copyright 1994 Linus Torvalds
   5  */
   6
   7 /*
   8  * This file initializes the trap entry points
   9  */
  10
  11 #include <linux/jiffies.h>
  12 #include <linux/mm.h>
  13 #include <linux/sched.h>
  14 #include <linux/tty.h>
  15 #include <linux/delay.h>
  16 #include <linux/module.h>
  17 #include <linux/init.h>
  18 #include <linux/kallsyms.h>
  19 #include <linux/ratelimit.h>
  20
  21 #include <asm/gentrap.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/unaligned.h>
  24 #include <asm/sysinfo.h>
  25 #include <asm/hwrpb.h>
  26 #include <asm/mmu_context.h>
  27 #include <asm/special_insns.h>
  28
  29 #include "proto.h"
  30
  31 /* Work-around for some SRMs which mishandle opDEC faults.  */
  32
  33 static int opDEC_fix;
  34
  35 static void
  36 opDEC_check(void)
  37 {
  38         __asm__ __volatile__ (
  39         /* Load the address of... */
  40         "       br      $16, 1f\n"
  41         /* A stub instruction fault handler.  Just add 4 to the
  42            pc and continue.  */
  43         "       ldq     $16, 8($sp)\n"
  44         "       addq    $16, 4, $16\n"
  45         "       stq     $16, 8($sp)\n"
  46         "       call_pal %[rti]\n"
  47         /* Install the instruction fault handler.  */
  48         "1:     lda     $17, 3\n"
  49         "       call_pal %[wrent]\n"
  50         /* With that in place, the fault from the round-to-minf fp
  51            insn will arrive either at the "lda 4" insn (bad) or one
  52            past that (good).  This places the correct fixup in %0.  */
  53         "       lda %[fix], 0\n"
  54         "       cvttq/svm $f31,$f31\n"
  55         "       lda %[fix], 4"
  56         : [fix] "=r" (opDEC_fix)
  57         : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
  58         : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
  59
  60         if (opDEC_fix)
  61                 printk("opDEC fixup enabled.\n");
  62 }
  63
  64 void
  65 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
  66 {
  67         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx    %s\n",
  68                regs->pc, regs->r26, regs->ps, print_tainted());
  69         print_symbol("pc is at %s\n", regs->pc);
  70         print_symbol("ra is at %s\n", regs->r26 );
  71         printk("v0 = %016lx  t0 = %016lx  t1 = %016lx\n",
  72                regs->r0, regs->r1, regs->r2);
  73         printk("t2 = %016lx  t3 = %016lx  t4 = %016lx\n",
  74                regs->r3, regs->r4, regs->r5);
  75         printk("t5 = %016lx  t6 = %016lx  t7 = %016lx\n",
  76                regs->r6, regs->r7, regs->r8);
  77
  78         if (r9_15) {
  79                 printk("s0 = %016lx  s1 = %016lx  s2 = %016lx\n",
  80                        r9_15[9], r9_15[10], r9_15[11]);
  81                 printk("s3 = %016lx  s4 = %016lx  s5 = %016lx\n",
  82                        r9_15[12], r9_15[13], r9_15[14]);
  83                 printk("s6 = %016lx\n", r9_15[15]);
  84         }
  85
  86         printk("a0 = %016lx  a1 = %016lx  a2 = %016lx\n",
  87                regs->r16, regs->r17, regs->r18);
  88         printk("a3 = %016lx  a4 = %016lx  a5 = %016lx\n",
  89                regs->r19, regs->r20, regs->r21);
  90         printk("t8 = %016lx  t9 = %016lx  t10= %016lx\n",
  91                regs->r22, regs->r23, regs->r24);
  92         printk("t11= %016lx  pv = %016lx  at = %016lx\n",
  93                regs->r25, regs->r27, regs->r28);
  94         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
  95 #if 0
  96 __halt();
  97 #endif
  98 }
  99
 100 #if 0
 101 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
 102                            "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
 103                            "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
 104                            "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
 105 #endif
 106
 107 static void
 108 dik_show_code(unsigned int *pc)
 109 {
 110         long i;
 111
 112         printk("Code:");
 113         for (i = -6; i < 2; i++) {
 114                 unsigned int insn;
 115                 if (__get_user(insn, (unsigned int __user *)pc + i))
 116                         break;
 117                 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
 118         }
 119         printk("\n");
 120 }
 121
 122 static void
 123 dik_show_trace(unsigned long *sp)
 124 {
 125         long i = 0;
 126         printk("Trace:\n");
 127         while (0x1ff8 & (unsigned long) sp) {
 128                 extern char _stext[], _etext[];
 129                 unsigned long tmp = *sp;
 130                 sp++;
 131                 if (tmp < (unsigned long) &_stext)
 132                         continue;
 133                 if (tmp >= (unsigned long) &_etext)
 134                         continue;
 135                 printk("[<%lx>]", tmp);
 136                 print_symbol(" %s", tmp);
 137                 printk("\n");
 138                 if (i > 40) {
 139                         printk(" ...");
 140                         break;
 141                 }
 142         }
 143         printk("\n");
 144 }
 145
 146 static int kstack_depth_to_print = 24;
 147
 148 void show_stack(struct task_struct *task, unsigned long *sp)
 149 {
 150         unsigned long *stack;
 151         int i;
 152
 153         /*
 154          * debugging aid: "show_stack(NULL);" prints the
 155          * back trace for this cpu.
 156          */
 157         if(sp==NULL)
 158                 sp=(unsigned long*)&sp;
 159
 160         stack = sp;
 161         for(i=0; i < kstack_depth_to_print; i++) {
 162                 if (((long) stack & (THREAD_SIZE-1)) == 0)
 163                         break;
 164                 if (i && ((i % 4) == 0))
 165                         printk("\n       ");
 166                 printk("%016lx ", *stack++);
 167         }
 168         printk("\n");
 169         dik_show_trace(sp);
 170 }
 171
 172 void
 173 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
 174 {
 175         if (regs->ps & 8)
 176                 return;
 177 #ifdef CONFIG_SMP
 178         printk("CPU %d ", hard_smp_processor_id());
 179 #endif
 180         printk("%s(%d): %s %ld\n", current->comm, task_pid_nr(current), str, err);
 181         dik_show_regs(regs, r9_15);
 182         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 183         dik_show_trace((unsigned long *)(regs+1));
 184         dik_show_code((unsigned int *)regs->pc);
 185
 186         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 187                 printk("die_if_kernel recursion detected.\n");
 188                 local_irq_enable();
 189                 while (1);
 190         }
 191         do_exit(SIGSEGV);
 192 }
 193
 194 #ifndef CONFIG_MATHEMU
 195 static long dummy_emul(void) { return 0; }
 196 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
 197   = (void *)dummy_emul;
 198 long (*alpha_fp_emul) (unsigned long pc)
 199   = (void *)dummy_emul;
 200 #else
 201 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
 202 long alpha_fp_emul (unsigned long pc);
 203 #endif
 204
 205 asmlinkage void
 206 do_entArith(unsigned long summary, unsigned long write_mask,
 207             struct pt_regs *regs)
 208 {
 209         long si_code = FPE_FLTINV;
 210         siginfo_t info;
 211
 212         if (summary & 1) {
 213                 /* Software-completion summary bit is set, so try to
 214                    emulate the instruction.  If the processor supports
 215                    precise exceptions, we don't have to search.  */
 216                 if (!amask(AMASK_PRECISE_TRAP))
 217                         si_code = alpha_fp_emul(regs->pc - 4);
 218                 else
 219                         si_code = alpha_fp_emul_imprecise(regs, write_mask);
 220                 if (si_code == 0)
 221                         return;
 222         }
 223         die_if_kernel("Arithmetic fault", regs, 0, NULL);
 224
 225         info.si_signo = SIGFPE;
 226         info.si_errno = 0;
 227         info.si_code = si_code;
 228         info.si_addr = (void __user *) regs->pc;
 229         send_sig_info(SIGFPE, &info, current);
 230 }
 231
 232 asmlinkage void
 233 do_entIF(unsigned long type, struct pt_regs *regs)
 234 {
 235         siginfo_t info;
 236         int signo, code;
 237
 238         if ((regs->ps & ~IPL_MAX) == 0) {
 239                 if (type == 1) {
 240                         const unsigned int *data
 241                           = (const unsigned int *) regs->pc;
 242                         printk("Kernel bug at %s:%d\n",
 243                                (const char *)(data[1] | (long)data[2] << 32),
 244                                data[0]);
 245                 }
 246                 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
 247                               regs, type, NULL);
 248         }
 249
 250         switch (type) {
 251               case 0: /* breakpoint */
 252                 info.si_signo = SIGTRAP;
 253                 info.si_errno = 0;
 254                 info.si_code = TRAP_BRKPT;
 255                 info.si_trapno = 0;
 256                 info.si_addr = (void __user *) regs->pc;
 257
 258                 if (ptrace_cancel_bpt(current)) {
 259                         regs->pc -= 4;  /* make pc point to former bpt */
 260                 }
 261
 262                 send_sig_info(SIGTRAP, &info, current);
 263                 return;
 264
 265               case 1: /* bugcheck */
 266                 info.si_signo = SIGTRAP;
 267                 info.si_errno = 0;
 268                 info.si_code = __SI_FAULT;
 269                 info.si_addr = (void __user *) regs->pc;
 270                 info.si_trapno = 0;
 271                 send_sig_info(SIGTRAP, &info, current);
 272                 return;
 273
 274               case 2: /* gentrap */
 275                 info.si_addr = (void __user *) regs->pc;
 276                 info.si_trapno = regs->r16;
 277                 switch ((long) regs->r16) {
 278                 case GEN_INTOVF:
 279                         signo = SIGFPE;
 280                         code = FPE_INTOVF;
 281                         break;
 282                 case GEN_INTDIV:
 283                         signo = SIGFPE;
 284                         code = FPE_INTDIV;
 285                         break;
 286                 case GEN_FLTOVF:
 287                         signo = SIGFPE;
 288                         code = FPE_FLTOVF;
 289                         break;
 290                 case GEN_FLTDIV:
 291                         signo = SIGFPE;
 292                         code = FPE_FLTDIV;
 293                         break;
 294                 case GEN_FLTUND:
 295                         signo = SIGFPE;
 296                         code = FPE_FLTUND;
 297                         break;
 298                 case GEN_FLTINV:
 299                         signo = SIGFPE;
 300                         code = FPE_FLTINV;
 301                         break;
 302                 case GEN_FLTINE:
 303                         signo = SIGFPE;
 304                         code = FPE_FLTRES;
 305                         break;
 306                 case GEN_ROPRAND:
 307                         signo = SIGFPE;
 308                         code = __SI_FAULT;
 309                         break;
 310
 311                 case GEN_DECOVF:
 312                 case GEN_DECDIV:
 313                 case GEN_DECINV:
 314                 case GEN_ASSERTERR:
 315                 case GEN_NULPTRERR:
 316                 case GEN_STKOVF:
 317                 case GEN_STRLENERR:
 318                 case GEN_SUBSTRERR:
 319                 case GEN_RANGERR:
 320                 case GEN_SUBRNG:
 321                 case GEN_SUBRNG1:
 322                 case GEN_SUBRNG2:
 323                 case GEN_SUBRNG3:
 324                 case GEN_SUBRNG4:
 325                 case GEN_SUBRNG5:
 326                 case GEN_SUBRNG6:
 327                 case GEN_SUBRNG7:
 328                 default:
 329                         signo = SIGTRAP;
 330                         code = __SI_FAULT;
 331                         break;
 332                 }
 333
 334                 info.si_signo = signo;
 335                 info.si_errno = 0;
 336                 info.si_code = code;
 337                 info.si_addr = (void __user *) regs->pc;
 338                 send_sig_info(signo, &info, current);
 339                 return;
 340
 341               case 4: /* opDEC */
 342                 if (implver() == IMPLVER_EV4) {
 343                         long si_code;
 344
 345                         /* The some versions of SRM do not handle
 346                            the opDEC properly - they return the PC of the
 347                            opDEC fault, not the instruction after as the
 348                            Alpha architecture requires.  Here we fix it up.
 349                            We do this by intentionally causing an opDEC
 350                            fault during the boot sequence and testing if
 351                            we get the correct PC.  If not, we set a flag
 352                            to correct it every time through.  */
 353                         regs->pc += opDEC_fix;
 354
 355                         /* EV4 does not implement anything except normal
 356                            rounding.  Everything else will come here as
 357                            an illegal instruction.  Emulate them.  */
 358                         si_code = alpha_fp_emul(regs->pc - 4);
 359                         if (si_code == 0)
 360                                 return;
 361                         if (si_code > 0) {
 362                                 info.si_signo = SIGFPE;
 363                                 info.si_errno = 0;
 364                                 info.si_code = si_code;
 365                                 info.si_addr = (void __user *) regs->pc;
 366                                 send_sig_info(SIGFPE, &info, current);
 367                                 return;
 368                         }
 369                 }
 370                 break;
 371
 372               case 3: /* FEN fault */
 373                 /* Irritating users can call PAL_clrfen to disable the
 374                    FPU for the process.  The kernel will then trap in
 375                    do_switch_stack and undo_switch_stack when we try
 376                    to save and restore the FP registers.
 377
 378                    Given that GCC by default generates code that uses the
 379                    FP registers, PAL_clrfen is not useful except for DoS
 380                    attacks.  So turn the bleeding FPU back on and be done
 381                    with it.  */
 382                 current_thread_info()->pcb.flags |= 1;
 383                 __reload_thread(&current_thread_info()->pcb);
 384                 return;
 385
 386               case 5: /* illoc */
 387               default: /* unexpected instruction-fault type */
 388                       ;
 389         }
 390
 391         info.si_signo = SIGILL;
 392         info.si_errno = 0;
 393         info.si_code = ILL_ILLOPC;
 394         info.si_addr = (void __user *) regs->pc;
 395         send_sig_info(SIGILL, &info, current);
 396 }
 397
 398 /* There is an ifdef in the PALcode in MILO that enables a
 399    "kernel debugging entry point" as an unprivileged call_pal.
 400
 401    We don't want to have anything to do with it, but unfortunately
 402    several versions of MILO included in distributions have it enabled,
 403    and if we don't put something on the entry point we'll oops.  */
 404
 405 asmlinkage void
 406 do_entDbg(struct pt_regs *regs)
 407 {
 408         siginfo_t info;
 409
 410         die_if_kernel("Instruction fault", regs, 0, NULL);
 411
 412         info.si_signo = SIGILL;
 413         info.si_errno = 0;
 414         info.si_code = ILL_ILLOPC;
 415         info.si_addr = (void __user *) regs->pc;
 416         force_sig_info(SIGILL, &info, current);
 417 }
 418
 419
 420 /*
 421  * entUna has a different register layout to be reasonably simple. It
 422  * needs access to all the integer registers (the kernel doesn't use
 423  * fp-regs), and it needs to have them in order for simpler access.
 424  *
 425  * Due to the non-standard register layout (and because we don't want
 426  * to handle floating-point regs), user-mode unaligned accesses are
 427  * handled separately by do_entUnaUser below.
 428  *
 429  * Oh, btw, we don't handle the "gp" register correctly, but if we fault
 430  * on a gp-register unaligned load/store, something is _very_ wrong
 431  * in the kernel anyway..
 432  */
 433 struct allregs {
 434         unsigned long regs[32];
 435         unsigned long ps, pc, gp, a0, a1, a2;
 436 };
 437
 438 struct unaligned_stat {
 439         unsigned long count, va, pc;
 440 } unaligned[2];
 441
 442
 443 /* Macro for exception fixup code to access integer registers.  */
 444 #define una_reg(r)  (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
 445
 446
 447 asmlinkage void
 448 do_entUna(void * va, unsigned long opcode, unsigned long reg,
 449           struct allregs *regs)
 450 {
 451         long error, tmp1, tmp2, tmp3, tmp4;
 452         unsigned long pc = regs->pc - 4;
 453         unsigned long *_regs = regs->regs;
 454         const struct exception_table_entry *fixup;
 455
 456         unaligned[0].count++;
 457         unaligned[0].va = (unsigned long) va;
 458         unaligned[0].pc = pc;
 459
 460         /* We don't want to use the generic get/put unaligned macros as
 461            we want to trap exceptions.  Only if we actually get an
 462            exception will we decide whether we should have caught it.  */
 463
 464         switch (opcode) {
 465         case 0x0c: /* ldwu */
 466                 __asm__ __volatile__(
 467                 "1:     ldq_u %1,0(%3)\n"
 468                 "2:     ldq_u %2,1(%3)\n"
 469                 "       extwl %1,%3,%1\n"
 470                 "       extwh %2,%3,%2\n"
 471                 "3:\n"
 472                 ".section __ex_table,\"a\"\n"
 473                 "       .long 1b - .\n"
 474                 "       lda %1,3b-1b(%0)\n"
 475                 "       .long 2b - .\n"
 476                 "       lda %2,3b-2b(%0)\n"
 477                 ".previous"
 478                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 479                         : "r"(va), "0"(0));
 480                 if (error)
 481                         goto got_exception;
 482                 una_reg(reg) = tmp1|tmp2;
 483                 return;
 484
 485         case 0x28: /* ldl */
 486                 __asm__ __volatile__(
 487                 "1:     ldq_u %1,0(%3)\n"
 488                 "2:     ldq_u %2,3(%3)\n"
 489                 "       extll %1,%3,%1\n"
 490                 "       extlh %2,%3,%2\n"
 491                 "3:\n"
 492                 ".section __ex_table,\"a\"\n"
 493                 "       .long 1b - .\n"
 494                 "       lda %1,3b-1b(%0)\n"
 495                 "       .long 2b - .\n"
 496                 "       lda %2,3b-2b(%0)\n"
 497                 ".previous"
 498                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 499                         : "r"(va), "0"(0));
 500                 if (error)
 501                         goto got_exception;
 502                 una_reg(reg) = (int)(tmp1|tmp2);
 503                 return;
 504
 505         case 0x29: /* ldq */
 506                 __asm__ __volatile__(
 507                 "1:     ldq_u %1,0(%3)\n"
 508                 "2:     ldq_u %2,7(%3)\n"
 509                 "       extql %1,%3,%1\n"
 510                 "       extqh %2,%3,%2\n"
 511                 "3:\n"
 512                 ".section __ex_table,\"a\"\n"
 513                 "       .long 1b - .\n"
 514                 "       lda %1,3b-1b(%0)\n"
 515                 "       .long 2b - .\n"
 516                 "       lda %2,3b-2b(%0)\n"
 517                 ".previous"
 518                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 519                         : "r"(va), "0"(0));
 520                 if (error)
 521                         goto got_exception;
 522                 una_reg(reg) = tmp1|tmp2;
 523                 return;
 524
 525         /* Note that the store sequences do not indicate that they change
 526            memory because it _should_ be affecting nothing in this context.
 527            (Otherwise we have other, much larger, problems.)  */
 528         case 0x0d: /* stw */
 529                 __asm__ __volatile__(
 530                 "1:     ldq_u %2,1(%5)\n"
 531                 "2:     ldq_u %1,0(%5)\n"
 532                 "       inswh %6,%5,%4\n"
 533                 "       inswl %6,%5,%3\n"
 534                 "       mskwh %2,%5,%2\n"
 535                 "       mskwl %1,%5,%1\n"
 536                 "       or %2,%4,%2\n"
 537                 "       or %1,%3,%1\n"
 538                 "3:     stq_u %2,1(%5)\n"
 539                 "4:     stq_u %1,0(%5)\n"
 540                 "5:\n"
 541                 ".section __ex_table,\"a\"\n"
 542                 "       .long 1b - .\n"
 543                 "       lda %2,5b-1b(%0)\n"
 544                 "       .long 2b - .\n"
 545                 "       lda %1,5b-2b(%0)\n"
 546                 "       .long 3b - .\n"
 547                 "       lda $31,5b-3b(%0)\n"
 548                 "       .long 4b - .\n"
 549                 "       lda $31,5b-4b(%0)\n"
 550                 ".previous"
 551                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 552                           "=&r"(tmp3), "=&r"(tmp4)
 553                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 554                 if (error)
 555                         goto got_exception;
 556                 return;
 557
 558         case 0x2c: /* stl */
 559                 __asm__ __volatile__(
 560                 "1:     ldq_u %2,3(%5)\n"
 561                 "2:     ldq_u %1,0(%5)\n"
 562                 "       inslh %6,%5,%4\n"
 563                 "       insll %6,%5,%3\n"
 564                 "       msklh %2,%5,%2\n"
 565                 "       mskll %1,%5,%1\n"
 566                 "       or %2,%4,%2\n"
 567                 "       or %1,%3,%1\n"
 568                 "3:     stq_u %2,3(%5)\n"
 569                 "4:     stq_u %1,0(%5)\n"
 570                 "5:\n"
 571                 ".section __ex_table,\"a\"\n"
 572                 "       .long 1b - .\n"
 573                 "       lda %2,5b-1b(%0)\n"
 574                 "       .long 2b - .\n"
 575                 "       lda %1,5b-2b(%0)\n"
 576                 "       .long 3b - .\n"
 577                 "       lda $31,5b-3b(%0)\n"
 578                 "       .long 4b - .\n"
 579                 "       lda $31,5b-4b(%0)\n"
 580                 ".previous"
 581                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 582                           "=&r"(tmp3), "=&r"(tmp4)
 583                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 584                 if (error)
 585                         goto got_exception;
 586                 return;
 587
 588         case 0x2d: /* stq */
 589                 __asm__ __volatile__(
 590                 "1:     ldq_u %2,7(%5)\n"
 591                 "2:     ldq_u %1,0(%5)\n"
 592                 "       insqh %6,%5,%4\n"
 593                 "       insql %6,%5,%3\n"
 594                 "       mskqh %2,%5,%2\n"
 595                 "       mskql %1,%5,%1\n"
 596                 "       or %2,%4,%2\n"
 597                 "       or %1,%3,%1\n"
 598                 "3:     stq_u %2,7(%5)\n"
 599                 "4:     stq_u %1,0(%5)\n"
 600                 "5:\n"
 601                 ".section __ex_table,\"a\"\n\t"
 602                 "       .long 1b - .\n"
 603                 "       lda %2,5b-1b(%0)\n"
 604                 "       .long 2b - .\n"
 605                 "       lda %1,5b-2b(%0)\n"
 606                 "       .long 3b - .\n"
 607                 "       lda $31,5b-3b(%0)\n"
 608                 "       .long 4b - .\n"
 609                 "       lda $31,5b-4b(%0)\n"
 610                 ".previous"
 611                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 612                           "=&r"(tmp3), "=&r"(tmp4)
 613                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 614                 if (error)
 615                         goto got_exception;
 616                 return;
 617         }
 618
 619         printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n",
 620                 pc, va, opcode, reg);
 621         do_exit(SIGSEGV);
 622
 623 got_exception:
 624         /* Ok, we caught the exception, but we don't want it.  Is there
 625            someone to pass it along to?  */
 626         if ((fixup = search_exception_tables(pc)) != 0) {
 627                 unsigned long newpc;
 628                 newpc = fixup_exception(una_reg, fixup, pc);
 629
 630                 printk("Forwarding unaligned exception at %lx (%lx)\n",
 631                        pc, newpc);
 632
 633                 regs->pc = newpc;
 634                 return;
 635         }
 636
 637         /*
 638          * Yikes!  No one to forward the exception to.
 639          * Since the registers are in a weird format, dump them ourselves.
 640          */
 641
 642         printk("%s(%d): unhandled unaligned exception\n",
 643                current->comm, task_pid_nr(current));
 644
 645         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx\n",
 646                pc, una_reg(26), regs->ps);
 647         printk("r0 = %016lx  r1 = %016lx  r2 = %016lx\n",
 648                una_reg(0), una_reg(1), una_reg(2));
 649         printk("r3 = %016lx  r4 = %016lx  r5 = %016lx\n",
 650                una_reg(3), una_reg(4), una_reg(5));
 651         printk("r6 = %016lx  r7 = %016lx  r8 = %016lx\n",
 652                una_reg(6), una_reg(7), una_reg(8));
 653         printk("r9 = %016lx  r10= %016lx  r11= %016lx\n",
 654                una_reg(9), una_reg(10), una_reg(11));
 655         printk("r12= %016lx  r13= %016lx  r14= %016lx\n",
 656                una_reg(12), una_reg(13), una_reg(14));
 657         printk("r15= %016lx\n", una_reg(15));
 658         printk("r16= %016lx  r17= %016lx  r18= %016lx\n",
 659                una_reg(16), una_reg(17), una_reg(18));
 660         printk("r19= %016lx  r20= %016lx  r21= %016lx\n",
 661                una_reg(19), una_reg(20), una_reg(21));
 662         printk("r22= %016lx  r23= %016lx  r24= %016lx\n",
 663                una_reg(22), una_reg(23), una_reg(24));
 664         printk("r25= %016lx  r27= %016lx  r28= %016lx\n",
 665                una_reg(25), una_reg(27), una_reg(28));
 666         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
 667
 668         dik_show_code((unsigned int *)pc);
 669         dik_show_trace((unsigned long *)(regs+1));
 670
 671         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 672                 printk("die_if_kernel recursion detected.\n");
 673                 local_irq_enable();
 674                 while (1);
 675         }
 676         do_exit(SIGSEGV);
 677 }
 678
 679 /*
 680  * Convert an s-floating point value in memory format to the
 681  * corresponding value in register format.  The exponent
 682  * needs to be remapped to preserve non-finite values
 683  * (infinities, not-a-numbers, denormals).
 684  */
 685 static inline unsigned long
 686 s_mem_to_reg (unsigned long s_mem)
 687 {
 688         unsigned long frac    = (s_mem >>  0) & 0x7fffff;
 689         unsigned long sign    = (s_mem >> 31) & 0x1;
 690         unsigned long exp_msb = (s_mem >> 30) & 0x1;
 691         unsigned long exp_low = (s_mem >> 23) & 0x7f;
 692         unsigned long exp;
 693
 694         exp = (exp_msb << 10) | exp_low;        /* common case */
 695         if (exp_msb) {
 696                 if (exp_low == 0x7f) {
 697                         exp = 0x7ff;
 698                 }
 699         } else {
 700                 if (exp_low == 0x00) {
 701                         exp = 0x000;
 702                 } else {
 703                         exp |= (0x7 << 7);
 704                 }
 705         }
 706         return (sign << 63) | (exp << 52) | (frac << 29);
 707 }
 708
 709 /*
 710  * Convert an s-floating point value in register format to the
 711  * corresponding value in memory format.
 712  */
 713 static inline unsigned long
 714 s_reg_to_mem (unsigned long s_reg)
 715 {
 716         return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
 717 }
 718
 719 /*
 720  * Handle user-level unaligned fault.  Handling user-level unaligned
 721  * faults is *extremely* slow and produces nasty messages.  A user
 722  * program *should* fix unaligned faults ASAP.
 723  *
 724  * Notice that we have (almost) the regular kernel stack layout here,
 725  * so finding the appropriate registers is a little more difficult
 726  * than in the kernel case.
 727  *
 728  * Finally, we handle regular integer load/stores only.  In
 729  * particular, load-linked/store-conditionally and floating point
 730  * load/stores are not supported.  The former make no sense with
 731  * unaligned faults (they are guaranteed to fail) and I don't think
 732  * the latter will occur in any decent program.
 733  *
 734  * Sigh. We *do* have to handle some FP operations, because GCC will
 735  * uses them as temporary storage for integer memory to memory copies.
 736  * However, we need to deal with stt/ldt and sts/lds only.
 737  */
 738
 739 #define OP_INT_MASK     ( 1L << 0x28 | 1L << 0x2c   /* ldl stl */       \
 740                         | 1L << 0x29 | 1L << 0x2d   /* ldq stq */       \
 741                         | 1L << 0x0c | 1L << 0x0d   /* ldwu stw */      \
 742                         | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
 743
 744 #define OP_WRITE_MASK   ( 1L << 0x26 | 1L << 0x27   /* sts stt */       \
 745                         | 1L << 0x2c | 1L << 0x2d   /* stl stq */       \
 746                         | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
 747
 748 #define R(x)    ((size_t) &((struct pt_regs *)0)->x)
 749
 750 static int unauser_reg_offsets[32] = {
 751         R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
 752         /* r9 ... r15 are stored in front of regs.  */
 753         -56, -48, -40, -32, -24, -16, -8,
 754         R(r16), R(r17), R(r18),
 755         R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
 756         R(r27), R(r28), R(gp),
 757         0, 0
 758 };
 759
 760 #undef R
 761
 762 asmlinkage void
 763 do_entUnaUser(void __user * va, unsigned long opcode,
 764               unsigned long reg, struct pt_regs *regs)
 765 {
 766         static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
 767
 768         unsigned long tmp1, tmp2, tmp3, tmp4;
 769         unsigned long fake_reg, *reg_addr = &fake_reg;
 770         siginfo_t info;
 771         long error;
 772
 773         /* Check the UAC bits to decide what the user wants us to do
 774            with the unaliged access.  */
 775
 776         if (!(current_thread_info()->status & TS_UAC_NOPRINT)) {
 777                 if (__ratelimit(&ratelimit)) {
 778                         printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
 779                                current->comm, task_pid_nr(current),
 780                                regs->pc - 4, va, opcode, reg);
 781                 }
 782         }
 783         if ((current_thread_info()->status & TS_UAC_SIGBUS))
 784                 goto give_sigbus;
 785         /* Not sure why you'd want to use this, but... */
 786         if ((current_thread_info()->status & TS_UAC_NOFIX))
 787                 return;
 788
 789         /* Don't bother reading ds in the access check since we already
 790            know that this came from the user.  Also rely on the fact that
 791            the page at TASK_SIZE is unmapped and so can't be touched anyway. */
 792         if (!__access_ok((unsigned long)va, 0, USER_DS))
 793                 goto give_sigsegv;
 794
 795         ++unaligned[1].count;
 796         unaligned[1].va = (unsigned long)va;
 797         unaligned[1].pc = regs->pc - 4;
 798
 799         if ((1L << opcode) & OP_INT_MASK) {
 800                 /* it's an integer load/store */
 801                 if (reg < 30) {
 802                         reg_addr = (unsigned long *)
 803                           ((char *)regs + unauser_reg_offsets[reg]);
 804                 } else if (reg == 30) {
 805                         /* usp in PAL regs */
 806                         fake_reg = rdusp();
 807                 } else {
 808                         /* zero "register" */
 809                         fake_reg = 0;
 810                 }
 811         }
 812
 813         /* We don't want to use the generic get/put unaligned macros as
 814            we want to trap exceptions.  Only if we actually get an
 815            exception will we decide whether we should have caught it.  */
 816
 817         switch (opcode) {
 818         case 0x0c: /* ldwu */
 819                 __asm__ __volatile__(
 820                 "1:     ldq_u %1,0(%3)\n"
 821                 "2:     ldq_u %2,1(%3)\n"
 822                 "       extwl %1,%3,%1\n"
 823                 "       extwh %2,%3,%2\n"
 824                 "3:\n"
 825                 ".section __ex_table,\"a\"\n"
 826                 "       .long 1b - .\n"
 827                 "       lda %1,3b-1b(%0)\n"
 828                 "       .long 2b - .\n"
 829                 "       lda %2,3b-2b(%0)\n"
 830                 ".previous"
 831                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 832                         : "r"(va), "0"(0));
 833                 if (error)
 834                         goto give_sigsegv;
 835                 *reg_addr = tmp1|tmp2;
 836                 break;
 837
 838         case 0x22: /* lds */
 839                 __asm__ __volatile__(
 840                 "1:     ldq_u %1,0(%3)\n"
 841                 "2:     ldq_u %2,3(%3)\n"
 842                 "       extll %1,%3,%1\n"
 843                 "       extlh %2,%3,%2\n"
 844                 "3:\n"
 845                 ".section __ex_table,\"a\"\n"
 846                 "       .long 1b - .\n"
 847                 "       lda %1,3b-1b(%0)\n"
 848                 "       .long 2b - .\n"
 849                 "       lda %2,3b-2b(%0)\n"
 850                 ".previous"
 851                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 852                         : "r"(va), "0"(0));
 853                 if (error)
 854                         goto give_sigsegv;
 855                 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
 856                 return;
 857
 858         case 0x23: /* ldt */
 859                 __asm__ __volatile__(
 860                 "1:     ldq_u %1,0(%3)\n"
 861                 "2:     ldq_u %2,7(%3)\n"
 862                 "       extql %1,%3,%1\n"
 863                 "       extqh %2,%3,%2\n"
 864                 "3:\n"
 865                 ".section __ex_table,\"a\"\n"
 866                 "       .long 1b - .\n"
 867                 "       lda %1,3b-1b(%0)\n"
 868                 "       .long 2b - .\n"
 869                 "       lda %2,3b-2b(%0)\n"
 870                 ".previous"
 871                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 872                         : "r"(va), "0"(0));
 873                 if (error)
 874                         goto give_sigsegv;
 875                 alpha_write_fp_reg(reg, tmp1|tmp2);
 876                 return;
 877
 878         case 0x28: /* ldl */
 879                 __asm__ __volatile__(
 880                 "1:     ldq_u %1,0(%3)\n"
 881                 "2:     ldq_u %2,3(%3)\n"
 882                 "       extll %1,%3,%1\n"
 883                 "       extlh %2,%3,%2\n"
 884                 "3:\n"
 885                 ".section __ex_table,\"a\"\n"
 886                 "       .long 1b - .\n"
 887                 "       lda %1,3b-1b(%0)\n"
 888                 "       .long 2b - .\n"
 889                 "       lda %2,3b-2b(%0)\n"
 890                 ".previous"
 891                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 892                         : "r"(va), "0"(0));
 893                 if (error)
 894                         goto give_sigsegv;
 895                 *reg_addr = (int)(tmp1|tmp2);
 896                 break;
 897
 898         case 0x29: /* ldq */
 899                 __asm__ __volatile__(
 900                 "1:     ldq_u %1,0(%3)\n"
 901                 "2:     ldq_u %2,7(%3)\n"
 902                 "       extql %1,%3,%1\n"
 903                 "       extqh %2,%3,%2\n"
 904                 "3:\n"
 905                 ".section __ex_table,\"a\"\n"
 906                 "       .long 1b - .\n"
 907                 "       lda %1,3b-1b(%0)\n"
 908                 "       .long 2b - .\n"
 909                 "       lda %2,3b-2b(%0)\n"
 910                 ".previous"
 911                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 912                         : "r"(va), "0"(0));
 913                 if (error)
 914                         goto give_sigsegv;
 915                 *reg_addr = tmp1|tmp2;
 916                 break;
 917
 918         /* Note that the store sequences do not indicate that they change
 919            memory because it _should_ be affecting nothing in this context.
 920            (Otherwise we have other, much larger, problems.)  */
 921         case 0x0d: /* stw */
 922                 __asm__ __volatile__(
 923                 "1:     ldq_u %2,1(%5)\n"
 924                 "2:     ldq_u %1,0(%5)\n"
 925                 "       inswh %6,%5,%4\n"
 926                 "       inswl %6,%5,%3\n"
 927                 "       mskwh %2,%5,%2\n"
 928                 "       mskwl %1,%5,%1\n"
 929                 "       or %2,%4,%2\n"
 930                 "       or %1,%3,%1\n"
 931                 "3:     stq_u %2,1(%5)\n"
 932                 "4:     stq_u %1,0(%5)\n"
 933                 "5:\n"
 934                 ".section __ex_table,\"a\"\n"
 935                 "       .long 1b - .\n"
 936                 "       lda %2,5b-1b(%0)\n"
 937                 "       .long 2b - .\n"
 938                 "       lda %1,5b-2b(%0)\n"
 939                 "       .long 3b - .\n"
 940                 "       lda $31,5b-3b(%0)\n"
 941                 "       .long 4b - .\n"
 942                 "       lda $31,5b-4b(%0)\n"
 943                 ".previous"
 944                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 945                           "=&r"(tmp3), "=&r"(tmp4)
 946                         : "r"(va), "r"(*reg_addr), "0"(0));
 947                 if (error)
 948                         goto give_sigsegv;
 949                 return;
 950
 951         case 0x26: /* sts */
 952                 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
 953                 /* FALLTHRU */
 954
 955         case 0x2c: /* stl */
 956                 __asm__ __volatile__(
 957                 "1:     ldq_u %2,3(%5)\n"
 958                 "2:     ldq_u %1,0(%5)\n"
 959                 "       inslh %6,%5,%4\n"
 960                 "       insll %6,%5,%3\n"
 961                 "       msklh %2,%5,%2\n"
 962                 "       mskll %1,%5,%1\n"
 963                 "       or %2,%4,%2\n"
 964                 "       or %1,%3,%1\n"
 965                 "3:     stq_u %2,3(%5)\n"
 966                 "4:     stq_u %1,0(%5)\n"
 967                 "5:\n"
 968                 ".section __ex_table,\"a\"\n"
 969                 "       .long 1b - .\n"
 970                 "       lda %2,5b-1b(%0)\n"
 971                 "       .long 2b - .\n"
 972                 "       lda %1,5b-2b(%0)\n"
 973                 "       .long 3b - .\n"
 974                 "       lda $31,5b-3b(%0)\n"
 975                 "       .long 4b - .\n"
 976                 "       lda $31,5b-4b(%0)\n"
 977                 ".previous"
 978                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 979                           "=&r"(tmp3), "=&r"(tmp4)
 980                         : "r"(va), "r"(*reg_addr), "0"(0));
 981                 if (error)
 982                         goto give_sigsegv;
 983                 return;
 984
 985         case 0x27: /* stt */
 986                 fake_reg = alpha_read_fp_reg(reg);
 987                 /* FALLTHRU */
 988
 989         case 0x2d: /* stq */
 990                 __asm__ __volatile__(
 991                 "1:     ldq_u %2,7(%5)\n"
 992                 "2:     ldq_u %1,0(%5)\n"
 993                 "       insqh %6,%5,%4\n"
 994                 "       insql %6,%5,%3\n"
 995                 "       mskqh %2,%5,%2\n"
 996                 "       mskql %1,%5,%1\n"
 997                 "       or %2,%4,%2\n"
 998                 "       or %1,%3,%1\n"
 999                 "3:     stq_u %2,7(%5)\n"
1000                 "4:     stq_u %1,0(%5)\n"
1001                 "5:\n"
1002                 ".section __ex_table,\"a\"\n\t"
1003                 "       .long 1b - .\n"
1004                 "       lda %2,5b-1b(%0)\n"
1005                 "       .long 2b - .\n"
1006                 "       lda %1,5b-2b(%0)\n"
1007                 "       .long 3b - .\n"
1008                 "       lda $31,5b-3b(%0)\n"
1009                 "       .long 4b - .\n"
1010                 "       lda $31,5b-4b(%0)\n"
1011                 ".previous"
1012                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1013                           "=&r"(tmp3), "=&r"(tmp4)
1014                         : "r"(va), "r"(*reg_addr), "0"(0));
1015                 if (error)
1016                         goto give_sigsegv;
1017                 return;
1018
1019         default:
1020                 /* What instruction were you trying to use, exactly?  */
1021                 goto give_sigbus;
1022         }
1023
1024         /* Only integer loads should get here; everyone else returns early. */
1025         if (reg == 30)
1026                 wrusp(fake_reg);
1027         return;
1028
1029 give_sigsegv:
1030         regs->pc -= 4;  /* make pc point to faulting insn */
1031         info.si_signo = SIGSEGV;
1032         info.si_errno = 0;
1033
1034         /* We need to replicate some of the logic in mm/fault.c,
1035            since we don't have access to the fault code in the
1036            exception handling return path.  */
1037         if (!__access_ok((unsigned long)va, 0, USER_DS))
1038                 info.si_code = SEGV_ACCERR;
1039         else {
1040                 struct mm_struct *mm = current->mm;
1041                 down_read(&mm->mmap_sem);
1042                 if (find_vma(mm, (unsigned long)va))
1043                         info.si_code = SEGV_ACCERR;
1044                 else
1045                         info.si_code = SEGV_MAPERR;
1046                 up_read(&mm->mmap_sem);
1047         }
1048         info.si_addr = va;
1049         send_sig_info(SIGSEGV, &info, current);
1050         return;
1051
1052 give_sigbus:
1053         regs->pc -= 4;
1054         info.si_signo = SIGBUS;
1055         info.si_errno = 0;
1056         info.si_code = BUS_ADRALN;
1057         info.si_addr = va;
1058         send_sig_info(SIGBUS, &info, current);
1059         return;
1060 }
1061
1062 void
1063 trap_init(void)
1064 {
1065         /* Tell PAL-code what global pointer we want in the kernel.  */
1066         register unsigned long gptr __asm__("$29");
1067         wrkgp(gptr);
1068
1069         /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1070            a bug in the handling of the opDEC fault.  Fix it up if so.  */
1071         if (implver() == IMPLVER_EV4)
1072                 opDEC_check();
1073
1074         wrent(entArith, 1);
1075         wrent(entMM, 2);
1076         wrent(entIF, 3);
1077         wrent(entUna, 4);
1078         wrent(entSys, 5);
1079         wrent(entDbg, 6);
1080 }