drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_crtc_helper.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 #define RADEON_WAIT_IDLE_TIMEOUT 200
  36
  37 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  38 {
  39         struct drm_device *dev = (struct drm_device *) arg;
  40         struct radeon_device *rdev = dev->dev_private;
  41
  42         return radeon_irq_process(rdev);
  43 }
  44
  45 /*
  46  * Handle hotplug events outside the interrupt handler proper.
  47  */
  48 static void radeon_hotplug_work_func(struct work_struct *work)
  49 {
  50         struct radeon_device *rdev = container_of(work, struct radeon_device,
  51                                                   hotplug_work);
  52         struct drm_device *dev = rdev->ddev;
  53         struct drm_mode_config *mode_config = &dev->mode_config;
  54         struct drm_connector *connector;
  55
  56         if (mode_config->num_connector) {
  57                 list_for_each_entry(connector, &mode_config->connector_list, head)
  58                         radeon_connector_hotplug(connector);
  59         }
  60         /* Just fire off a uevent and let userspace tell us what to do */
  61         drm_helper_hpd_irq_event(dev);
  62 }
  63
  64 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  65 {
  66         struct radeon_device *rdev = dev->dev_private;
  67         unsigned long irqflags;
  68         unsigned i;
  69
  70         spin_lock_irqsave(&rdev->irq.lock, irqflags);
  71         /* Disable *all* interrupts */
  72         for (i = 0; i < RADEON_NUM_RINGS; i++)
  73                 atomic_set(&rdev->irq.ring_int[i], 0);
  74         rdev->irq.gui_idle = false;
  75         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  76                 rdev->irq.hpd[i] = false;
  77         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  78                 rdev->irq.crtc_vblank_int[i] = false;
  79                 atomic_set(&rdev->irq.pflip[i], 0);
  80                 rdev->irq.afmt[i] = false;
  81         }
  82         radeon_irq_set(rdev);
  83         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  84         /* Clear bits */
  85         radeon_irq_process(rdev);
  86 }
  87
  88 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  89 {
  90         dev->max_vblank_count = 0x001fffff;
  91         return 0;
  92 }
  93
  94 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  95 {
  96         struct radeon_device *rdev = dev->dev_private;
  97         unsigned long irqflags;
  98         unsigned i;
  99
 100         if (rdev == NULL) {
 101                 return;
 102         }
 103         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 104         /* Disable *all* interrupts */
 105         for (i = 0; i < RADEON_NUM_RINGS; i++)
 106                 atomic_set(&rdev->irq.ring_int[i], 0);
 107         rdev->irq.gui_idle = false;
 108         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 109                 rdev->irq.hpd[i] = false;
 110         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 111                 rdev->irq.crtc_vblank_int[i] = false;
 112                 atomic_set(&rdev->irq.pflip[i], 0);
 113                 rdev->irq.afmt[i] = false;
 114         }
 115         radeon_irq_set(rdev);
 116         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 117 }
 118
 119 static bool radeon_msi_ok(struct radeon_device *rdev)
 120 {
 121         /* RV370/RV380 was first asic with MSI support */
 122         if (rdev->family < CHIP_RV380)
 123                 return false;
 124
 125         /* MSIs don't work on AGP */
 126         if (rdev->flags & RADEON_IS_AGP)
 127                 return false;
 128
 129         /* force MSI on */
 130         if (radeon_msi == 1)
 131                 return true;
 132         else if (radeon_msi == 0)
 133                 return false;
 134
 135         /* Quirks */
 136         /* HP RS690 only seems to work with MSIs. */
 137         if ((rdev->pdev->device == 0x791f) &&
 138             (rdev->pdev->subsystem_vendor == 0x103c) &&
 139             (rdev->pdev->subsystem_device == 0x30c2))
 140                 return true;
 141
 142         /* Dell RS690 only seems to work with MSIs. */
 143         if ((rdev->pdev->device == 0x791f) &&
 144             (rdev->pdev->subsystem_vendor == 0x1028) &&
 145             (rdev->pdev->subsystem_device == 0x01fc))
 146                 return true;
 147
 148         /* Dell RS690 only seems to work with MSIs. */
 149         if ((rdev->pdev->device == 0x791f) &&
 150             (rdev->pdev->subsystem_vendor == 0x1028) &&
 151             (rdev->pdev->subsystem_device == 0x01fd))
 152                 return true;
 153
 154         /* RV515 seems to have MSI issues where it loses
 155          * MSI rearms occasionally. This leads to lockups and freezes.
 156          * disable it by default.
 157          */
 158         if (rdev->family == CHIP_RV515)
 159                 return false;
 160         if (rdev->flags & RADEON_IS_IGP) {
 161                 /* APUs work fine with MSIs */
 162                 if (rdev->family >= CHIP_PALM)
 163                         return true;
 164                 /* lots of IGPs have problems with MSIs */
 165                 return false;
 166         }
 167
 168         return true;
 169 }
 170
 171 int radeon_irq_kms_init(struct radeon_device *rdev)
 172 {
 173         int r = 0;
 174
 175         INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 176         INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
 177
 178         spin_lock_init(&rdev->irq.lock);
 179         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 180         if (r) {
 181                 return r;
 182         }
 183         /* enable msi */
 184         rdev->msi_enabled = 0;
 185
 186         if (radeon_msi_ok(rdev)) {
 187                 int ret = pci_enable_msi(rdev->pdev);
 188                 if (!ret) {
 189                         rdev->msi_enabled = 1;
 190                         dev_info(rdev->dev, "radeon: using MSI.\n");
 191                 }
 192         }
 193         rdev->irq.installed = true;
 194         r = drm_irq_install(rdev->ddev);
 195         if (r) {
 196                 rdev->irq.installed = false;
 197                 return r;
 198         }
 199         DRM_INFO("radeon: irq initialized.\n");
 200         return 0;
 201 }
 202
 203 void radeon_irq_kms_fini(struct radeon_device *rdev)
 204 {
 205         drm_vblank_cleanup(rdev->ddev);
 206         if (rdev->irq.installed) {
 207                 drm_irq_uninstall(rdev->ddev);
 208                 rdev->irq.installed = false;
 209                 if (rdev->msi_enabled)
 210                         pci_disable_msi(rdev->pdev);
 211         }
 212         flush_work_sync(&rdev->hotplug_work);
 213 }
 214
 215 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
 216 {
 217         unsigned long irqflags;
 218
 219         if (!rdev->ddev->irq_enabled)
 220                 return;
 221
 222         if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
 223                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 224                 radeon_irq_set(rdev);
 225                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 226         }
 227 }
 228
 229 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
 230 {
 231         unsigned long irqflags;
 232
 233         if (!rdev->ddev->irq_enabled)
 234                 return;
 235
 236         if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
 237                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 238                 radeon_irq_set(rdev);
 239                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 240         }
 241 }
 242
 243 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 244 {
 245         unsigned long irqflags;
 246
 247         if (crtc < 0 || crtc >= rdev->num_crtc)
 248                 return;
 249
 250         if (!rdev->ddev->irq_enabled)
 251                 return;
 252
 253         if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
 254                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 255                 radeon_irq_set(rdev);
 256                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 257         }
 258 }
 259
 260 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 261 {
 262         unsigned long irqflags;
 263
 264         if (crtc < 0 || crtc >= rdev->num_crtc)
 265                 return;
 266
 267         if (!rdev->ddev->irq_enabled)
 268                 return;
 269
 270         if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
 271                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 272                 radeon_irq_set(rdev);
 273                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 274         }
 275 }
 276
 277 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
 278 {
 279         unsigned long irqflags;
 280
 281         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 282         rdev->irq.afmt[block] = true;
 283         radeon_irq_set(rdev);
 284         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 285
 286 }
 287
 288 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
 289 {
 290         unsigned long irqflags;
 291
 292         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 293         rdev->irq.afmt[block] = false;
 294         radeon_irq_set(rdev);
 295         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 296 }
 297
 298 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 299 {
 300         unsigned long irqflags;
 301         int i;
 302
 303         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 304         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 305                 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
 306         radeon_irq_set(rdev);
 307         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 308 }
 309
 310 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 311 {
 312         unsigned long irqflags;
 313         int i;
 314
 315         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 316         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 317                 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
 318         radeon_irq_set(rdev);
 319         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 320 }
 321
 322 int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev)
 323 {
 324         unsigned long irqflags;
 325         int r;
 326
 327         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 328         rdev->irq.gui_idle = true;
 329         radeon_irq_set(rdev);
 330         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 331
 332         r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev),
 333                                msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));
 334
 335         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 336         rdev->irq.gui_idle = false;
 337         radeon_irq_set(rdev);
 338         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 339         return r;
 340 }