2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
33 #include <generated/utsrelease.h>
35 #include "intel_drv.h"
36 #include "intel_ringbuffer.h"
37 #include <drm/i915_drm.h>
40 #define DRM_I915_RING_DEBUG 1
43 #if defined(CONFIG_DEBUG_FS)
51 static const char *yesno(int v)
53 return v ? "yes" : "no";
56 static int i915_capabilities(struct seq_file *m, void *data)
58 struct drm_info_node *node = (struct drm_info_node *) m->private;
59 struct drm_device *dev = node->minor->dev;
60 const struct intel_device_info *info = INTEL_INFO(dev);
62 seq_printf(m, "gen: %d\n", info->gen);
63 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
64 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 #define DEV_INFO_SEP ;
73 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
75 if (obj->user_pin_count > 0)
77 else if (obj->pin_count > 0)
83 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
85 switch (obj->tiling_mode) {
87 case I915_TILING_NONE: return " ";
88 case I915_TILING_X: return "X";
89 case I915_TILING_Y: return "Y";
93 static const char *cache_level_str(int type)
96 case I915_CACHE_NONE: return " uncached";
97 case I915_CACHE_LLC: return " snooped (LLC)";
98 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
104 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
106 seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
109 get_tiling_flag(obj),
110 obj->base.size / 1024,
111 obj->base.read_domains,
112 obj->base.write_domain,
113 obj->last_read_seqno,
114 obj->last_write_seqno,
115 obj->last_fenced_seqno,
116 cache_level_str(obj->cache_level),
117 obj->dirty ? " dirty" : "",
118 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
120 seq_printf(m, " (name: %d)", obj->base.name);
122 seq_printf(m, " (pinned x %d)", obj->pin_count);
123 if (obj->fence_reg != I915_FENCE_REG_NONE)
124 seq_printf(m, " (fence: %d)", obj->fence_reg);
125 if (obj->gtt_space != NULL)
126 seq_printf(m, " (gtt offset: %08x, size: %08x)",
127 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
129 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
130 if (obj->pin_mappable || obj->fault_mappable) {
132 if (obj->pin_mappable)
134 if (obj->fault_mappable)
137 seq_printf(m, " (%s mappable)", s);
139 if (obj->ring != NULL)
140 seq_printf(m, " (%s)", obj->ring->name);
143 static int i915_gem_object_list_info(struct seq_file *m, void *data)
145 struct drm_info_node *node = (struct drm_info_node *) m->private;
146 uintptr_t list = (uintptr_t) node->info_ent->data;
147 struct list_head *head;
148 struct drm_device *dev = node->minor->dev;
149 drm_i915_private_t *dev_priv = dev->dev_private;
150 struct drm_i915_gem_object *obj;
151 size_t total_obj_size, total_gtt_size;
154 ret = mutex_lock_interruptible(&dev->struct_mutex);
160 seq_printf(m, "Active:\n");
161 head = &dev_priv->mm.active_list;
164 seq_printf(m, "Inactive:\n");
165 head = &dev_priv->mm.inactive_list;
168 mutex_unlock(&dev->struct_mutex);
172 total_obj_size = total_gtt_size = count = 0;
173 list_for_each_entry(obj, head, mm_list) {
175 describe_obj(m, obj);
177 total_obj_size += obj->base.size;
178 total_gtt_size += obj->gtt_space->size;
181 mutex_unlock(&dev->struct_mutex);
183 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
184 count, total_obj_size, total_gtt_size);
188 #define count_objects(list, member) do { \
189 list_for_each_entry(obj, list, member) { \
190 size += obj->gtt_space->size; \
192 if (obj->map_and_fenceable) { \
193 mappable_size += obj->gtt_space->size; \
199 static int i915_gem_object_info(struct seq_file *m, void* data)
201 struct drm_info_node *node = (struct drm_info_node *) m->private;
202 struct drm_device *dev = node->minor->dev;
203 struct drm_i915_private *dev_priv = dev->dev_private;
204 u32 count, mappable_count, purgeable_count;
205 size_t size, mappable_size, purgeable_size;
206 struct drm_i915_gem_object *obj;
209 ret = mutex_lock_interruptible(&dev->struct_mutex);
213 seq_printf(m, "%u objects, %zu bytes\n",
214 dev_priv->mm.object_count,
215 dev_priv->mm.object_memory);
217 size = count = mappable_size = mappable_count = 0;
218 count_objects(&dev_priv->mm.bound_list, gtt_list);
219 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
220 count, mappable_count, size, mappable_size);
222 size = count = mappable_size = mappable_count = 0;
223 count_objects(&dev_priv->mm.active_list, mm_list);
224 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
225 count, mappable_count, size, mappable_size);
227 size = count = mappable_size = mappable_count = 0;
228 count_objects(&dev_priv->mm.inactive_list, mm_list);
229 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
230 count, mappable_count, size, mappable_size);
232 size = count = purgeable_size = purgeable_count = 0;
233 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
234 size += obj->base.size, ++count;
235 if (obj->madv == I915_MADV_DONTNEED)
236 purgeable_size += obj->base.size, ++purgeable_count;
238 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
240 size = count = mappable_size = mappable_count = 0;
241 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
242 if (obj->fault_mappable) {
243 size += obj->gtt_space->size;
246 if (obj->pin_mappable) {
247 mappable_size += obj->gtt_space->size;
250 if (obj->madv == I915_MADV_DONTNEED) {
251 purgeable_size += obj->base.size;
255 seq_printf(m, "%u purgeable objects, %zu bytes\n",
256 purgeable_count, purgeable_size);
257 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
258 mappable_count, mappable_size);
259 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
262 seq_printf(m, "%zu [%lu] gtt total\n",
264 dev_priv->gtt.mappable_end - dev_priv->gtt.start);
266 mutex_unlock(&dev->struct_mutex);
271 static int i915_gem_gtt_info(struct seq_file *m, void* data)
273 struct drm_info_node *node = (struct drm_info_node *) m->private;
274 struct drm_device *dev = node->minor->dev;
275 uintptr_t list = (uintptr_t) node->info_ent->data;
276 struct drm_i915_private *dev_priv = dev->dev_private;
277 struct drm_i915_gem_object *obj;
278 size_t total_obj_size, total_gtt_size;
281 ret = mutex_lock_interruptible(&dev->struct_mutex);
285 total_obj_size = total_gtt_size = count = 0;
286 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
287 if (list == PINNED_LIST && obj->pin_count == 0)
291 describe_obj(m, obj);
293 total_obj_size += obj->base.size;
294 total_gtt_size += obj->gtt_space->size;
298 mutex_unlock(&dev->struct_mutex);
300 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
301 count, total_obj_size, total_gtt_size);
306 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
308 struct drm_info_node *node = (struct drm_info_node *) m->private;
309 struct drm_device *dev = node->minor->dev;
311 struct intel_crtc *crtc;
313 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
314 const char pipe = pipe_name(crtc->pipe);
315 const char plane = plane_name(crtc->plane);
316 struct intel_unpin_work *work;
318 spin_lock_irqsave(&dev->event_lock, flags);
319 work = crtc->unpin_work;
321 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
324 if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
325 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
328 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
331 if (work->enable_stall_check)
332 seq_printf(m, "Stall check enabled, ");
334 seq_printf(m, "Stall check waiting for page flip ioctl, ");
335 seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
337 if (work->old_fb_obj) {
338 struct drm_i915_gem_object *obj = work->old_fb_obj;
340 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
342 if (work->pending_flip_obj) {
343 struct drm_i915_gem_object *obj = work->pending_flip_obj;
345 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
348 spin_unlock_irqrestore(&dev->event_lock, flags);
354 static int i915_gem_request_info(struct seq_file *m, void *data)
356 struct drm_info_node *node = (struct drm_info_node *) m->private;
357 struct drm_device *dev = node->minor->dev;
358 drm_i915_private_t *dev_priv = dev->dev_private;
359 struct intel_ring_buffer *ring;
360 struct drm_i915_gem_request *gem_request;
363 ret = mutex_lock_interruptible(&dev->struct_mutex);
368 for_each_ring(ring, dev_priv, i) {
369 if (list_empty(&ring->request_list))
372 seq_printf(m, "%s requests:\n", ring->name);
373 list_for_each_entry(gem_request,
376 seq_printf(m, " %d @ %d\n",
378 (int) (jiffies - gem_request->emitted_jiffies));
382 mutex_unlock(&dev->struct_mutex);
385 seq_printf(m, "No requests\n");
390 static void i915_ring_seqno_info(struct seq_file *m,
391 struct intel_ring_buffer *ring)
393 if (ring->get_seqno) {
394 seq_printf(m, "Current sequence (%s): %u\n",
395 ring->name, ring->get_seqno(ring, false));
399 static int i915_gem_seqno_info(struct seq_file *m, void *data)
401 struct drm_info_node *node = (struct drm_info_node *) m->private;
402 struct drm_device *dev = node->minor->dev;
403 drm_i915_private_t *dev_priv = dev->dev_private;
404 struct intel_ring_buffer *ring;
407 ret = mutex_lock_interruptible(&dev->struct_mutex);
411 for_each_ring(ring, dev_priv, i)
412 i915_ring_seqno_info(m, ring);
414 mutex_unlock(&dev->struct_mutex);
420 static int i915_interrupt_info(struct seq_file *m, void *data)
422 struct drm_info_node *node = (struct drm_info_node *) m->private;
423 struct drm_device *dev = node->minor->dev;
424 drm_i915_private_t *dev_priv = dev->dev_private;
425 struct intel_ring_buffer *ring;
428 ret = mutex_lock_interruptible(&dev->struct_mutex);
432 if (IS_VALLEYVIEW(dev)) {
433 seq_printf(m, "Display IER:\t%08x\n",
435 seq_printf(m, "Display IIR:\t%08x\n",
437 seq_printf(m, "Display IIR_RW:\t%08x\n",
438 I915_READ(VLV_IIR_RW));
439 seq_printf(m, "Display IMR:\t%08x\n",
442 seq_printf(m, "Pipe %c stat:\t%08x\n",
444 I915_READ(PIPESTAT(pipe)));
446 seq_printf(m, "Master IER:\t%08x\n",
447 I915_READ(VLV_MASTER_IER));
449 seq_printf(m, "Render IER:\t%08x\n",
451 seq_printf(m, "Render IIR:\t%08x\n",
453 seq_printf(m, "Render IMR:\t%08x\n",
456 seq_printf(m, "PM IER:\t\t%08x\n",
457 I915_READ(GEN6_PMIER));
458 seq_printf(m, "PM IIR:\t\t%08x\n",
459 I915_READ(GEN6_PMIIR));
460 seq_printf(m, "PM IMR:\t\t%08x\n",
461 I915_READ(GEN6_PMIMR));
463 seq_printf(m, "Port hotplug:\t%08x\n",
464 I915_READ(PORT_HOTPLUG_EN));
465 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
466 I915_READ(VLV_DPFLIPSTAT));
467 seq_printf(m, "DPINVGTT:\t%08x\n",
468 I915_READ(DPINVGTT));
470 } else if (!HAS_PCH_SPLIT(dev)) {
471 seq_printf(m, "Interrupt enable: %08x\n",
473 seq_printf(m, "Interrupt identity: %08x\n",
475 seq_printf(m, "Interrupt mask: %08x\n",
478 seq_printf(m, "Pipe %c stat: %08x\n",
480 I915_READ(PIPESTAT(pipe)));
482 seq_printf(m, "North Display Interrupt enable: %08x\n",
484 seq_printf(m, "North Display Interrupt identity: %08x\n",
486 seq_printf(m, "North Display Interrupt mask: %08x\n",
488 seq_printf(m, "South Display Interrupt enable: %08x\n",
490 seq_printf(m, "South Display Interrupt identity: %08x\n",
492 seq_printf(m, "South Display Interrupt mask: %08x\n",
494 seq_printf(m, "Graphics Interrupt enable: %08x\n",
496 seq_printf(m, "Graphics Interrupt identity: %08x\n",
498 seq_printf(m, "Graphics Interrupt mask: %08x\n",
501 seq_printf(m, "Interrupts received: %d\n",
502 atomic_read(&dev_priv->irq_received));
503 for_each_ring(ring, dev_priv, i) {
504 if (IS_GEN6(dev) || IS_GEN7(dev)) {
506 "Graphics Interrupt mask (%s): %08x\n",
507 ring->name, I915_READ_IMR(ring));
509 i915_ring_seqno_info(m, ring);
511 mutex_unlock(&dev->struct_mutex);
516 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
518 struct drm_info_node *node = (struct drm_info_node *) m->private;
519 struct drm_device *dev = node->minor->dev;
520 drm_i915_private_t *dev_priv = dev->dev_private;
523 ret = mutex_lock_interruptible(&dev->struct_mutex);
527 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
528 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
529 for (i = 0; i < dev_priv->num_fence_regs; i++) {
530 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
532 seq_printf(m, "Fence %d, pin count = %d, object = ",
533 i, dev_priv->fence_regs[i].pin_count);
535 seq_printf(m, "unused");
537 describe_obj(m, obj);
541 mutex_unlock(&dev->struct_mutex);
545 static int i915_hws_info(struct seq_file *m, void *data)
547 struct drm_info_node *node = (struct drm_info_node *) m->private;
548 struct drm_device *dev = node->minor->dev;
549 drm_i915_private_t *dev_priv = dev->dev_private;
550 struct intel_ring_buffer *ring;
554 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
555 hws = ring->status_page.page_addr;
559 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
560 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
562 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
567 static const char *ring_str(int ring)
570 case RCS: return "render";
571 case VCS: return "bsd";
572 case BCS: return "blt";
577 static const char *pin_flag(int pinned)
587 static const char *tiling_flag(int tiling)
591 case I915_TILING_NONE: return "";
592 case I915_TILING_X: return " X";
593 case I915_TILING_Y: return " Y";
597 static const char *dirty_flag(int dirty)
599 return dirty ? " dirty" : "";
602 static const char *purgeable_flag(int purgeable)
604 return purgeable ? " purgeable" : "";
607 static void print_error_buffers(struct seq_file *m,
609 struct drm_i915_error_buffer *err,
612 seq_printf(m, "%s [%d]:\n", name, count);
615 seq_printf(m, " %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
620 err->rseqno, err->wseqno,
621 pin_flag(err->pinned),
622 tiling_flag(err->tiling),
623 dirty_flag(err->dirty),
624 purgeable_flag(err->purgeable),
625 err->ring != -1 ? " " : "",
627 cache_level_str(err->cache_level));
630 seq_printf(m, " (name: %d)", err->name);
631 if (err->fence_reg != I915_FENCE_REG_NONE)
632 seq_printf(m, " (fence: %d)", err->fence_reg);
639 static void i915_ring_error_state(struct seq_file *m,
640 struct drm_device *dev,
641 struct drm_i915_error_state *error,
644 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
645 seq_printf(m, "%s command stream:\n", ring_str(ring));
646 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
647 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
648 seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]);
649 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
650 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
651 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
652 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
653 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
654 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
656 if (INTEL_INFO(dev)->gen >= 4)
657 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
658 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
659 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
660 if (INTEL_INFO(dev)->gen >= 6) {
661 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
662 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
663 seq_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
664 error->semaphore_mboxes[ring][0],
665 error->semaphore_seqno[ring][0]);
666 seq_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
667 error->semaphore_mboxes[ring][1],
668 error->semaphore_seqno[ring][1]);
670 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
671 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
672 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
673 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
676 struct i915_error_state_file_priv {
677 struct drm_device *dev;
678 struct drm_i915_error_state *error;
681 static int i915_error_state(struct seq_file *m, void *unused)
683 struct i915_error_state_file_priv *error_priv = m->private;
684 struct drm_device *dev = error_priv->dev;
685 drm_i915_private_t *dev_priv = dev->dev_private;
686 struct drm_i915_error_state *error = error_priv->error;
687 struct intel_ring_buffer *ring;
688 int i, j, page, offset, elt;
691 seq_printf(m, "no error state collected\n");
695 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
696 error->time.tv_usec);
697 seq_printf(m, "Kernel: " UTS_RELEASE "\n");
698 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
699 seq_printf(m, "EIR: 0x%08x\n", error->eir);
700 seq_printf(m, "IER: 0x%08x\n", error->ier);
701 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
702 seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
703 seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
704 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
706 for (i = 0; i < dev_priv->num_fence_regs; i++)
707 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
709 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
710 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
712 if (INTEL_INFO(dev)->gen >= 6) {
713 seq_printf(m, "ERROR: 0x%08x\n", error->error);
714 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
717 if (INTEL_INFO(dev)->gen == 7)
718 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
720 for_each_ring(ring, dev_priv, i)
721 i915_ring_error_state(m, dev, error, i);
723 if (error->active_bo)
724 print_error_buffers(m, "Active",
726 error->active_bo_count);
728 if (error->pinned_bo)
729 print_error_buffers(m, "Pinned",
731 error->pinned_bo_count);
733 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
734 struct drm_i915_error_object *obj;
736 if ((obj = error->ring[i].batchbuffer)) {
737 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
738 dev_priv->ring[i].name,
741 for (page = 0; page < obj->page_count; page++) {
742 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
743 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
749 if (error->ring[i].num_requests) {
750 seq_printf(m, "%s --- %d requests\n",
751 dev_priv->ring[i].name,
752 error->ring[i].num_requests);
753 for (j = 0; j < error->ring[i].num_requests; j++) {
754 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
755 error->ring[i].requests[j].seqno,
756 error->ring[i].requests[j].jiffies,
757 error->ring[i].requests[j].tail);
761 if ((obj = error->ring[i].ringbuffer)) {
762 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
763 dev_priv->ring[i].name,
766 for (page = 0; page < obj->page_count; page++) {
767 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
768 seq_printf(m, "%08x : %08x\n",
770 obj->pages[page][elt]);
776 obj = error->ring[i].ctx;
778 seq_printf(m, "%s --- HW Context = 0x%08x\n",
779 dev_priv->ring[i].name,
782 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
783 seq_printf(m, "[%04x] %08x %08x %08x %08x\n",
786 obj->pages[0][elt+1],
787 obj->pages[0][elt+2],
788 obj->pages[0][elt+3]);
795 intel_overlay_print_error_state(m, error->overlay);
798 intel_display_print_error_state(m, dev, error->display);
804 i915_error_state_write(struct file *filp,
805 const char __user *ubuf,
809 struct seq_file *m = filp->private_data;
810 struct i915_error_state_file_priv *error_priv = m->private;
811 struct drm_device *dev = error_priv->dev;
814 DRM_DEBUG_DRIVER("Resetting error state\n");
816 ret = mutex_lock_interruptible(&dev->struct_mutex);
820 i915_destroy_error_state(dev);
821 mutex_unlock(&dev->struct_mutex);
826 static int i915_error_state_open(struct inode *inode, struct file *file)
828 struct drm_device *dev = inode->i_private;
829 drm_i915_private_t *dev_priv = dev->dev_private;
830 struct i915_error_state_file_priv *error_priv;
833 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
837 error_priv->dev = dev;
839 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
840 error_priv->error = dev_priv->gpu_error.first_error;
841 if (error_priv->error)
842 kref_get(&error_priv->error->ref);
843 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
845 return single_open(file, i915_error_state, error_priv);
848 static int i915_error_state_release(struct inode *inode, struct file *file)
850 struct seq_file *m = file->private_data;
851 struct i915_error_state_file_priv *error_priv = m->private;
853 if (error_priv->error)
854 kref_put(&error_priv->error->ref, i915_error_state_free);
857 return single_release(inode, file);
860 static const struct file_operations i915_error_state_fops = {
861 .owner = THIS_MODULE,
862 .open = i915_error_state_open,
864 .write = i915_error_state_write,
865 .llseek = default_llseek,
866 .release = i915_error_state_release,
870 i915_next_seqno_get(void *data, u64 *val)
872 struct drm_device *dev = data;
873 drm_i915_private_t *dev_priv = dev->dev_private;
876 ret = mutex_lock_interruptible(&dev->struct_mutex);
880 *val = dev_priv->next_seqno;
881 mutex_unlock(&dev->struct_mutex);
887 i915_next_seqno_set(void *data, u64 val)
889 struct drm_device *dev = data;
892 ret = mutex_lock_interruptible(&dev->struct_mutex);
896 ret = i915_gem_set_seqno(dev, val);
897 mutex_unlock(&dev->struct_mutex);
902 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
903 i915_next_seqno_get, i915_next_seqno_set,
904 "next_seqno : 0x%llx\n");
906 static int i915_rstdby_delays(struct seq_file *m, void *unused)
908 struct drm_info_node *node = (struct drm_info_node *) m->private;
909 struct drm_device *dev = node->minor->dev;
910 drm_i915_private_t *dev_priv = dev->dev_private;
914 ret = mutex_lock_interruptible(&dev->struct_mutex);
918 crstanddelay = I915_READ16(CRSTANDVID);
920 mutex_unlock(&dev->struct_mutex);
922 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
927 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
929 struct drm_info_node *node = (struct drm_info_node *) m->private;
930 struct drm_device *dev = node->minor->dev;
931 drm_i915_private_t *dev_priv = dev->dev_private;
935 u16 rgvswctl = I915_READ16(MEMSWCTL);
936 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
938 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
939 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
940 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
942 seq_printf(m, "Current P-state: %d\n",
943 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
944 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
945 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
946 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
947 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
949 u32 rpupei, rpcurup, rpprevup;
950 u32 rpdownei, rpcurdown, rpprevdown;
953 /* RPSTAT1 is in the GT power well */
954 ret = mutex_lock_interruptible(&dev->struct_mutex);
958 gen6_gt_force_wake_get(dev_priv);
960 rpstat = I915_READ(GEN6_RPSTAT1);
961 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
962 rpcurup = I915_READ(GEN6_RP_CUR_UP);
963 rpprevup = I915_READ(GEN6_RP_PREV_UP);
964 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
965 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
966 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
968 cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
970 cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
971 cagf *= GT_FREQUENCY_MULTIPLIER;
973 gen6_gt_force_wake_put(dev_priv);
974 mutex_unlock(&dev->struct_mutex);
976 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
977 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
978 seq_printf(m, "Render p-state ratio: %d\n",
979 (gt_perf_status & 0xff00) >> 8);
980 seq_printf(m, "Render p-state VID: %d\n",
981 gt_perf_status & 0xff);
982 seq_printf(m, "Render p-state limit: %d\n",
983 rp_state_limits & 0xff);
984 seq_printf(m, "CAGF: %dMHz\n", cagf);
985 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
987 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
988 GEN6_CURBSYTAVG_MASK);
989 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
990 GEN6_CURBSYTAVG_MASK);
991 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
993 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
994 GEN6_CURBSYTAVG_MASK);
995 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
996 GEN6_CURBSYTAVG_MASK);
998 max_freq = (rp_state_cap & 0xff0000) >> 16;
999 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1000 max_freq * GT_FREQUENCY_MULTIPLIER);
1002 max_freq = (rp_state_cap & 0xff00) >> 8;
1003 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1004 max_freq * GT_FREQUENCY_MULTIPLIER);
1006 max_freq = rp_state_cap & 0xff;
1007 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1008 max_freq * GT_FREQUENCY_MULTIPLIER);
1010 seq_printf(m, "no P-state info available\n");
1016 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1018 struct drm_info_node *node = (struct drm_info_node *) m->private;
1019 struct drm_device *dev = node->minor->dev;
1020 drm_i915_private_t *dev_priv = dev->dev_private;
1024 ret = mutex_lock_interruptible(&dev->struct_mutex);
1028 for (i = 0; i < 16; i++) {
1029 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1030 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1031 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1034 mutex_unlock(&dev->struct_mutex);
1039 static inline int MAP_TO_MV(int map)
1041 return 1250 - (map * 25);
1044 static int i915_inttoext_table(struct seq_file *m, void *unused)
1046 struct drm_info_node *node = (struct drm_info_node *) m->private;
1047 struct drm_device *dev = node->minor->dev;
1048 drm_i915_private_t *dev_priv = dev->dev_private;
1052 ret = mutex_lock_interruptible(&dev->struct_mutex);
1056 for (i = 1; i <= 32; i++) {
1057 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1058 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1061 mutex_unlock(&dev->struct_mutex);
1066 static int ironlake_drpc_info(struct seq_file *m)
1068 struct drm_info_node *node = (struct drm_info_node *) m->private;
1069 struct drm_device *dev = node->minor->dev;
1070 drm_i915_private_t *dev_priv = dev->dev_private;
1071 u32 rgvmodectl, rstdbyctl;
1075 ret = mutex_lock_interruptible(&dev->struct_mutex);
1079 rgvmodectl = I915_READ(MEMMODECTL);
1080 rstdbyctl = I915_READ(RSTDBYCTL);
1081 crstandvid = I915_READ16(CRSTANDVID);
1083 mutex_unlock(&dev->struct_mutex);
1085 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1087 seq_printf(m, "Boost freq: %d\n",
1088 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1089 MEMMODE_BOOST_FREQ_SHIFT);
1090 seq_printf(m, "HW control enabled: %s\n",
1091 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1092 seq_printf(m, "SW control enabled: %s\n",
1093 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1094 seq_printf(m, "Gated voltage change: %s\n",
1095 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1096 seq_printf(m, "Starting frequency: P%d\n",
1097 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1098 seq_printf(m, "Max P-state: P%d\n",
1099 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1100 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1101 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1102 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1103 seq_printf(m, "Render standby enabled: %s\n",
1104 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1105 seq_printf(m, "Current RS state: ");
1106 switch (rstdbyctl & RSX_STATUS_MASK) {
1108 seq_printf(m, "on\n");
1110 case RSX_STATUS_RC1:
1111 seq_printf(m, "RC1\n");
1113 case RSX_STATUS_RC1E:
1114 seq_printf(m, "RC1E\n");
1116 case RSX_STATUS_RS1:
1117 seq_printf(m, "RS1\n");
1119 case RSX_STATUS_RS2:
1120 seq_printf(m, "RS2 (RC6)\n");
1122 case RSX_STATUS_RS3:
1123 seq_printf(m, "RC3 (RC6+)\n");
1126 seq_printf(m, "unknown\n");
1133 static int gen6_drpc_info(struct seq_file *m)
1136 struct drm_info_node *node = (struct drm_info_node *) m->private;
1137 struct drm_device *dev = node->minor->dev;
1138 struct drm_i915_private *dev_priv = dev->dev_private;
1139 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1140 unsigned forcewake_count;
1144 ret = mutex_lock_interruptible(&dev->struct_mutex);
1148 spin_lock_irq(&dev_priv->gt_lock);
1149 forcewake_count = dev_priv->forcewake_count;
1150 spin_unlock_irq(&dev_priv->gt_lock);
1152 if (forcewake_count) {
1153 seq_printf(m, "RC information inaccurate because somebody "
1154 "holds a forcewake reference \n");
1156 /* NB: we cannot use forcewake, else we read the wrong values */
1157 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1159 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1162 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1163 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1165 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1166 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1167 mutex_unlock(&dev->struct_mutex);
1168 mutex_lock(&dev_priv->rps.hw_lock);
1169 sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1170 mutex_unlock(&dev_priv->rps.hw_lock);
1172 seq_printf(m, "Video Turbo Mode: %s\n",
1173 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1174 seq_printf(m, "HW control enabled: %s\n",
1175 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1176 seq_printf(m, "SW control enabled: %s\n",
1177 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1178 GEN6_RP_MEDIA_SW_MODE));
1179 seq_printf(m, "RC1e Enabled: %s\n",
1180 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1181 seq_printf(m, "RC6 Enabled: %s\n",
1182 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1183 seq_printf(m, "Deep RC6 Enabled: %s\n",
1184 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1185 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1186 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1187 seq_printf(m, "Current RC state: ");
1188 switch (gt_core_status & GEN6_RCn_MASK) {
1190 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1191 seq_printf(m, "Core Power Down\n");
1193 seq_printf(m, "on\n");
1196 seq_printf(m, "RC3\n");
1199 seq_printf(m, "RC6\n");
1202 seq_printf(m, "RC7\n");
1205 seq_printf(m, "Unknown\n");
1209 seq_printf(m, "Core Power Down: %s\n",
1210 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1212 /* Not exactly sure what this is */
1213 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1214 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1215 seq_printf(m, "RC6 residency since boot: %u\n",
1216 I915_READ(GEN6_GT_GFX_RC6));
1217 seq_printf(m, "RC6+ residency since boot: %u\n",
1218 I915_READ(GEN6_GT_GFX_RC6p));
1219 seq_printf(m, "RC6++ residency since boot: %u\n",
1220 I915_READ(GEN6_GT_GFX_RC6pp));
1222 seq_printf(m, "RC6 voltage: %dmV\n",
1223 GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1224 seq_printf(m, "RC6+ voltage: %dmV\n",
1225 GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1226 seq_printf(m, "RC6++ voltage: %dmV\n",
1227 GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1231 static int i915_drpc_info(struct seq_file *m, void *unused)
1233 struct drm_info_node *node = (struct drm_info_node *) m->private;
1234 struct drm_device *dev = node->minor->dev;
1236 if (IS_GEN6(dev) || IS_GEN7(dev))
1237 return gen6_drpc_info(m);
1239 return ironlake_drpc_info(m);
1242 static int i915_fbc_status(struct seq_file *m, void *unused)
1244 struct drm_info_node *node = (struct drm_info_node *) m->private;
1245 struct drm_device *dev = node->minor->dev;
1246 drm_i915_private_t *dev_priv = dev->dev_private;
1248 if (!I915_HAS_FBC(dev)) {
1249 seq_printf(m, "FBC unsupported on this chipset\n");
1253 if (intel_fbc_enabled(dev)) {
1254 seq_printf(m, "FBC enabled\n");
1256 seq_printf(m, "FBC disabled: ");
1257 switch (dev_priv->no_fbc_reason) {
1259 seq_printf(m, "no outputs");
1261 case FBC_STOLEN_TOO_SMALL:
1262 seq_printf(m, "not enough stolen memory");
1264 case FBC_UNSUPPORTED_MODE:
1265 seq_printf(m, "mode not supported");
1267 case FBC_MODE_TOO_LARGE:
1268 seq_printf(m, "mode too large");
1271 seq_printf(m, "FBC unsupported on plane");
1274 seq_printf(m, "scanout buffer not tiled");
1276 case FBC_MULTIPLE_PIPES:
1277 seq_printf(m, "multiple pipes are enabled");
1279 case FBC_MODULE_PARAM:
1280 seq_printf(m, "disabled per module param (default off)");
1283 seq_printf(m, "unknown reason");
1285 seq_printf(m, "\n");
1290 static int i915_sr_status(struct seq_file *m, void *unused)
1292 struct drm_info_node *node = (struct drm_info_node *) m->private;
1293 struct drm_device *dev = node->minor->dev;
1294 drm_i915_private_t *dev_priv = dev->dev_private;
1295 bool sr_enabled = false;
1297 if (HAS_PCH_SPLIT(dev))
1298 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1299 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1300 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1301 else if (IS_I915GM(dev))
1302 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1303 else if (IS_PINEVIEW(dev))
1304 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1306 seq_printf(m, "self-refresh: %s\n",
1307 sr_enabled ? "enabled" : "disabled");
1312 static int i915_emon_status(struct seq_file *m, void *unused)
1314 struct drm_info_node *node = (struct drm_info_node *) m->private;
1315 struct drm_device *dev = node->minor->dev;
1316 drm_i915_private_t *dev_priv = dev->dev_private;
1317 unsigned long temp, chipset, gfx;
1323 ret = mutex_lock_interruptible(&dev->struct_mutex);
1327 temp = i915_mch_val(dev_priv);
1328 chipset = i915_chipset_val(dev_priv);
1329 gfx = i915_gfx_val(dev_priv);
1330 mutex_unlock(&dev->struct_mutex);
1332 seq_printf(m, "GMCH temp: %ld\n", temp);
1333 seq_printf(m, "Chipset power: %ld\n", chipset);
1334 seq_printf(m, "GFX power: %ld\n", gfx);
1335 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1340 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1342 struct drm_info_node *node = (struct drm_info_node *) m->private;
1343 struct drm_device *dev = node->minor->dev;
1344 drm_i915_private_t *dev_priv = dev->dev_private;
1346 int gpu_freq, ia_freq;
1348 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1349 seq_printf(m, "unsupported on this chipset\n");
1353 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1357 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1359 for (gpu_freq = dev_priv->rps.min_delay;
1360 gpu_freq <= dev_priv->rps.max_delay;
1363 sandybridge_pcode_read(dev_priv,
1364 GEN6_PCODE_READ_MIN_FREQ_TABLE,
1366 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
1369 mutex_unlock(&dev_priv->rps.hw_lock);
1374 static int i915_gfxec(struct seq_file *m, void *unused)
1376 struct drm_info_node *node = (struct drm_info_node *) m->private;
1377 struct drm_device *dev = node->minor->dev;
1378 drm_i915_private_t *dev_priv = dev->dev_private;
1381 ret = mutex_lock_interruptible(&dev->struct_mutex);
1385 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1387 mutex_unlock(&dev->struct_mutex);
1392 static int i915_opregion(struct seq_file *m, void *unused)
1394 struct drm_info_node *node = (struct drm_info_node *) m->private;
1395 struct drm_device *dev = node->minor->dev;
1396 drm_i915_private_t *dev_priv = dev->dev_private;
1397 struct intel_opregion *opregion = &dev_priv->opregion;
1398 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1404 ret = mutex_lock_interruptible(&dev->struct_mutex);
1408 if (opregion->header) {
1409 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1410 seq_write(m, data, OPREGION_SIZE);
1413 mutex_unlock(&dev->struct_mutex);
1420 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1422 struct drm_info_node *node = (struct drm_info_node *) m->private;
1423 struct drm_device *dev = node->minor->dev;
1424 drm_i915_private_t *dev_priv = dev->dev_private;
1425 struct intel_fbdev *ifbdev;
1426 struct intel_framebuffer *fb;
1429 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1433 ifbdev = dev_priv->fbdev;
1434 fb = to_intel_framebuffer(ifbdev->helper.fb);
1436 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1440 fb->base.bits_per_pixel,
1441 atomic_read(&fb->base.refcount.refcount));
1442 describe_obj(m, fb->obj);
1443 seq_printf(m, "\n");
1444 mutex_unlock(&dev->mode_config.mutex);
1446 mutex_lock(&dev->mode_config.fb_lock);
1447 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1448 if (&fb->base == ifbdev->helper.fb)
1451 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1455 fb->base.bits_per_pixel,
1456 atomic_read(&fb->base.refcount.refcount));
1457 describe_obj(m, fb->obj);
1458 seq_printf(m, "\n");
1460 mutex_unlock(&dev->mode_config.fb_lock);
1465 static int i915_context_status(struct seq_file *m, void *unused)
1467 struct drm_info_node *node = (struct drm_info_node *) m->private;
1468 struct drm_device *dev = node->minor->dev;
1469 drm_i915_private_t *dev_priv = dev->dev_private;
1470 struct intel_ring_buffer *ring;
1473 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1477 if (dev_priv->ips.pwrctx) {
1478 seq_printf(m, "power context ");
1479 describe_obj(m, dev_priv->ips.pwrctx);
1480 seq_printf(m, "\n");
1483 if (dev_priv->ips.renderctx) {
1484 seq_printf(m, "render context ");
1485 describe_obj(m, dev_priv->ips.renderctx);
1486 seq_printf(m, "\n");
1489 for_each_ring(ring, dev_priv, i) {
1490 if (ring->default_context) {
1491 seq_printf(m, "HW default context %s ring ", ring->name);
1492 describe_obj(m, ring->default_context->obj);
1493 seq_printf(m, "\n");
1497 mutex_unlock(&dev->mode_config.mutex);
1502 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1504 struct drm_info_node *node = (struct drm_info_node *) m->private;
1505 struct drm_device *dev = node->minor->dev;
1506 struct drm_i915_private *dev_priv = dev->dev_private;
1507 unsigned forcewake_count;
1509 spin_lock_irq(&dev_priv->gt_lock);
1510 forcewake_count = dev_priv->forcewake_count;
1511 spin_unlock_irq(&dev_priv->gt_lock);
1513 seq_printf(m, "forcewake count = %u\n", forcewake_count);
1518 static const char *swizzle_string(unsigned swizzle)
1521 case I915_BIT_6_SWIZZLE_NONE:
1523 case I915_BIT_6_SWIZZLE_9:
1525 case I915_BIT_6_SWIZZLE_9_10:
1526 return "bit9/bit10";
1527 case I915_BIT_6_SWIZZLE_9_11:
1528 return "bit9/bit11";
1529 case I915_BIT_6_SWIZZLE_9_10_11:
1530 return "bit9/bit10/bit11";
1531 case I915_BIT_6_SWIZZLE_9_17:
1532 return "bit9/bit17";
1533 case I915_BIT_6_SWIZZLE_9_10_17:
1534 return "bit9/bit10/bit17";
1535 case I915_BIT_6_SWIZZLE_UNKNOWN:
1542 static int i915_swizzle_info(struct seq_file *m, void *data)
1544 struct drm_info_node *node = (struct drm_info_node *) m->private;
1545 struct drm_device *dev = node->minor->dev;
1546 struct drm_i915_private *dev_priv = dev->dev_private;
1549 ret = mutex_lock_interruptible(&dev->struct_mutex);
1553 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1554 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1555 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1556 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1558 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1559 seq_printf(m, "DDC = 0x%08x\n",
1561 seq_printf(m, "C0DRB3 = 0x%04x\n",
1562 I915_READ16(C0DRB3));
1563 seq_printf(m, "C1DRB3 = 0x%04x\n",
1564 I915_READ16(C1DRB3));
1565 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1566 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1567 I915_READ(MAD_DIMM_C0));
1568 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1569 I915_READ(MAD_DIMM_C1));
1570 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1571 I915_READ(MAD_DIMM_C2));
1572 seq_printf(m, "TILECTL = 0x%08x\n",
1573 I915_READ(TILECTL));
1574 seq_printf(m, "ARB_MODE = 0x%08x\n",
1575 I915_READ(ARB_MODE));
1576 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1577 I915_READ(DISP_ARB_CTL));
1579 mutex_unlock(&dev->struct_mutex);
1584 static int i915_ppgtt_info(struct seq_file *m, void *data)
1586 struct drm_info_node *node = (struct drm_info_node *) m->private;
1587 struct drm_device *dev = node->minor->dev;
1588 struct drm_i915_private *dev_priv = dev->dev_private;
1589 struct intel_ring_buffer *ring;
1593 ret = mutex_lock_interruptible(&dev->struct_mutex);
1596 if (INTEL_INFO(dev)->gen == 6)
1597 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1599 for_each_ring(ring, dev_priv, i) {
1600 seq_printf(m, "%s\n", ring->name);
1601 if (INTEL_INFO(dev)->gen == 7)
1602 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1603 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1604 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1605 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1607 if (dev_priv->mm.aliasing_ppgtt) {
1608 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1610 seq_printf(m, "aliasing PPGTT:\n");
1611 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1613 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1614 mutex_unlock(&dev->struct_mutex);
1619 static int i915_dpio_info(struct seq_file *m, void *data)
1621 struct drm_info_node *node = (struct drm_info_node *) m->private;
1622 struct drm_device *dev = node->minor->dev;
1623 struct drm_i915_private *dev_priv = dev->dev_private;
1627 if (!IS_VALLEYVIEW(dev)) {
1628 seq_printf(m, "unsupported\n");
1632 ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1636 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1638 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1639 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1640 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1641 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1643 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1644 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1645 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1646 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1648 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1649 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1650 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1651 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1653 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1654 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1655 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1656 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1658 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1659 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1661 mutex_unlock(&dev_priv->dpio_lock);
1667 i915_wedged_get(void *data, u64 *val)
1669 struct drm_device *dev = data;
1670 drm_i915_private_t *dev_priv = dev->dev_private;
1672 *val = atomic_read(&dev_priv->gpu_error.reset_counter);
1678 i915_wedged_set(void *data, u64 val)
1680 struct drm_device *dev = data;
1682 DRM_INFO("Manually setting wedged to %llu\n", val);
1683 i915_handle_error(dev, val);
1688 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
1689 i915_wedged_get, i915_wedged_set,
1693 i915_ring_stop_get(void *data, u64 *val)
1695 struct drm_device *dev = data;
1696 drm_i915_private_t *dev_priv = dev->dev_private;
1698 *val = dev_priv->gpu_error.stop_rings;
1704 i915_ring_stop_set(void *data, u64 val)
1706 struct drm_device *dev = data;
1707 struct drm_i915_private *dev_priv = dev->dev_private;
1710 DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val);
1712 ret = mutex_lock_interruptible(&dev->struct_mutex);
1716 dev_priv->gpu_error.stop_rings = val;
1717 mutex_unlock(&dev->struct_mutex);
1722 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
1723 i915_ring_stop_get, i915_ring_stop_set,
1726 #define DROP_UNBOUND 0x1
1727 #define DROP_BOUND 0x2
1728 #define DROP_RETIRE 0x4
1729 #define DROP_ACTIVE 0x8
1730 #define DROP_ALL (DROP_UNBOUND | \
1735 i915_drop_caches_get(void *data, u64 *val)
1743 i915_drop_caches_set(void *data, u64 val)
1745 struct drm_device *dev = data;
1746 struct drm_i915_private *dev_priv = dev->dev_private;
1747 struct drm_i915_gem_object *obj, *next;
1750 DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
1752 /* No need to check and wait for gpu resets, only libdrm auto-restarts
1753 * on ioctls on -EAGAIN. */
1754 ret = mutex_lock_interruptible(&dev->struct_mutex);
1758 if (val & DROP_ACTIVE) {
1759 ret = i915_gpu_idle(dev);
1764 if (val & (DROP_RETIRE | DROP_ACTIVE))
1765 i915_gem_retire_requests(dev);
1767 if (val & DROP_BOUND) {
1768 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
1769 if (obj->pin_count == 0) {
1770 ret = i915_gem_object_unbind(obj);
1776 if (val & DROP_UNBOUND) {
1777 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, gtt_list)
1778 if (obj->pages_pin_count == 0) {
1779 ret = i915_gem_object_put_pages(obj);
1786 mutex_unlock(&dev->struct_mutex);
1791 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
1792 i915_drop_caches_get, i915_drop_caches_set,
1796 i915_max_freq_get(void *data, u64 *val)
1798 struct drm_device *dev = data;
1799 drm_i915_private_t *dev_priv = dev->dev_private;
1802 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1805 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1809 *val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
1810 mutex_unlock(&dev_priv->rps.hw_lock);
1816 i915_max_freq_set(void *data, u64 val)
1818 struct drm_device *dev = data;
1819 struct drm_i915_private *dev_priv = dev->dev_private;
1822 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1825 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
1827 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1832 * Turbo will still be enabled, but won't go above the set value.
1834 do_div(val, GT_FREQUENCY_MULTIPLIER);
1835 dev_priv->rps.max_delay = val;
1836 gen6_set_rps(dev, val);
1837 mutex_unlock(&dev_priv->rps.hw_lock);
1842 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
1843 i915_max_freq_get, i915_max_freq_set,
1844 "max freq: %llu\n");
1847 i915_min_freq_get(void *data, u64 *val)
1849 struct drm_device *dev = data;
1850 drm_i915_private_t *dev_priv = dev->dev_private;
1853 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1856 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1860 *val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
1861 mutex_unlock(&dev_priv->rps.hw_lock);
1867 i915_min_freq_set(void *data, u64 val)
1869 struct drm_device *dev = data;
1870 struct drm_i915_private *dev_priv = dev->dev_private;
1873 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1876 DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
1878 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1883 * Turbo will still be enabled, but won't go below the set value.
1885 do_div(val, GT_FREQUENCY_MULTIPLIER);
1886 dev_priv->rps.min_delay = val;
1887 gen6_set_rps(dev, val);
1888 mutex_unlock(&dev_priv->rps.hw_lock);
1893 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
1894 i915_min_freq_get, i915_min_freq_set,
1895 "min freq: %llu\n");
1898 i915_cache_sharing_get(void *data, u64 *val)
1900 struct drm_device *dev = data;
1901 drm_i915_private_t *dev_priv = dev->dev_private;
1905 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1908 ret = mutex_lock_interruptible(&dev->struct_mutex);
1912 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1913 mutex_unlock(&dev_priv->dev->struct_mutex);
1915 *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
1921 i915_cache_sharing_set(void *data, u64 val)
1923 struct drm_device *dev = data;
1924 struct drm_i915_private *dev_priv = dev->dev_private;
1927 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1933 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val);
1935 /* Update the cache sharing policy here as well */
1936 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1937 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1938 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1939 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1944 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops,
1945 i915_cache_sharing_get, i915_cache_sharing_set,
1948 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1949 * allocated we need to hook into the minor for release. */
1951 drm_add_fake_info_node(struct drm_minor *minor,
1955 struct drm_info_node *node;
1957 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1959 debugfs_remove(ent);
1963 node->minor = minor;
1965 node->info_ent = (void *) key;
1967 mutex_lock(&minor->debugfs_lock);
1968 list_add(&node->list, &minor->debugfs_list);
1969 mutex_unlock(&minor->debugfs_lock);
1974 static int i915_forcewake_open(struct inode *inode, struct file *file)
1976 struct drm_device *dev = inode->i_private;
1977 struct drm_i915_private *dev_priv = dev->dev_private;
1979 if (INTEL_INFO(dev)->gen < 6)
1982 gen6_gt_force_wake_get(dev_priv);
1987 static int i915_forcewake_release(struct inode *inode, struct file *file)
1989 struct drm_device *dev = inode->i_private;
1990 struct drm_i915_private *dev_priv = dev->dev_private;
1992 if (INTEL_INFO(dev)->gen < 6)
1995 gen6_gt_force_wake_put(dev_priv);
2000 static const struct file_operations i915_forcewake_fops = {
2001 .owner = THIS_MODULE,
2002 .open = i915_forcewake_open,
2003 .release = i915_forcewake_release,
2006 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2008 struct drm_device *dev = minor->dev;
2011 ent = debugfs_create_file("i915_forcewake_user",
2014 &i915_forcewake_fops);
2016 return PTR_ERR(ent);
2018 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2021 static int i915_debugfs_create(struct dentry *root,
2022 struct drm_minor *minor,
2024 const struct file_operations *fops)
2026 struct drm_device *dev = minor->dev;
2029 ent = debugfs_create_file(name,
2034 return PTR_ERR(ent);
2036 return drm_add_fake_info_node(minor, ent, fops);
2039 static struct drm_info_list i915_debugfs_list[] = {
2040 {"i915_capabilities", i915_capabilities, 0},
2041 {"i915_gem_objects", i915_gem_object_info, 0},
2042 {"i915_gem_gtt", i915_gem_gtt_info, 0},
2043 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2044 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2045 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2046 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2047 {"i915_gem_request", i915_gem_request_info, 0},
2048 {"i915_gem_seqno", i915_gem_seqno_info, 0},
2049 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2050 {"i915_gem_interrupt", i915_interrupt_info, 0},
2051 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2052 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2053 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2054 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2055 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2056 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2057 {"i915_inttoext_table", i915_inttoext_table, 0},
2058 {"i915_drpc_info", i915_drpc_info, 0},
2059 {"i915_emon_status", i915_emon_status, 0},
2060 {"i915_ring_freq_table", i915_ring_freq_table, 0},
2061 {"i915_gfxec", i915_gfxec, 0},
2062 {"i915_fbc_status", i915_fbc_status, 0},
2063 {"i915_sr_status", i915_sr_status, 0},
2064 {"i915_opregion", i915_opregion, 0},
2065 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2066 {"i915_context_status", i915_context_status, 0},
2067 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2068 {"i915_swizzle_info", i915_swizzle_info, 0},
2069 {"i915_ppgtt_info", i915_ppgtt_info, 0},
2070 {"i915_dpio", i915_dpio_info, 0},
2072 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2074 int i915_debugfs_init(struct drm_minor *minor)
2078 ret = i915_debugfs_create(minor->debugfs_root, minor,
2084 ret = i915_forcewake_create(minor->debugfs_root, minor);
2088 ret = i915_debugfs_create(minor->debugfs_root, minor,
2090 &i915_max_freq_fops);
2094 ret = i915_debugfs_create(minor->debugfs_root, minor,
2096 &i915_min_freq_fops);
2100 ret = i915_debugfs_create(minor->debugfs_root, minor,
2101 "i915_cache_sharing",
2102 &i915_cache_sharing_fops);
2106 ret = i915_debugfs_create(minor->debugfs_root, minor,
2108 &i915_ring_stop_fops);
2112 ret = i915_debugfs_create(minor->debugfs_root, minor,
2113 "i915_gem_drop_caches",
2114 &i915_drop_caches_fops);
2118 ret = i915_debugfs_create(minor->debugfs_root, minor,
2120 &i915_error_state_fops);
2124 ret = i915_debugfs_create(minor->debugfs_root, minor,
2126 &i915_next_seqno_fops);
2130 return drm_debugfs_create_files(i915_debugfs_list,
2131 I915_DEBUGFS_ENTRIES,
2132 minor->debugfs_root, minor);
2135 void i915_debugfs_cleanup(struct drm_minor *minor)
2137 drm_debugfs_remove_files(i915_debugfs_list,
2138 I915_DEBUGFS_ENTRIES, minor);
2139 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2141 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2143 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2145 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2147 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2149 drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2151 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2153 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2155 drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2159 #endif /* CONFIG_DEBUG_FS */