2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/seq_file.h>
32 #include <linux/spinlock.h>
33 #include <linux/export.h>
36 #include <linux/atomic.h>
38 #include <asm/eeh_event.h>
40 #include <asm/machdep.h>
41 #include <asm/ppc-pci.h>
46 * EEH, or "Extended Error Handling" is a PCI bridge technology for
47 * dealing with PCI bus errors that can't be dealt with within the
48 * usual PCI framework, except by check-stopping the CPU. Systems
49 * that are designed for high-availability/reliability cannot afford
50 * to crash due to a "mere" PCI error, thus the need for EEH.
51 * An EEH-capable bridge operates by converting a detected error
52 * into a "slot freeze", taking the PCI adapter off-line, making
53 * the slot behave, from the OS'es point of view, as if the slot
54 * were "empty": all reads return 0xff's and all writes are silently
55 * ignored. EEH slot isolation events can be triggered by parity
56 * errors on the address or data busses (e.g. during posted writes),
57 * which in turn might be caused by low voltage on the bus, dust,
58 * vibration, humidity, radioactivity or plain-old failed hardware.
60 * Note, however, that one of the leading causes of EEH slot
61 * freeze events are buggy device drivers, buggy device microcode,
62 * or buggy device hardware. This is because any attempt by the
63 * device to bus-master data to a memory address that is not
64 * assigned to the device will trigger a slot freeze. (The idea
65 * is to prevent devices-gone-wild from corrupting system memory).
66 * Buggy hardware/drivers will have a miserable time co-existing
69 * Ideally, a PCI device driver, when suspecting that an isolation
70 * event has occurred (e.g. by reading 0xff's), will then ask EEH
71 * whether this is the case, and then take appropriate steps to
72 * reset the PCI slot, the PCI device, and then resume operations.
73 * However, until that day, the checking is done here, with the
74 * eeh_check_failure() routine embedded in the MMIO macros. If
75 * the slot is found to be isolated, an "EEH Event" is synthesized
76 * and sent out for processing.
79 /* If a device driver keeps reading an MMIO register in an interrupt
80 * handler after a slot isolation event, it might be broken.
81 * This sets the threshold for how many read attempts we allow
82 * before printing an error message.
84 #define EEH_MAX_FAILS 2100000
86 /* Time to wait for a PCI slot to report status, in milliseconds */
87 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
89 /* Platform dependent EEH operations */
90 struct eeh_ops *eeh_ops = NULL;
92 int eeh_subsystem_enabled;
93 EXPORT_SYMBOL(eeh_subsystem_enabled);
96 * EEH probe mode support. The intention is to support multiple
97 * platforms for EEH. Some platforms like pSeries do PCI emunation
98 * based on device tree. However, other platforms like powernv probe
99 * PCI devices from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for particular
101 * OF node or PCI device so that the corresponding PE would be created
106 /* Global EEH mutex */
107 DEFINE_MUTEX(eeh_mutex);
109 /* Lock to avoid races due to multiple reports of an error */
110 DEFINE_RAW_SPINLOCK(confirm_error_lock);
112 /* Buffer for reporting pci register dumps. Its here in BSS, and
113 * not dynamically alloced, so that it ends up in RMO where RTAS
116 #define EEH_PCI_REGS_LOG_LEN 4096
117 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
120 * The struct is used to maintain the EEH global statistic
121 * information. Besides, the EEH global statistics will be
122 * exported to user space through procfs
125 u64 no_device; /* PCI device not found */
126 u64 no_dn; /* OF node not found */
127 u64 no_cfg_addr; /* Config address not found */
128 u64 ignored_check; /* EEH check skipped */
129 u64 total_mmio_ffs; /* Total EEH checks */
130 u64 false_positives; /* Unnecessary EEH checks */
131 u64 slot_resets; /* PE reset */
134 static struct eeh_stats eeh_stats;
136 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
139 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
140 * @edev: device to report data for
141 * @buf: point to buffer in which to log
142 * @len: amount of room in buffer
144 * This routine captures assorted PCI configuration space data,
145 * and puts them into a buffer for RTAS error logging.
147 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
149 struct device_node *dn = eeh_dev_to_of_node(edev);
150 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
155 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
156 printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
158 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
159 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
160 printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
162 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
163 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
164 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
167 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
171 /* Gather bridge-specific registers */
172 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
173 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
174 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
175 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
177 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
178 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
179 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
182 /* Dump out the PCI-X command and status regs */
183 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
185 eeh_ops->read_config(dn, cap, 4, &cfg);
186 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
187 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
189 eeh_ops->read_config(dn, cap+4, 4, &cfg);
190 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
191 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
194 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
195 cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
197 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
199 "EEH: PCI-E capabilities and status follow:\n");
201 for (i=0; i<=8; i++) {
202 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
203 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
204 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
207 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
209 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
211 "EEH: PCI-E AER capability register set follows:\n");
213 for (i=0; i<14; i++) {
214 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
215 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
216 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
225 * eeh_slot_error_detail - Generate combined log including driver log and error log
227 * @severity: temporary or permanent error log
229 * This routine should be called to generate the combined log, which
230 * is comprised of driver log and error log. The driver log is figured
231 * out from the config space of the corresponding PCI device, while
232 * the error log is fetched through platform dependent function call.
234 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
237 struct eeh_dev *edev;
239 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
240 eeh_ops->configure_bridge(pe);
241 eeh_pe_restore_bars(pe);
244 eeh_pe_for_each_dev(pe, edev) {
245 loglen += eeh_gather_pci_data(edev, pci_regs_buf,
246 EEH_PCI_REGS_LOG_LEN);
249 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
253 * eeh_token_to_phys - Convert EEH address token to phys address
254 * @token: I/O token, should be address in the form 0xA....
256 * This routine should be called to convert virtual I/O address
259 static inline unsigned long eeh_token_to_phys(unsigned long token)
266 * We won't find hugepages here, iomem
268 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
271 WARN_ON(hugepage_shift);
272 pa = pte_pfn(*ptep) << PAGE_SHIFT;
274 return pa | (token & (PAGE_SIZE-1));
278 * On PowerNV platform, we might already have fenced PHB there.
279 * For that case, it's meaningless to recover frozen PE. Intead,
280 * We have to handle fenced PHB firstly.
282 static int eeh_phb_check_failure(struct eeh_pe *pe)
284 struct eeh_pe *phb_pe;
288 if (!eeh_probe_mode_dev())
291 /* Find the PHB PE */
292 phb_pe = eeh_phb_pe_get(pe->phb);
294 pr_warning("%s Can't find PE for PHB#%d\n",
295 __func__, pe->phb->global_number);
299 /* If the PHB has been in problematic state */
300 eeh_serialize_lock(&flags);
301 if (phb_pe->state & (EEH_PE_ISOLATED | EEH_PE_PHB_DEAD)) {
306 /* Check PHB state */
307 ret = eeh_ops->get_state(phb_pe, NULL);
309 (ret == EEH_STATE_NOT_SUPPORT) ||
310 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
311 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
316 /* Isolate the PHB and send event */
317 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
318 eeh_serialize_unlock(flags);
319 eeh_send_failure_event(phb_pe);
321 WARN(1, "EEH: PHB failure detected\n");
325 eeh_serialize_unlock(flags);
330 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
333 * Check for an EEH failure for the given device node. Call this
334 * routine if the result of a read was all 0xff's and you want to
335 * find out if this is due to an EEH slot freeze. This routine
336 * will query firmware for the EEH status.
338 * Returns 0 if there has not been an EEH error; otherwise returns
339 * a non-zero value and queues up a slot isolation event notification.
341 * It is safe to call this routine in an interrupt context.
343 int eeh_dev_check_failure(struct eeh_dev *edev)
347 struct device_node *dn;
351 const char *location;
353 eeh_stats.total_mmio_ffs++;
355 if (!eeh_subsystem_enabled)
362 dn = eeh_dev_to_of_node(edev);
363 dev = eeh_dev_to_pci_dev(edev);
366 /* Access to IO BARs might get this far and still not want checking. */
368 eeh_stats.ignored_check++;
369 pr_debug("EEH: Ignored check for %s %s\n",
370 eeh_pci_name(dev), dn->full_name);
374 if (!pe->addr && !pe->config_addr) {
375 eeh_stats.no_cfg_addr++;
380 * On PowerNV platform, we might already have fenced PHB
381 * there and we need take care of that firstly.
383 ret = eeh_phb_check_failure(pe);
387 /* If we already have a pending isolation event for this
388 * slot, we know it's bad already, we don't need to check.
389 * Do this checking under a lock; as multiple PCI devices
390 * in one slot might report errors simultaneously, and we
391 * only want one error recovery routine running.
393 eeh_serialize_lock(&flags);
395 if (pe->state & EEH_PE_ISOLATED) {
397 if (pe->check_count % EEH_MAX_FAILS == 0) {
398 location = of_get_property(dn, "ibm,loc-code", NULL);
399 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
400 "location=%s driver=%s pci addr=%s\n",
401 pe->check_count, location,
402 eeh_driver_name(dev), eeh_pci_name(dev));
403 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
404 eeh_driver_name(dev));
411 * Now test for an EEH failure. This is VERY expensive.
412 * Note that the eeh_config_addr may be a parent device
413 * in the case of a device behind a bridge, or it may be
414 * function zero of a multi-function device.
415 * In any case they must share a common PHB.
417 ret = eeh_ops->get_state(pe, NULL);
419 /* Note that config-io to empty slots may fail;
420 * they are empty when they don't have children.
421 * We will punt with the following conditions: Failure to get
422 * PE's state, EEH not support and Permanently unavailable
423 * state, PE is in good state.
426 (ret == EEH_STATE_NOT_SUPPORT) ||
427 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
428 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
429 eeh_stats.false_positives++;
430 pe->false_positives++;
435 eeh_stats.slot_resets++;
437 /* Avoid repeated reports of this failure, including problems
438 * with other functions on this device, and functions under
441 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
442 eeh_serialize_unlock(flags);
444 eeh_send_failure_event(pe);
446 /* Most EEH events are due to device driver bugs. Having
447 * a stack trace will help the device-driver authors figure
448 * out what happened. So print that out.
450 WARN(1, "EEH: failure detected\n");
454 eeh_serialize_unlock(flags);
458 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
461 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
462 * @token: I/O token, should be address in the form 0xA....
463 * @val: value, should be all 1's (XXX why do we need this arg??)
465 * Check for an EEH failure at the given token address. Call this
466 * routine if the result of a read was all 0xff's and you want to
467 * find out if this is due to an EEH slot freeze event. This routine
468 * will query firmware for the EEH status.
470 * Note this routine is safe to call in an interrupt context.
472 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
475 struct eeh_dev *edev;
477 /* Finding the phys addr + pci device; this is pretty quick. */
478 addr = eeh_token_to_phys((unsigned long __force) token);
479 edev = eeh_addr_cache_get_dev(addr);
481 eeh_stats.no_device++;
485 eeh_dev_check_failure(edev);
487 pci_dev_put(eeh_dev_to_pci_dev(edev));
491 EXPORT_SYMBOL(eeh_check_failure);
495 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
498 * This routine should be called to reenable frozen MMIO or DMA
499 * so that it would work correctly again. It's useful while doing
500 * recovery or log collection on the indicated device.
502 int eeh_pci_enable(struct eeh_pe *pe, int function)
506 rc = eeh_ops->set_option(pe, function);
508 pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
509 __func__, function, pe->phb->global_number, pe->addr, rc);
511 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
512 if (rc > 0 && (rc & EEH_STATE_MMIO_ENABLED) &&
513 (function == EEH_OPT_THAW_MMIO))
520 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
521 * @dev: pci device struct
522 * @state: reset state to enter
527 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
529 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
530 struct eeh_pe *pe = edev->pe;
533 pr_err("%s: No PE found on PCI device %s\n",
534 __func__, pci_name(dev));
539 case pcie_deassert_reset:
540 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
543 eeh_ops->reset(pe, EEH_RESET_HOT);
545 case pcie_warm_reset:
546 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
556 * eeh_set_pe_freset - Check the required reset for the indicated device
558 * @flag: return value
560 * Each device might have its preferred reset type: fundamental or
561 * hot reset. The routine is used to collected the information for
562 * the indicated device and its children so that the bunch of the
563 * devices could be reset properly.
565 static void *eeh_set_dev_freset(void *data, void *flag)
568 unsigned int *freset = (unsigned int *)flag;
569 struct eeh_dev *edev = (struct eeh_dev *)data;
571 dev = eeh_dev_to_pci_dev(edev);
573 *freset |= dev->needs_freset;
579 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
582 * Assert the PCI #RST line for 1/4 second.
584 static void eeh_reset_pe_once(struct eeh_pe *pe)
586 unsigned int freset = 0;
588 /* Determine type of EEH reset required for
589 * Partitionable Endpoint, a hot-reset (1)
590 * or a fundamental reset (3).
591 * A fundamental reset required by any device under
592 * Partitionable Endpoint trumps hot-reset.
594 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
597 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
599 eeh_ops->reset(pe, EEH_RESET_HOT);
601 /* The PCI bus requires that the reset be held high for at least
602 * a 100 milliseconds. We wait a bit longer 'just in case'.
604 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
605 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
607 /* We might get hit with another EEH freeze as soon as the
608 * pci slot reset line is dropped. Make sure we don't miss
609 * these, and clear the flag now.
611 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
613 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
615 /* After a PCI slot has been reset, the PCI Express spec requires
616 * a 1.5 second idle time for the bus to stabilize, before starting
619 #define PCI_BUS_SETTLE_TIME_MSEC 1800
620 msleep(PCI_BUS_SETTLE_TIME_MSEC);
624 * eeh_reset_pe - Reset the indicated PE
627 * This routine should be called to reset indicated device, including
628 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
629 * might be involved as well.
631 int eeh_reset_pe(struct eeh_pe *pe)
633 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
636 /* Take three shots at resetting the bus */
637 for (i=0; i<3; i++) {
638 eeh_reset_pe_once(pe);
640 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
641 if ((rc & flags) == flags)
645 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
646 __func__, pe->phb->global_number, pe->addr);
649 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
650 i+1, pe->phb->global_number, pe->addr, rc);
657 * eeh_save_bars - Save device bars
658 * @edev: PCI device associated EEH device
660 * Save the values of the device bars. Unlike the restore
661 * routine, this routine is *not* recursive. This is because
662 * PCI devices are added individually; but, for the restore,
663 * an entire slot is reset at a time.
665 void eeh_save_bars(struct eeh_dev *edev)
668 struct device_node *dn;
672 dn = eeh_dev_to_of_node(edev);
674 for (i = 0; i < 16; i++)
675 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
679 * eeh_ops_register - Register platform dependent EEH operations
680 * @ops: platform dependent EEH operations
682 * Register the platform dependent EEH operation callback
683 * functions. The platform should call this function before
684 * any other EEH operations.
686 int __init eeh_ops_register(struct eeh_ops *ops)
689 pr_warning("%s: Invalid EEH ops name for %p\n",
694 if (eeh_ops && eeh_ops != ops) {
695 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
696 __func__, eeh_ops->name, ops->name);
706 * eeh_ops_unregister - Unreigster platform dependent EEH operations
707 * @name: name of EEH platform operations
709 * Unregister the platform dependent EEH operation callback
712 int __exit eeh_ops_unregister(const char *name)
714 if (!name || !strlen(name)) {
715 pr_warning("%s: Invalid EEH ops name\n",
720 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
729 * eeh_init - EEH initialization
731 * Initialize EEH by trying to enable it for all of the adapters in the system.
732 * As a side effect we can determine here if eeh is supported at all.
733 * Note that we leave EEH on so failed config cycles won't cause a machine
734 * check. If a user turns off EEH for a particular adapter they are really
735 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
736 * grant access to a slot if EEH isn't enabled, and so we always enable
737 * EEH for all slots/all devices.
739 * The eeh-force-off option disables EEH checking globally, for all slots.
740 * Even if force-off is set, the EEH hardware is still enabled, so that
741 * newer systems can boot.
743 int __init eeh_init(void)
745 struct pci_controller *hose, *tmp;
746 struct device_node *phb;
751 * We have to delay the initialization on PowerNV after
752 * the PCI hierarchy tree has been built because the PEs
753 * are figured out based on PCI devices instead of device
756 if (machine_is(powernv) && cnt++ <= 0)
759 /* call platform initialization function */
761 pr_warning("%s: Platform EEH operation not found\n",
764 } else if ((ret = eeh_ops->init())) {
765 pr_warning("%s: Failed to call platform init function (%d)\n",
770 /* Initialize EEH event */
771 ret = eeh_event_init();
775 /* Enable EEH for all adapters */
776 if (eeh_probe_mode_devtree()) {
777 list_for_each_entry_safe(hose, tmp,
778 &hose_list, list_node) {
780 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
782 } else if (eeh_probe_mode_dev()) {
783 list_for_each_entry_safe(hose, tmp,
784 &hose_list, list_node)
785 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
787 pr_warning("%s: Invalid probe mode %d\n",
788 __func__, eeh_probe_mode);
793 * Call platform post-initialization. Actually, It's good chance
794 * to inform platform that EEH is ready to supply service if the
795 * I/O cache stuff has been built up.
797 if (eeh_ops->post_init) {
798 ret = eeh_ops->post_init();
803 if (eeh_subsystem_enabled)
804 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
806 pr_warning("EEH: No capable adapters found\n");
811 core_initcall_sync(eeh_init);
814 * eeh_add_device_early - Enable EEH for the indicated device_node
815 * @dn: device node for which to set up EEH
817 * This routine must be used to perform EEH initialization for PCI
818 * devices that were added after system boot (e.g. hotplug, dlpar).
819 * This routine must be called before any i/o is performed to the
820 * adapter (inluding any config-space i/o).
821 * Whether this actually enables EEH or not for this device depends
822 * on the CEC architecture, type of the device, on earlier boot
823 * command-line arguments & etc.
825 static void eeh_add_device_early(struct device_node *dn)
827 struct pci_controller *phb;
830 * If we're doing EEH probe based on PCI device, we
831 * would delay the probe until late stage because
832 * the PCI device isn't available this moment.
834 if (!eeh_probe_mode_devtree())
837 if (!of_node_to_eeh_dev(dn))
839 phb = of_node_to_eeh_dev(dn)->phb;
841 /* USB Bus children of PCI devices will not have BUID's */
842 if (NULL == phb || 0 == phb->buid)
845 eeh_ops->of_probe(dn, NULL);
849 * eeh_add_device_tree_early - Enable EEH for the indicated device
852 * This routine must be used to perform EEH initialization for the
853 * indicated PCI device that was added after system boot (e.g.
856 void eeh_add_device_tree_early(struct device_node *dn)
858 struct device_node *sib;
860 for_each_child_of_node(dn, sib)
861 eeh_add_device_tree_early(sib);
862 eeh_add_device_early(dn);
864 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
867 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
868 * @dev: pci device for which to set up EEH
870 * This routine must be used to complete EEH initialization for PCI
871 * devices that were added after system boot (e.g. hotplug, dlpar).
873 static void eeh_add_device_late(struct pci_dev *dev)
875 struct device_node *dn;
876 struct eeh_dev *edev;
878 if (!dev || !eeh_subsystem_enabled)
881 pr_debug("EEH: Adding device %s\n", pci_name(dev));
883 dn = pci_device_to_OF_node(dev);
884 edev = of_node_to_eeh_dev(dn);
885 if (edev->pdev == dev) {
886 pr_debug("EEH: Already referenced !\n");
893 dev->dev.archdata.edev = edev;
896 * We have to do the EEH probe here because the PCI device
897 * hasn't been created yet in the early stage.
899 if (eeh_probe_mode_dev())
900 eeh_ops->dev_probe(dev, NULL);
902 eeh_addr_cache_insert_dev(dev);
906 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
909 * This routine must be used to perform EEH initialization for PCI
910 * devices which are attached to the indicated PCI bus. The PCI bus
911 * is added after system boot through hotplug or dlpar.
913 void eeh_add_device_tree_late(struct pci_bus *bus)
917 list_for_each_entry(dev, &bus->devices, bus_list) {
918 eeh_add_device_late(dev);
919 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
920 struct pci_bus *subbus = dev->subordinate;
922 eeh_add_device_tree_late(subbus);
926 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
929 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
932 * This routine must be used to add EEH sysfs files for PCI
933 * devices which are attached to the indicated PCI bus. The PCI bus
934 * is added after system boot through hotplug or dlpar.
936 void eeh_add_sysfs_files(struct pci_bus *bus)
940 list_for_each_entry(dev, &bus->devices, bus_list) {
941 eeh_sysfs_add_device(dev);
942 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
943 struct pci_bus *subbus = dev->subordinate;
945 eeh_add_sysfs_files(subbus);
949 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
952 * eeh_remove_device - Undo EEH setup for the indicated pci device
953 * @dev: pci device to be removed
954 * @purge_pe: remove the PE or not
956 * This routine should be called when a device is removed from
957 * a running system (e.g. by hotplug or dlpar). It unregisters
958 * the PCI device from the EEH subsystem. I/O errors affecting
959 * this device will no longer be detected after this call; thus,
960 * i/o errors affecting this slot may leave this device unusable.
962 static void eeh_remove_device(struct pci_dev *dev, int purge_pe)
964 struct eeh_dev *edev;
966 if (!dev || !eeh_subsystem_enabled)
968 edev = pci_dev_to_eeh_dev(dev);
970 /* Unregister the device with the EEH/PCI address search system */
971 pr_debug("EEH: Removing device %s\n", pci_name(dev));
973 if (!edev || !edev->pdev) {
974 pr_debug("EEH: Not referenced !\n");
978 dev->dev.archdata.edev = NULL;
981 eeh_rmv_from_parent_pe(edev, purge_pe);
982 eeh_addr_cache_rmv_dev(dev);
983 eeh_sysfs_remove_device(dev);
987 * eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
989 * @purge_pe: remove the corresponding PE or not
991 * This routine must be called when a device is removed from the
992 * running system through hotplug or dlpar. The corresponding
993 * PCI address cache will be removed.
995 void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe)
997 struct pci_bus *bus = dev->subordinate;
998 struct pci_dev *child, *tmp;
1000 eeh_remove_device(dev, purge_pe);
1002 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1003 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
1004 eeh_remove_bus_device(child, purge_pe);
1007 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
1009 static int proc_eeh_show(struct seq_file *m, void *v)
1011 if (0 == eeh_subsystem_enabled) {
1012 seq_printf(m, "EEH Subsystem is globally disabled\n");
1013 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1015 seq_printf(m, "EEH Subsystem is enabled\n");
1018 "no device node=%llu\n"
1019 "no config address=%llu\n"
1020 "check not wanted=%llu\n"
1021 "eeh_total_mmio_ffs=%llu\n"
1022 "eeh_false_positives=%llu\n"
1023 "eeh_slot_resets=%llu\n",
1024 eeh_stats.no_device,
1026 eeh_stats.no_cfg_addr,
1027 eeh_stats.ignored_check,
1028 eeh_stats.total_mmio_ffs,
1029 eeh_stats.false_positives,
1030 eeh_stats.slot_resets);
1036 static int proc_eeh_open(struct inode *inode, struct file *file)
1038 return single_open(file, proc_eeh_show, NULL);
1041 static const struct file_operations proc_eeh_operations = {
1042 .open = proc_eeh_open,
1044 .llseek = seq_lseek,
1045 .release = single_release,
1048 static int __init eeh_init_proc(void)
1050 if (machine_is(pseries))
1051 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1054 __initcall(eeh_init_proc);