1 /**************************************************************************/
2 /* File: main.h - the CAN driver basic data structures and functions */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
36 #include "./constants.h"
37 #include "./can_sysdep.h"
38 #include "./can_queue.h"
41 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,\
44 #define DEBUGMSG(fmt,args...)
47 #define CANMSG(fmt,args...) can_printk(KERN_ERR "lincan: " fmt,##args)
50 extern can_spinlock_t canuser_manipulation_lock;
53 * struct canhardware_t - structure representing pointers to all CAN boards
54 * @nr_boards: number of present boards
55 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
56 * @rtr_lock: locking for RTR queue
57 * @candevice: array of pointers to CAN devices/boards
59 struct canhardware_t {
61 struct rtr_id *rtr_queue;
62 can_spinlock_t rtr_lock;
63 struct candevice_t *candevice[MAX_HW_CARDS];
67 * struct candevice_t - CAN device/board structure
68 * @hwname: text string with board type
69 * @candev_idx: board index in canhardware_t.candevice[]
70 * @io_addr: IO/physical MEM address
71 * @res_addr: optional reset register port
72 * @dev_base_addr: CPU translated IO/virtual MEM address
73 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
74 * can be programmed into board
75 * @nr_all_chips: number of chips present on the board
76 * @nr_82527_chips: number of Intel 8257 chips
77 * @nr_sja1000_chips: number of Philips SJA100 chips
78 * @chip: array of pointers to the chip structures
79 * @hwspecops: pointer to board specific operations
80 * @hosthardware_p: pointer to the root hardware structure
81 * @sysdevptr: union reserved for pointer to bus specific
82 * device structure (case @pcidev is used for PCI devices)
84 * The structure represent configuration and state of associated board.
85 * The driver infrastructure prepares this structure and calls
86 * board type specific board_register() function. The board support provided
87 * register function fills right function pointers in @hwspecops structure.
88 * Then driver setup calls functions init_hw_data(), init_chip_data(),
89 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
90 * and init_chip_data() have to specify number and types of connected chips
91 * or objects respectively.
92 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
93 * and @nr_sja1000_chips in the board non-specific functions.
94 * The @io_addr and @dev_base_addr is filled from module parameters
95 * to the same value. The request_io function can fix-up @dev_base_addr
96 * field if virtual address is different than bus address.
99 char *hwname; /* text board type */
100 int candev_idx; /* board index in canhardware_t.candevice[] */
101 unsigned long io_addr; /* IO/physical MEM address */
102 unsigned long res_addr; /* optional reset register port */
103 can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
104 can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
108 int nr_sja1000_chips;
109 can_spinlock_t device_lock;
110 struct canchip_t *chip[MAX_HW_CHIPS];
112 struct hwspecops_t *hwspecops;
114 struct canhardware_t *hosthardware_p;
118 #ifdef CAN_ENABLE_PCI_SUPPORT
119 struct pci_dev *pcidev;
120 #endif /*CAN_ENABLE_PCI_SUPPORT*/
126 * struct canchip_t - CAN chip state and type information
127 * @chip_type: text string describing chip type
128 * @chip_idx: index of the chip in candevice_t.chip[] array
129 * @chip_irq: chip interrupt number if any
130 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
131 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
132 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
133 * @clock: chip base clock frequency in Hz
134 * @baudrate: selected chip baudrate in Hz
135 * @write_register: write chip register function copy
136 * @read_register: read chip register function copy
137 * @chip_data: pointer for optional chip specific data extension
138 * @sja_cdr_reg: SJA specific register -
139 * holds hardware specific options for the Clock Divider
140 * register. Options defined in the sja1000.h file:
141 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
142 * @sja_ocr_reg: SJA specific register -
143 * hold hardware specific options for the Output Control
144 * register. Options defined in the sja1000.h file:
145 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
146 * %OCR_TX0_LH, %OCR_TX1_ZZ.
147 * @int_cpu_reg: Intel specific register -
148 * holds hardware specific options for the CPU Interface
149 * register. Options defined in the i82527.h file:
150 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
151 * @int_clk_reg: Intel specific register -
152 * holds hardware specific options for the Clock Out
153 * register. Options defined in the i82527.h file:
154 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
155 * @int_bus_reg: Intel specific register -
156 * holds hardware specific options for the Bus Configuration
157 * register. Options defined in the i82527.h file:
158 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
159 * @msgobj: array of pointers to individual communication objects
160 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
161 * @hostdevice: pointer to chip hosting board
162 * @max_objects: maximal number of communication objects connected to this chip
163 * @chip_lock: reserved for synchronization of the chip supporting routines
164 * (not used in the current driver version)
165 * @worker_thread: chip worker thread ID (RT-Linux specific field)
166 * @pend_flags: holds information about pending interrupt and tx_wake() operations
167 * (RT-Linux specific field). Masks values:
168 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
169 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
170 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
171 * for some of above reasons
173 * The fields @write_register and @read_register are copied from
174 * corresponding fields from @hwspecops structure
175 * (chip->hostdevice->hwspecops->write_register and
176 * chip->hostdevice->hwspecops->read_register)
177 * to speedup can_write_reg() and can_read_reg() functions.
181 int chip_idx; /* chip index in candevice_t.chip[] */
183 can_ioptr_t chip_base_addr;
185 long clock; /* Chip clock in Hz */
188 void (*write_register)(unsigned data, can_ioptr_t address);
189 unsigned (*read_register)(can_ioptr_t address);
193 unsigned short sja_cdr_reg; /* sja1000 only! */
194 unsigned short sja_ocr_reg; /* sja1000 only! */
195 unsigned short int_cpu_reg; /* intel 82527 only! */
196 unsigned short int_clk_reg; /* intel 82527 only! */
197 unsigned short int_bus_reg; /* intel 82527 only! */
199 struct msgobj_t *msgobj[MAX_MSGOBJS];
201 struct chipspecops_t *chipspecops;
203 struct candevice_t *hostdevice;
205 int max_objects; /* 1 for sja1000, 15 for i82527 */
207 can_spinlock_t chip_lock;
210 pthread_t worker_thread;
211 unsigned long pend_flags;
212 #endif /*CAN_WITH_RTL*/
216 * struct msgobj_t - structure holding communication object state
218 * @minor: associated device minor number
219 * @object: object number in canchip_t structure +1
220 * @flags: message object flags
221 * @ret: field holding status of the last Tx operation
222 * @qends: pointer to message object corresponding ends structure
223 * @tx_qedge: edge corresponding to transmitted message
224 * @tx_slot: slot holding transmitted message, slot is taken from
225 * canque_test_outslot() call and is freed by canque_free_outslot()
226 * or rescheduled canque_again_outslot()
227 * @tx_retry_cnt: transmission attempt counter
228 * @tx_timeout: can be used by chip driver to check for the transmission timeout
229 * @rx_msg: temporary storage to hold received messages before
230 * calling to canque_filter_msg2edges()
231 * @hostchip: pointer to the &canchip_t structure this object belongs to
232 * @obj_used: counter of users (associated file structures for Linux
233 * userspace clients) of this object
234 * @obj_users: list of user structures of type &canuser_t.
235 * @obj_flags: message object specific flags. Masks values:
236 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
237 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
238 * is running inside TX activation processing code
239 * @rx_preconfig_id: place to store RX message identifier for some chip types
240 * that reuse same object for TX
243 can_ioptr_t obj_base_addr;
244 unsigned int minor; /* associated device minor number */
245 unsigned int object; /* object number in canchip_t +1 for debug printk */
246 unsigned long obj_flags;
249 struct canque_ends_t *qends;
251 struct canque_edge_t *tx_qedge;
252 struct canque_slot_t *tx_slot;
254 struct timer_list tx_timeout;
256 struct canmsg_t rx_msg;
258 struct canchip_t *hostchip;
260 unsigned long rx_preconfig_id;
263 struct list_head obj_users;
266 #define CAN_USER_MAGIC 0x05402033
269 * struct canuser_t - structure holding CAN user/client state
270 * @flags: used to distinguish Linux/RT-Linux type
271 * @peers: for connection into list of object users
272 * @qends: pointer to the ends structure corresponding for this user
273 * @msgobj: communication object the user is connected to
274 * @rx_edge0: default receive queue for filter IOCTL
275 * @userinfo: stores user context specific information.
276 * The field @fileinfo.file holds pointer to open device file state structure
277 * for the Linux user-space client applications
278 * @magic: magic number to check consistency when pointer is retrieved
279 * from file private field
283 struct list_head peers;
284 struct canque_ends_t *qends;
285 struct msgobj_t *msgobj;
286 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
289 struct file *file; /* back ptr to file */
293 struct rtl_file *file;
295 #endif /*CAN_WITH_RTL*/
301 * struct hwspecops_t - hardware/board specific operations
302 * @request_io: reserve io or memory range for can board
303 * @release_io: free reserved io memory range
304 * @reset: hardware reset routine
305 * @init_hw_data: called to initialize &candevice_t structure, mainly
306 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
308 * @init_chip_data: called initialize each &canchip_t structure, mainly
309 * @chip_type, @chip_base_addr, @clock and chip specific registers.
310 * It is responsible to setup &canchip_t->@chipspecops functions
311 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
312 * @init_obj_data: called initialize each &msgobj_t structure,
313 * mainly @obj_base_addr field.
314 * @program_irq: program interrupt generation hardware of the board
315 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
316 * @write_register: low level write register routine
317 * @read_register: low level read register routine
320 int (*request_io)(struct candevice_t *candev);
321 int (*release_io)(struct candevice_t *candev);
322 int (*reset)(struct candevice_t *candev);
323 int (*init_hw_data)(struct candevice_t *candev);
324 void (*done_hw_data)(struct candevice_t *candev);
325 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
326 int (*init_obj_data)(struct canchip_t *chip, int objnr);
327 int (*program_irq)(struct candevice_t *candev);
328 void (*write_register)(unsigned data, can_ioptr_t address);
329 unsigned (*read_register)(can_ioptr_t address);
333 * struct chipspecops_t - can controller chip specific operations
334 * @chip_config: CAN chip configuration
335 * @baud_rate: set communication parameters
336 * @standard_mask: setup of mask for message filtering
337 * @extended_mask: setup of extended mask for message filtering
338 * @message15_mask: set mask of i82527 message object 15
339 * @clear_objects: clears state of all message object residing in chip
340 * @config_irqs: tunes chip hardware interrupt delivery
341 * @pre_read_config: prepares message object for message reception
342 * @pre_write_config: prepares message object for message transmission
343 * @send_msg: initiate message transmission
344 * @remote_request: configures message object and asks for RTR message
345 * @check_tx_stat: checks state of transmission engine
346 * @wakeup_tx: wakeup TX processing
347 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
348 * @enable_configuration: enable chip configuration mode
349 * @disable_configuration: disable chip configuration mode
350 * @set_btregs: configures bitrate registers
351 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
352 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
353 * @start_chip: starts chip message processing
354 * @stop_chip: stops chip message processing
355 * @irq_handler: interrupt service routine
356 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
358 struct chipspecops_t {
359 int (*chip_config)(struct canchip_t *chip);
360 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
361 int sampl_pt, int flags);
362 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
363 unsigned short mask);
364 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
366 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
368 int (*clear_objects)(struct canchip_t *chip);
369 int (*config_irqs)(struct canchip_t *chip, short irqs);
370 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
371 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
372 struct canmsg_t *msg);
373 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
374 struct canmsg_t *msg);
375 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
376 int (*check_tx_stat)(struct canchip_t *chip);
377 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
378 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
379 int (*enable_configuration)(struct canchip_t *chip);
380 int (*disable_configuration)(struct canchip_t *chip);
381 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
382 unsigned short btr1);
383 int (*attach_to_chip)(struct canchip_t *chip);
384 int (*release_chip)(struct canchip_t *chip);
385 int (*start_chip)(struct canchip_t *chip);
386 int (*stop_chip)(struct canchip_t *chip);
387 int (*irq_handler)(int irq, struct canchip_t *chip);
388 int (*irq_accept)(int irq, struct canchip_t *chip);
393 struct mem_addr *next;
397 /* Structure for the RTR queue */
400 struct canmsg_t *rtr_message;
401 wait_queue_head_t rtr_wq;
406 extern int minor[MAX_TOT_CHIPS];
408 extern int baudrate[MAX_TOT_CHIPS];
409 extern int irq[MAX_IRQ];
410 extern char *hw[MAX_HW_CARDS];
411 extern unsigned long io[MAX_HW_CARDS];
412 extern long clockfreq[MAX_HW_CARDS];
413 extern int processlocal;
415 extern struct canhardware_t *hardware_p;
416 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
417 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
419 extern struct mem_addr *mem_head;
422 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
423 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
425 can_outb(data, chip->chip_base_addr+reg_offs);
427 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
429 return can_inb(chip->chip_base_addr+reg_offs);
431 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
432 unsigned char data, unsigned reg_offs)
434 can_outb(data, obj->obj_base_addr+reg_offs);
436 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
439 return can_inb(obj->obj_base_addr+reg_offs);
442 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
443 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
445 can_writeb(data, chip->chip_base_addr+reg_offs);
447 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
449 return can_readb(chip->chip_base_addr+reg_offs);
451 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
452 unsigned char data, unsigned reg_offs)
454 can_writeb(data, obj->obj_base_addr+reg_offs);
456 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
459 return can_readb(obj->obj_base_addr+reg_offs);
462 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
463 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
464 #define CONFIG_OC_LINCAN_DYNAMICIO
467 /* Inline function to write to the hardware registers. The argument reg_offs is
468 * relative to the memory map of the chip and not the absolute memory reg_offs.
470 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
472 can_ioptr_t address_to_write;
473 address_to_write = chip->chip_base_addr+reg_offs;
474 chip->write_register(data, address_to_write);
477 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
479 can_ioptr_t address_to_read;
480 address_to_read = chip->chip_base_addr+reg_offs;
481 return chip->read_register(address_to_read);
484 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
485 unsigned char data, unsigned reg_offs)
487 can_ioptr_t address_to_write;
488 address_to_write = obj->obj_base_addr+reg_offs;
489 chip->write_register(data, address_to_write);
492 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
495 can_ioptr_t address_to_read;
496 address_to_read = obj->obj_base_addr+reg_offs;
497 return chip->read_register(address_to_read);
500 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
502 int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
503 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
504 void can_release_io_region(unsigned long start, unsigned long n);
505 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
506 void can_release_mem_region(unsigned long start, unsigned long n);
508 #ifdef CAN_ENABLE_PCI_SUPPORT
509 struct pci_dev *can_pci_get_next_untaken_device(unsigned int vendor, unsigned int device);
510 struct pci_dev *can_pci_get_next_untaken_subsyst(unsigned int vendor, unsigned int device,
511 unsigned int ss_vendor, unsigned int ss_device);
512 #endif /*CAN_ENABLE_PCI_SUPPORT*/
515 const char *boardtype;
516 int (*board_register)(struct hwspecops_t *hwspecops);
520 const struct boardtype_t* boardtype_find(const char *str);
522 int can_check_dev_taken(void *anydev);
524 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
526 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
528 can_gettimeofday(ptimestamp);
530 #else /* No timestamp support, set field to zero */
532 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
534 #ifdef CAN_MSG_VERSION_2
535 ptimestamp->tv_sec = 0;
536 ptimestamp->tv_usec = 0;
537 #else /* CAN_MSG_VERSION_2 */
539 #endif /* CAN_MSG_VERSION_2 */
542 #endif /* End of timestamp source selection */
545 extern int can_rtl_priority;
546 #endif /*CAN_WITH_RTL*/