lincan/src/sja1000p.c

   1 /* sja1000.c
   2  * Linux CAN-bus device driver.
   3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
   4  * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
   5  * T.Motylewski@bfad.de
   6  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
   7  * email:pisa@cmp.felk.cvut.cz
   8  * This software is released under the GPL-License.
   9  * Version lincan-0.2  9 Jul 2003
  10  */
  11
  12 #include <linux/autoconf.h>
  13
  14 #include <linux/sched.h>
  15 #include <linux/delay.h>
  16 #include <asm/irq.h>
  17
  18 #include "../include/main.h"
  19 #include "../include/sja1000p.h"
  20
  21 /**
  22  * sja1000p_enable_configuration - enable chip configuration mode
  23  * @chip: pointer to chip state structure
  24  */
  25 int sja1000p_enable_configuration(struct chip_t *chip)
  26 {
  27         int i=0;
  28         enum sja1000_PeliCAN_MOD flags;
  29
  30         disable_irq(chip->chip_irq);
  31
  32         flags=can_read_reg(chip,SJAMOD);
  33
  34         while ((!(flags & MOD_RM)) && (i<=10)) {
  35                 can_write_reg(chip, MOD_RM, SJAMOD);
  36 // TODO: configurable MOD_AFM (32/16 bit acceptance filter)
  37 // config MOD_LOM (listen only)
  38                 udelay(100);
  39                 i++;
  40                 flags=can_read_reg(chip, SJAMOD);
  41         }
  42         if (i>=10) {
  43                 CANMSG("Reset error\n");
  44                 enable_irq(chip->chip_irq);
  45                 return -ENODEV;
  46         }
  47
  48         return 0;
  49 }
  50
  51 /**
  52  * sja1000p_disable_configuration - disable chip configuration mode
  53  * @chip: pointer to chip state structure
  54  */
  55 int sja1000p_disable_configuration(struct chip_t *chip)
  56 {
  57         int i=0;
  58         enum sja1000_PeliCAN_MOD flags;
  59
  60         flags=can_read_reg(chip,SJAMOD);
  61
  62         while ( (flags & MOD_RM) && (i<=50) ) {
  63 // could be as long as 11*128 bit times after buss-off
  64                 can_write_reg(chip, 0, SJAMOD);
  65 // TODO: configurable MOD_AFM (32/16 bit acceptance filter)
  66 // config MOD_LOM (listen only)
  67                 udelay(100);
  68                 i++;
  69                 flags=can_read_reg(chip, SJAMOD);
  70         }
  71         if (i>=10) {
  72                 CANMSG("Error leaving reset status\n");
  73                 return -ENODEV;
  74         }
  75
  76         enable_irq(chip->chip_irq);
  77
  78         return 0;
  79 }
  80
  81 /**
  82  * sja1000p_chip_config: - can chip configuration
  83  * @chip: pointer to chip state structure
  84  *
  85  * This function configures chip and prepares it for message
  86  * transmission and reception. The function resets chip,
  87  * resets mask for acceptance of all messages by call to
  88  * sja1000p_extended_mask() function and then
  89  * computes and sets baudrate with use of function sja1000p_baud_rate().
  90  * Return Value: negative value reports error.
  91  * File: src/sja1000p.c
  92  */
  93 int sja1000p_chip_config(struct chip_t *chip)
  94 {
  95         int i;
  96         unsigned char n, r;
  97
  98         if (sja1000p_enable_configuration(chip))
  99                 return -ENODEV;
 100
 101         /* Set mode, clock out, comparator */
 102         can_write_reg(chip,CDR_PELICAN|chip->sja_cdr_reg,SJACDR);
 103         /* Set driver output configuration */
 104         can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
 105
 106         /* Simple check for chip presence */
 107         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 108                 can_write_reg(chip,n,SJAACR0+i);
 109         }
 110         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 111                 r = n^can_read_reg(chip,SJAACR0+i);
 112                 if (r) {
 113                         CANMSG("sja1000p_chip_config: chip connection broken,"
 114                                 " readback differ 0x%02x\n", r);
 115                         return -ENODEV;
 116                 }
 117         }
 118
 119
 120         if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
 121                 return -ENODEV;
 122
 123         if (!baudrate)
 124                 baudrate=1000;
 125         if (sja1000p_baud_rate(chip,1000*baudrate,chip->clock,0,75,0))
 126                 return -ENODEV;
 127
 128         /* Enable hardware interrupts */
 129         can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER);
 130
 131         sja1000p_disable_configuration(chip);
 132
 133         return 0;
 134 }
 135
 136 /**
 137  * sja1000p_extended_mask: - setup of extended mask for message filtering
 138  * @chip: pointer to chip state structure
 139  * @code: can message acceptance code
 140  * @mask: can message acceptance mask
 141  *
 142  * Return Value: negative value reports error.
 143  * File: src/sja1000p.c
 144  */
 145 int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned  long mask)
 146 {
 147         int i;
 148
 149         if (sja1000p_enable_configuration(chip))
 150                 return -ENODEV;
 151
 152 // LSB to +3, MSB to +0
 153         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
 154                 can_write_reg(chip,code&0xff,SJAACR0+i);
 155                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
 156                 code >>= 8;
 157                 mask >>= 8;
 158         }
 159
 160         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
 161         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
 162
 163         sja1000p_disable_configuration(chip);
 164
 165         return 0;
 166 }
 167
 168 /**
 169  * sja1000p_baud_rate: - set communication parameters.
 170  * @chip: pointer to chip state structure
 171  * @rate: baud rate in Hz
 172  * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
 173  * @sjw: synchronization jump width (0-3) prescaled clock cycles
 174  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
 175  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
 176  *
 177  * Return Value: negative value reports error.
 178  * File: src/sja1000p.c
 179  */
 180 int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
 181                                                         int sampl_pt, int flags)
 182 {
 183         int best_error = 1000000000, error;
 184         int best_tseg=0, best_brp=0, best_rate=0, brp=0;
 185         int tseg=0, tseg1=0, tseg2=0;
 186
 187         if (sja1000p_enable_configuration(chip))
 188                 return -ENODEV;
 189
 190         clock /=2;
 191
 192         /* tseg even = round down, odd = round up */
 193         for (tseg=(0+0+2)*2; tseg<=(MAX_TSEG2+MAX_TSEG1+2)*2+1; tseg++) {
 194                 brp = clock/((1+tseg/2)*rate)+tseg%2;
 195                 if (brp == 0 || brp > 64)
 196                         continue;
 197                 error = rate - clock/(brp*(1+tseg/2));
 198                 if (error < 0)
 199                         error = -error;
 200                 if (error <= best_error) {
 201                         best_error = error;
 202                         best_tseg = tseg/2;
 203                         best_brp = brp-1;
 204                         best_rate = clock/(brp*(1+tseg/2));
 205                 }
 206         }
 207         if (best_error && (rate/best_error < 10)) {
 208                 CANMSG("baud rate %d is not possible with %d Hz clock\n",
 209                                                                 rate, 2*clock);
 210                 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
 211                                 best_rate, best_brp, best_tseg, tseg1, tseg2);
 212                 return -EINVAL;
 213         }
 214         tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
 215         if (tseg2 < 0)
 216                 tseg2 = 0;
 217         if (tseg2 > MAX_TSEG2)
 218                 tseg2 = MAX_TSEG2;
 219         tseg1 = best_tseg-tseg2-2;
 220         if (tseg1>MAX_TSEG1) {
 221                 tseg1 = MAX_TSEG1;
 222                 tseg2 = best_tseg-tseg1-2;
 223         }
 224
 225         DEBUGMSG("Setting %d bps.\n", best_rate);
 226         DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
 227                                         best_brp, best_tseg, tseg1, tseg2,
 228                                         (100*(best_tseg-tseg2)/(best_tseg+1)));
 229
 230
 231         can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
 232         can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
 233                                         | tseg1, SJABTR1);
 234
 235         sja1000p_disable_configuration(chip);
 236
 237         return 0;
 238 }
 239
 240 /**
 241  * sja1000p_read: - reads and distributes one or more received messages
 242  * @chip: pointer to chip state structure
 243  * @obj: pinter to CAN message queue information
 244  *
 245  * File: src/sja1000p.c
 246  */
 247 void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) {
 248         int i, flags, len, datastart;
 249         do {
 250                 flags = can_read_reg(chip,SJAFRM);
 251                 if(flags&FRM_FF) {
 252                         obj->rx_msg.id =
 253                                 (can_read_reg(chip,SJAID0)<<21) +
 254                                 (can_read_reg(chip,SJAID1)<<13) +
 255                                 (can_read_reg(chip,SJAID2)<<5) +
 256                                 (can_read_reg(chip,SJAID3)>>3);
 257                         datastart = SJADATE;
 258                 } else {
 259                         obj->rx_msg.id =
 260                                 (can_read_reg(chip,SJAID0)<<3) +
 261                                 (can_read_reg(chip,SJAID1)>>5);
 262                         datastart = SJADATS;
 263                 }
 264                 obj->rx_msg.flags =
 265                         ((flags & FRM_RTR) ? MSG_RTR : 0) |
 266                         ((flags & FRM_FF) ? MSG_EXT : 0);
 267                 len = flags & FRM_DLC_M;
 268                 obj->rx_msg.length = len;
 269                 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 270                 for(i=0; i< len; i++) {
 271                         obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
 272                 }
 273
 274                 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
 275
 276                 can_write_reg(chip, CMR_RRB, SJACMR);
 277
 278         } while (can_read_reg(chip, SJASR) & SR_RBS);
 279 }
 280
 281 /**
 282  * sja1000p_pre_read_config: - prepares message object for message reception
 283  * @chip: pointer to chip state structure
 284  * @obj: pointer to message object state structure
 285  *
 286  * Return Value: negative value reports error.
 287  *      Positive value indicates immediate reception of message.
 288  * File: src/sja1000p.c
 289  */
 290 int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
 291 {
 292         int status;
 293         status=can_read_reg(chip,SJASR);
 294
 295         if(status  & SR_BS) {
 296                 /* Try to recover from error condition */
 297                 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
 298                 sja1000p_enable_configuration(chip);
 299                 can_write_reg(chip, 0, SJARXERR);
 300                 can_write_reg(chip, 0, SJATXERR1);
 301                 can_read_reg(chip, SJAECC);
 302                 sja1000p_disable_configuration(chip);
 303         }
 304
 305         if (!(status&SR_RBS)) {
 306                 return 0;
 307         }
 308
 309         can_write_reg(chip, DISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
 310         sja1000p_read(chip, obj);
 311         can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); //enable interrupts
 312         return 1;
 313 }
 314
 315 #define MAX_TRANSMIT_WAIT_LOOPS 10
 316 /**
 317  * sja1000p_pre_write_config: - prepares message object for message transmission
 318  * @chip: pointer to chip state structure
 319  * @obj: pointer to message object state structure
 320  * @msg: pointer to CAN message
 321  *
 322  * This function prepares selected message object for future initiation
 323  * of message transmission by sja1000p_send_msg() function.
 324  * The CAN message data and message ID are transfered from @msg slot
 325  * into chip buffer in this function.
 326  * Return Value: negative value reports error.
 327  * File: src/sja1000p.c
 328  */
 329 int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
 330                                                         struct canmsg_t *msg)
 331 {
 332         int i=0;
 333         unsigned int id;
 334         int status;
 335         int len;
 336
 337         /* Wait until Transmit Buffer Status is released */
 338         while ( !((status=can_read_reg(chip, SJASR)) & SR_TBS) &&
 339                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 340                 udelay(i);
 341         }
 342
 343         if(status & SR_BS) {
 344                 /* Try to recover from error condition */
 345                 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
 346                 sja1000p_enable_configuration(chip);
 347                 can_write_reg(chip, 0, SJARXERR);
 348                 can_write_reg(chip, 0, SJATXERR1);
 349                 can_read_reg(chip, SJAECC);
 350                 sja1000p_disable_configuration(chip);
 351         }
 352         if (!(can_read_reg(chip, SJASR) & SR_TBS)) {
 353                 CANMSG("Transmit timed out, cancelling\n");
 354 // here we should check if there is no write/select waiting for this
 355 // transmit. If so, set error ret and wake up.
 356 // CHECKME: if we do not disable IER_TIE (TX IRQ) here we get interrupt
 357 // immediately
 358                 can_write_reg(chip, CMR_AT, SJACMR);
 359                 i=0;
 360                 while ( !(can_read_reg(chip, SJASR) & SR_TBS) &&
 361                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 362                         udelay(i);
 363                 }
 364                 if (!(can_read_reg(chip, SJASR) & SR_TBS)) {
 365                         CANMSG("Could not cancel, please reset\n");
 366                         return -EIO;
 367                 }
 368         }
 369         len = msg->length;
 370         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 371         /* len &= FRM_DLC_M; ensured by above condition already */
 372         can_write_reg(chip, ((msg->flags&MSG_EXT)?FRM_FF:0) |
 373                 ((msg->flags & MSG_RTR) ? FRM_RTR : 0) | len, SJAFRM);
 374         if(msg->flags&MSG_EXT) {
 375                 id=msg->id<<3;
 376                 can_write_reg(chip, id & 0xff, SJAID3);
 377                 id >>= 8;
 378                 can_write_reg(chip, id & 0xff, SJAID2);
 379                 id >>= 8;
 380                 can_write_reg(chip, id & 0xff, SJAID1);
 381                 id >>= 8;
 382                 can_write_reg(chip, id, SJAID0);
 383                 for(i=0; i < len; i++) {
 384                         can_write_reg(chip, msg->data[i], SJADATE+i);
 385                 }
 386         } else {
 387                 id=msg->id<<5;
 388                 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
 389                 can_write_reg(chip, id & 0xff, SJAID1);
 390                 for(i=0; i < len; i++) {
 391                         can_write_reg(chip, msg->data[i], SJADATS+i);
 392                 }
 393         }
 394         return 0;
 395 }
 396
 397 /**
 398  * sja1000p_send_msg: - initiate message transmission
 399  * @chip: pointer to chip state structure
 400  * @obj: pointer to message object state structure
 401  * @msg: pointer to CAN message
 402  *
 403  * This function is called after sja1000p_pre_write_config() function,
 404  * which prepares data in chip buffer.
 405  * Return Value: negative value reports error.
 406  * File: src/sja1000p.c
 407  */
 408 int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj,
 409                                                         struct canmsg_t *msg)
 410 {
 411         can_write_reg(chip, CMR_TR, SJACMR);
 412
 413         return 0;
 414 }
 415
 416 /**
 417  * sja1000p_check_tx_stat: - checks state of transmission engine
 418  * @chip: pointer to chip state structure
 419  *
 420  * Return Value: negative value reports error.
 421  *      Positive return value indicates transmission under way status.
 422  *      Zero value indicates finishing of all issued transmission requests.
 423  * File: src/sja1000p.c
 424  */
 425 int sja1000p_check_tx_stat(struct chip_t *chip)
 426 {
 427         if (can_read_reg(chip,SJASR) & SR_TCS)
 428                 return 0;
 429         else
 430                 return 1;
 431 }
 432
 433 /**
 434  * sja1000p_set_btregs: -  configures bitrate registers
 435  * @chip: pointer to chip state structure
 436  * @btr0: bitrate register 0
 437  * @btr1: bitrate register 1
 438  *
 439  * Return Value: negative value reports error.
 440  * File: src/sja1000p.c
 441  */
 442 int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0,
 443                                                         unsigned short btr1)
 444 {
 445         if (sja1000p_enable_configuration(chip))
 446                 return -ENODEV;
 447
 448         can_write_reg(chip, btr0, SJABTR0);
 449         can_write_reg(chip, btr1, SJABTR1);
 450
 451         sja1000p_disable_configuration(chip);
 452
 453         return 0;
 454 }
 455
 456 /**
 457  * sja1000p_start_chip: -  starts chip message processing
 458  * @chip: pointer to chip state structure
 459  *
 460  * Return Value: negative value reports error.
 461  * File: src/sja1000p.c
 462  */
 463 int sja1000p_start_chip(struct chip_t *chip)
 464 {
 465         enum sja1000_PeliCAN_MOD flags;
 466
 467         flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM);
 468         can_write_reg(chip, flags, SJAMOD);
 469
 470         return 0;
 471 }
 472
 473 /**
 474  * sja1000p_stop_chip: -  stops chip message processing
 475  * @chip: pointer to chip state structure
 476  *
 477  * Return Value: negative value reports error.
 478  * File: src/sja1000p.c
 479  */
 480 int sja1000p_stop_chip(struct chip_t *chip)
 481 {
 482         enum sja1000_PeliCAN_MOD flags;
 483
 484         flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM);
 485         can_write_reg(chip, flags|MOD_RM, SJAMOD);
 486
 487         return 0;
 488 }
 489
 490
 491 /**
 492  * sja1000p_remote_request: - configures message object and asks for RTR message
 493  * @chip: pointer to chip state structure
 494  * @obj: pointer to message object structure
 495  *
 496  * Return Value: negative value reports error.
 497  * File: src/sja1000p.c
 498  */
 499 int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj)
 500 {
 501         CANMSG("sja1000p_remote_request not implemented\n");
 502         return -ENOSYS;
 503 }
 504
 505 /**
 506  * sja1000p_standard_mask: - setup of mask for message filtering
 507  * @chip: pointer to chip state structure
 508  * @code: can message acceptance code
 509  * @mask: can message acceptance mask
 510  *
 511  * Return Value: negative value reports error.
 512  * File: src/sja1000p.c
 513  */
 514 int sja1000p_standard_mask(struct chip_t *chip, unsigned short code,
 515                 unsigned short mask)
 516 {
 517         CANMSG("sja1000p_standard_mask not implemented\n");
 518         return -ENOSYS;
 519 }
 520
 521 /**
 522  * sja1000p_clear_objects: - clears state of all message object residing in chip
 523  * @chip: pointer to chip state structure
 524  *
 525  * Return Value: negative value reports error.
 526  * File: src/sja1000p.c
 527  */
 528 int sja1000p_clear_objects(struct chip_t *chip)
 529 {
 530         CANMSG("sja1000p_clear_objects not implemented\n");
 531         return -ENOSYS;
 532 }
 533
 534 /**
 535  * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
 536  * @chip: pointer to chip state structure
 537  * @irqs: requested chip IRQ configuration
 538  *
 539  * Return Value: negative value reports error.
 540  * File: src/sja1000p.c
 541  */
 542 int sja1000p_config_irqs(struct chip_t *chip, short irqs)
 543 {
 544         CANMSG("sja1000p_config_irqs not implemented\n");
 545         return -ENOSYS;
 546 }
 547
 548 /**
 549  * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
 550  * @chip: pointer to chip state structure
 551  * @obj: pointer to attached queue description
 552  *
 553  * The main purpose of this function is to read message from attached queues
 554  * and transfer message contents into CAN controller chip.
 555  * This subroutine is called by
 556  * sja1000p_irq_write_handler() for transmit events.
 557  * File: src/sja1000p.c
 558  */
 559 void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
 560 {
 561         int cmd;
 562
 563         if(obj->tx_slot){
 564                 /* Do local transmitted message distribution if enabled */
 565                 if (processlocal){
 566                         obj->tx_slot->msg.flags |= MSG_LOCAL;
 567                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
 568                 }
 569                 /* Free transmitted slot */
 570                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 571                 obj->tx_slot=NULL;
 572         }
 573
 574         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
 575         if(cmd<0)
 576                 return;
 577
 578         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
 579                 obj->ret = -1;
 580                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
 581                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 582                 obj->tx_slot=NULL;
 583                 return;
 584         }
 585         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
 586                 obj->ret = -1;
 587                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
 588                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 589                 obj->tx_slot=NULL;
 590                 return;
 591         }
 592
 593 }
 594
 595 #define MAX_RETR 10
 596
 597 /**
 598  * sja1000p_irq_handler: - interrupt service routine
 599  * @irq: interrupt vector number, this value is system specific
 600  * @dev_id: driver private pointer registered at time of request_irq() call.
 601  *      The CAN driver uses this pointer to store relationship of interrupt
 602  *      to chip state structure - @struct chip_t
 603  * @regs: system dependent value pointing to registers stored in exception frame
 604  *
 605  * Interrupt handler is activated when state of CAN controller chip changes,
 606  * there is message to be read or there is more space for new messages or
 607  * error occurs. The receive events results in reading of the message from
 608  * CAN controller chip and distribution of message through attached
 609  * message queues.
 610  * File: src/sja1000p.c
 611  */
 612 irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 613 {
 614         int irq_register, status, error_code;
 615         struct chip_t *chip=(struct chip_t *)dev_id;
 616         struct msgobj_t *obj=chip->msgobj[0];
 617
 618         irq_register=can_read_reg(chip,SJAIR);
 619 //      DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
 620 //      DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
 621 //                                      can_read_reg(chip,SJASR));
 622
 623         if ((irq_register & (IR_BEI|IR_EPI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
 624                 return IRQ_NONE;
 625
 626         if(!obj->flags & OBJ_BUFFERS_ALLOCATED) {
 627                 CANMSG("sja1000p_irq_handler: called with device closed, irq_register 0x%02x\n", irq_register);
 628                 return IRQ_NONE;
 629         }
 630
 631         if ((irq_register & IR_RI) != 0) {
 632                 DEBUGMSG("sja1000_irq_handler: RI\n");
 633                 sja1000p_read(chip,obj);
 634                 obj->ret = 0;
 635         }
 636         if ((irq_register & IR_TI) != 0) {
 637                 DEBUGMSG("sja1000_irq_handler: TI\n");
 638                 obj->ret = 0;
 639                 set_bit(OBJ_TX_REQUEST,&obj->flags);
 640                 while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
 641                         clear_bit(OBJ_TX_REQUEST,&obj->flags);
 642
 643                         if (can_read_reg(chip, SJASR) & SR_TBS)
 644                                 sja1000p_irq_write_handler(chip, obj);
 645
 646                         clear_bit(OBJ_TX_LOCK,&obj->flags);
 647                         if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
 648                         DEBUGMSG("TX looping in sja1000_irq_handler\n");
 649                 }
 650         }
 651         if ((irq_register & (IR_EI|IR_BEI|IR_EPI|IR_DOI)) != 0) {
 652                 // Some error happened
 653                 status=can_read_reg(chip,SJASR);
 654                 error_code=can_read_reg(chip,SJAECC);
 655                 CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
 656                         status, irq_register, error_code);
 657 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
 658 // Reset flag set to 0 if chip is already off the bus. Full state report
 659                 obj->ret=-1;
 660
 661                 if(error_code == 0xd9) {
 662                         obj->ret= -ENXIO;
 663                         /* no such device or address - no ACK received */
 664                 }
 665                 if(obj->tx_retry_cnt++>MAX_RETR) {
 666                         can_write_reg(chip, CMR_AT, SJACMR); // cancel any transmition
 667                         obj->tx_retry_cnt = 0;
 668                 }
 669                 if(status&SR_BS) {
 670                         CANMSG("bus-off, resetting sja1000p\n");
 671                         can_write_reg(chip, 0, SJAMOD);
 672                 }
 673
 674                 if(obj->tx_slot){
 675                         canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
 676                         /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 677                         obj->tx_slot=NULL;*/
 678                 }
 679
 680         } else {
 681                 obj->tx_retry_cnt=0;
 682         }
 683
 684         return IRQ_HANDLED;
 685 }
 686
 687 /**
 688  * sja1000p_wakeup_tx: - wakeups TX processing
 689  * @chip: pointer to chip state structure
 690  * @obj: pointer to message object structure
 691  *
 692  * Return Value: negative value reports error.
 693  * File: src/sja1000p.c
 694  */
 695 int sja1000p_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
 696 {
 697          /* dummy lock to prevent preemption fully portable way */
 698         spinlock_t dummy_lock;
 699
 700         /*  preempt_disable() */
 701         spin_lock_init(&dummy_lock);
 702         spin_lock(&dummy_lock);
 703
 704         set_bit(OBJ_TX_REQUEST,&obj->flags);
 705         while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
 706                 clear_bit(OBJ_TX_REQUEST,&obj->flags);
 707
 708                 if (can_read_reg(chip, SJASR) & SR_TBS){
 709                         obj->tx_retry_cnt=0;
 710                         sja1000p_irq_write_handler(chip, obj);
 711                 }
 712
 713                 clear_bit(OBJ_TX_LOCK,&obj->flags);
 714                 if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
 715                 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
 716         }
 717
 718         /* preempt_enable(); */
 719         spin_unlock(&dummy_lock);
 720         return 0;
 721 }
 722
 723 int sja1000p_register(struct chipspecops_t *chipspecops)
 724 {
 725         CANMSG("initializing sja1000p chip operations\n");
 726         chipspecops->chip_config=sja1000p_chip_config;
 727         chipspecops->baud_rate=sja1000p_baud_rate;
 728         chipspecops->standard_mask=sja1000p_standard_mask;
 729         chipspecops->extended_mask=sja1000p_extended_mask;
 730         chipspecops->message15_mask=sja1000p_extended_mask;
 731         chipspecops->clear_objects=sja1000p_clear_objects;
 732         chipspecops->config_irqs=sja1000p_config_irqs;
 733         chipspecops->pre_read_config=sja1000p_pre_read_config;
 734         chipspecops->pre_write_config=sja1000p_pre_write_config;
 735         chipspecops->send_msg=sja1000p_send_msg;
 736         chipspecops->check_tx_stat=sja1000p_check_tx_stat;
 737         chipspecops->wakeup_tx=sja1000p_wakeup_tx;
 738         chipspecops->remote_request=sja1000p_remote_request;
 739         chipspecops->enable_configuration=sja1000p_enable_configuration;
 740         chipspecops->disable_configuration=sja1000p_disable_configuration;
 741         chipspecops->set_btregs=sja1000p_set_btregs;
 742         chipspecops->start_chip=sja1000p_start_chip;
 743         chipspecops->stop_chip=sja1000p_stop_chip;
 744         chipspecops->irq_handler=sja1000p_irq_handler;
 745         return 0;
 746 }