update: sync

git-svn-id: http://svn.tudos.org/repos/oc/tudos/trunk@6 d050ee49-bd90-4346-b210-929a50b99cfc

diff --git a/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp b/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp
deleted file mode 100644 (file)
index a0d044b..0000000
--- a/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp
+++ /dev/null
@@ -1,193 +0,0 @@
-// ---------------------------------------------------------------------
-INTERFACE [arm && imx]:
-
-#include "kmem.h"
-
-class Irq_base;
-
-EXTENSION class Pic
-{
-public:
-  enum
-  {
-    Multi_irq_pending = 0,
-    No_irq_pending = 0,
-  };
-
-  enum
-  {
-    INTCTL      = Kmem::Pic_map_base + 0x00,
-    NIMASK      = Kmem::Pic_map_base + 0x04,
-    INTENNUM    = Kmem::Pic_map_base + 0x08,
-    INTDISNUM   = Kmem::Pic_map_base + 0x0c,
-    INTENABLEH  = Kmem::Pic_map_base + 0x10,
-    INTENABLEL  = Kmem::Pic_map_base + 0x14,
-    INTTYPEH    = Kmem::Pic_map_base + 0x18,
-    INTTYPEL    = Kmem::Pic_map_base + 0x1c,
-    NIPRIORITY7 = Kmem::Pic_map_base + 0x20,
-    NIPRIORITY0 = Kmem::Pic_map_base + 0x3c,
-    NIVECSR     = Kmem::Pic_map_base + 0x40,
-    FIVECSR     = Kmem::Pic_map_base + 0x44,
-    INTSRCH     = Kmem::Pic_map_base + 0x48,
-    INTSRCL     = Kmem::Pic_map_base + 0x4c,
-    INTFRCH     = Kmem::Pic_map_base + 0x50,
-    INTFRCL     = Kmem::Pic_map_base + 0x54,
-    NIPNDH      = Kmem::Pic_map_base + 0x58,
-    NIPNDL      = Kmem::Pic_map_base + 0x5c,
-    FIPNDH      = Kmem::Pic_map_base + 0x60,
-    FIPNDL      = Kmem::Pic_map_base + 0x64,
-
-
-    INTCTL_FIAD  = 1 << 19, // Fast Interrupt Arbiter Rise ARM Level
-    INTCTL_NIAD  = 1 << 20, // Normal Interrupt Arbiter Rise ARM Level
-    INTCTL_FIDIS = 1 << 21, // Fast Interrupt Disable
-    INTCTL_NIDIS = 1 << 22, // Normal Interrupt Disable
-  };
-};
-
-// ---------------------------------------------------------------------
-IMPLEMENTATION [arm && imx]:
-
-#include "boot_info.h"
-#include "config.h"
-#include "initcalls.h"
-#include "io.h"
-#include "irq.h"
-#include "irq_chip_generic.h"
-#include "irq_pin.h"
-#include "vkey.h"
-
-#include <cstdio>
-
-class Imx_pin : public Irq_pin
-{
-public:
-  explicit Imx_pin(unsigned irq) { payload()[0] = irq; }
-  unsigned irq() const { return payload()[0]; }
-};
-
-PUBLIC
-void
-Imx_pin::unbind_irq()
-{
-  mask();
-  disable();
-  Irq_chip::hw_chip->free(Irq::self(this), irq());
-  replace<Sw_irq_pin>();
-}
-
-PUBLIC
-void
-Imx_pin::do_mask()
-{
-  assert (cpu_lock.test());
-  Io::write<Mword>(irq(), Pic::INTDISNUM); // disable pin
-}
-
-PUBLIC
-void
-Imx_pin::do_mask_and_ack()
-{
-  assert (cpu_lock.test());
-  __mask();
-  Io::write<Mword>(irq(), Pic::INTDISNUM); // disable pin
-  // ack is empty
-}
-
-PUBLIC
-void
-Imx_pin::ack()
-{
-  // ack is empty
-}
-
-PUBLIC
-void
-Imx_pin::hit()
-{
-  Irq::self(this)->Irq::hit();
-}
-
-PUBLIC
-void
-Imx_pin::do_unmask()
-{
-  assert (cpu_lock.test());
-  Io::write<Mword>(irq(), Pic::INTENNUM);
-}
-
-
-PUBLIC
-bool
-Imx_pin::check_debug_irq()
-{
-  return !Vkey::check_(irq());
-}
-
-PUBLIC
-void
-Imx_pin::set_cpu(unsigned)
-{
-}
-
-class Irq_chip_arm_x : public Irq_chip_gen
-{
-};
-
-PUBLIC
-void
-Irq_chip_arm_x::setup(Irq_base *irq, unsigned irqnum)
-{
-  if (irqnum < Config::Max_num_dirqs)
-    irq->pin()->replace<Imx_pin>(irqnum);
-}
-
-IMPLEMENT FIASCO_INIT
-void Pic::init()
-{
-  static Irq_chip_arm_x _ia;
-  Irq_chip::hw_chip = &_ia;
-
-  Io::write<Mword>(0,    INTCTL);
-  Io::write<Mword>(0x10, NIMASK); // Do not disable any normal interrupts
-
-  Io::write<Mword>(0, INTTYPEH); // All interrupts generate normal interrupts
-  Io::write<Mword>(0, INTTYPEL);
-
-  // Init interrupt priorities
-  for (int i = 0; i < 8; ++i)
-    Io::write<Mword>(0x1111, NIPRIORITY7 + (i * 4)); // low addresses start with 7
-}
-
-IMPLEMENT inline
-Pic::Status Pic::disable_all_save()
-{
-  Status s = 0;
-  return s;
-}
-
-IMPLEMENT inline
-void Pic::restore_all( Status /*s*/ )
-{
-}
-
-PUBLIC static inline NEEDS["io.h"]
-Unsigned32 Pic::pending()
-{
-  return Io::read<Mword>(NIVECSR) >> 16;
-}
-
-PUBLIC static inline
-Mword Pic::is_pending(Mword &irqs, Mword irq)
-{
-  return irqs == irq;
-}
-
-//---------------------------------------------------------------------------
-IMPLEMENTATION [debug && imx]:
-
-PUBLIC
-char const *
-Imx_pin::pin_type() const
-{ return "HW i.MX IRQ"; }
-

diff --git a/kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx.cpp b/kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx.cpp
deleted file mode 100644 (file)
index ac20ba1..0000000
--- a/kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx.cpp
+++ /dev/null
@@ -1,106 +0,0 @@
-// --------------------------------------------------------------------------
-INTERFACE [arm && imx]:
-
-#include "kmem.h"
-#include "irq_chip.h"
-
-EXTENSION class Timer
-{
-private:
-  enum {
-    TCTL  = Kmem::Timer_map_base + 0x00,
-    TPRER = Kmem::Timer_map_base + 0x04,
-    TCMP  = Kmem::Timer_map_base + 0x08,
-    TCR   = Kmem::Timer_map_base + 0x0c,
-    TCN   = Kmem::Timer_map_base + 0x10,
-    TSTAT = Kmem::Timer_map_base + 0x14,
-
-    TCTL_TEN                            = 1 << 0,
-    TCTL_CLKSOURCE_PERCLK1_TO_PRESCALER = 1 << 1,
-    TCTL_CLKSOURCE_32kHz                = 1 << 3,
-    TCTL_COMP_EN                        = 1 << 4,
-    TCTL_SW_RESET                       = 1 << 15,
-  };
-private:
-  static Irq_base *irq;
-};
-
-// ----------------------------------------------------------------------
-IMPLEMENTATION [arm && imx]:
-
-#include "config.h"
-#include "kip.h"
-#include "irq_chip.h"
-#include "irq_pin.h"
-#include "io.h"
-
-#include <cstdio>
-
-Irq_base *Timer::irq;
-
-IMPLEMENT
-void Timer::init()
-{
-  Io::write<Mword>(0, TCTL); // Disable
-  Io::write<Mword>(TCTL_SW_RESET, TCTL); // reset timer
-  for (int i = 0; i < 10; ++i)
-    Io::read<Mword>(TCN); // docu says reset takes 5 cycles
-
-  Io::write<Mword>(TCTL_CLKSOURCE_32kHz | TCTL_COMP_EN, TCTL);
-  Io::write<Mword>(0, TPRER);
-  Io::write<Mword>(32, TCMP);
-
-  Irq_chip::hw_chip->reserve(Config::Scheduling_irq);
-
-  static Irq_base ib;
-  Irq_chip::hw_chip->setup(&ib, Config::Scheduling_irq);
-  irq = &ib;
-
-  Io::set<Mword>(TCTL_TEN, TCTL);
-}
-
-static inline
-Unsigned64
-Timer::timer_to_us(Unsigned32 /*cr*/)
-{ return 0; }
-
-static inline
-Unsigned64
-Timer::us_to_timer(Unsigned64 us)
-{ (void)us; return 0; }
-
-IMPLEMENT inline NEEDS["io.h"]
-void Timer::acknowledge()
-{
-  Io::write<Mword>(1, TSTAT);
-}
-
-IMPLEMENT inline NEEDS["irq_pin.h"]
-void Timer::enable()
-{
-  irq->pin()->unmask();
-}
-
-IMPLEMENT inline NEEDS["irq_pin.h"]
-void Timer::disable()
-{
-  irq->pin()->mask();
-}
-
-IMPLEMENT inline NEEDS["kip.h", "io.h", Timer::timer_to_us, Timer::us_to_timer]
-void
-Timer::update_one_shot(Unsigned64 /*wakeup*/)
-{
-}
-
-IMPLEMENT inline NEEDS["config.h", "kip.h", "io.h", Timer::timer_to_us]
-Unsigned64
-Timer::system_clock()
-{
-  if (Config::scheduler_one_shot)
-    //return Kip::k()->clock + timer_to_us(Io::read<Unsigned32>(OSCR));
-    return 0;
-  else
-    return Kip::k()->clock;
-}
-