kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp

   1 // ---------------------------------------------------------------------
   2 INTERFACE [arm-integrator]:
   3
   4 #include "kmem.h"
   5
   6 EXTENSION class Pic
   7 {
   8 public:
   9   enum
  10   {
  11     IRQ_STATUS       = Kmem::Pic_map_base + 0x00,
  12     IRQ_ENABLE_SET   = Kmem::Pic_map_base + 0x08,
  13     IRQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x0c,
  14
  15     FIQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x2c,
  16
  17     PIC_START = 0,
  18     PIC_END   = 31,
  19   };
  20 };
  21
  22 // ---------------------------------------------------------------------
  23 IMPLEMENTATION [arm && integrator]:
  24
  25 #include "io.h"
  26 #include "irq_chip_generic.h"
  27 #include "irq_mgr.h"
  28
  29 class Irq_chip_arm_integr : public Irq_chip_gen
  30 {
  31 public:
  32   Irq_chip_arm_integr() : Irq_chip_gen(32) {}
  33   unsigned set_mode(Mword, unsigned) { return Irq_base::Trigger_level; }
  34   void set_cpu(Mword, unsigned) {}
  35   void ack(Mword) { /* ack is empty */ }
  36 };
  37
  38 PUBLIC
  39 void
  40 Irq_chip_arm_integr::mask(Mword irq)
  41 {
  42   assert(cpu_lock.test());
  43   Io::write(1 << (irq - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
  44 }
  45
  46 PUBLIC
  47 void
  48 Irq_chip_arm_integr::mask_and_ack(Mword irq)
  49 {
  50   assert(cpu_lock.test());
  51   Io::write(1 << (irq - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
  52   // ack is empty
  53 }
  54
  55 PUBLIC
  56 void
  57 Irq_chip_arm_integr::unmask(Mword irq)
  58 {
  59   assert(cpu_lock.test());
  60   Io::write(1 << (irq - Pic::PIC_START), Pic::IRQ_ENABLE_SET);
  61 }
  62
  63 static Static_object<Irq_mgr_single_chip<Irq_chip_arm_integr> > mgr;
  64
  65 IMPLEMENT FIASCO_INIT
  66 void Pic::init()
  67 {
  68   Irq_mgr::mgr = mgr.construct();
  69
  70   Io::write(0xffffffff, IRQ_ENABLE_CLEAR);
  71   Io::write(0xffffffff, FIQ_ENABLE_CLEAR);
  72 }
  73
  74 IMPLEMENT inline
  75 Pic::Status Pic::disable_all_save()
  76 {
  77   Status s = 0;
  78   return s;
  79 }
  80
  81 IMPLEMENT inline
  82 void Pic::restore_all(Status)
  83 {}
  84
  85 PUBLIC static inline NEEDS["io.h"]
  86 Unsigned32 Irq_chip_arm_integr::pending()
  87 {
  88   return Io::read<Mword>(Pic::IRQ_STATUS);
  89 }
  90
  91 extern "C"
  92 void irq_handler()
  93 { mgr->c.handle_multi_pending<Irq_chip_arm_integr>(0); }
  94
  95 //---------------------------------------------------------------------------
  96 IMPLEMENTATION [debug && integrator]:
  97
  98 PUBLIC
  99 char const *
 100 Irq_chip_arm_integr::chip_type() const
 101 { return "Integrator"; }